2. Without Channels
•
One can still exchange data among modules.
•
Problems:
–
Data access may not be well scheduled.
–
It is possible that multiple processes try to access but clear order is not set up.
–
Events can be used to set up the order but it is likely that events may be
missed.
–
No handshaking mechanism is embedded.
–
It does not map to HW architecture.
–
And so on….
3. Using channels
•
•
•
•
For all communication issues, it is recommended to solve the
above problems using channels.
Channel is a SystemC embedded mechanism.
Can be used to map to real HW architecture and
communication protocols.
Two basic types of channels are provided:
–
Primitive
–
Hierarchical
4. Primitive Channels
•
For “primitive” type, no process, hierarchy,
and so on in order to make the channels fast.
•
Inherit from the base class, sc_prim_channel.
•
Three simple SystemC channels:
–
sc_mutex
–
sc_semaphore
–
sc_fifo
5. sc_mutex
•
•
•
•
•
Mutex is a program object allowing multiple threads to share a common
resource without colliding.
During elaboration, a mutex is created. Then, any process wants to use
the resource must lock the mutex to prevent others from accessing the
same source. After its access, the process must unlock the mutex to let
others access the resource.
When a process try to access a locked mutex, it is prevented until the
mutex is unlocked.
In SystemC, both blocking and unblocking types are supported.
No signal is available to indicate that a mutex is available. SO, using
trylock may be a method but it may slow down the simulation.
15. sc_semaphore
•
To have more than one resources to choose from, one can use
semaphore.
•
Mutex here is one special case of semaphore.
•
When a process finishes with a resource, it must post a notice.
•
Syntax: sc_semaphore name_or_semaphore(count)
–
name_of_semaphore.wait(); //blocking
–
name_of_semaphore.trywait(); //non-blocking
–
name_of_semaphore.get_value();// return # of free semaphores
–
name_of_semaphore.post(); //when free a resource
25. SC_FIFO
•
Good for architecture modeling
•
Suitable for data flow modeling too.
•
Simple to implement.
•
Default sc_fifo depth is 16, with its data type specified.
•
The data type of sc_fifo can be complex structure.
•
It can be used to buffer data between two processing units,
data packets in communication networks, and so on.
26. Bus Wrapper
•
接續上面的 Bus Model, 接到 Bus 的 Module
有一個 Wrapper, Wrapper 上有一個 FIFO 來
當 buffer, 這樣就可以運用 sc_fifo 來當練習
了.
37. The use of Signals
•
•
•
•
When modeling signal on something like electronic
wire,
When concurrent executions of modules are
required and execution orders of modules are
important,
When using wait() and notify() cosumes too much
time,
When using FIFO consuming too much resources,
39. Signal Channel
•
Signal channels use the update phase as a point of synchronization.
•
Each such channel has to store the current value and the new value.
•
•
•
•
The incoming value is stored into the new position instead of the current
position.
When in update phase (Kernel calls update_request()), the current value
is updated with the new value. Therefore, contention is resolved.
All these are done within a delta cycle.
If one writes to a channel and reads the channel within the same delta
cycle, one will find the result is not the value just been written.
40. sc_signal
•
•
•
When using write(), the evaluate-update is performed, too.
That is, it calls sc_prim_channle:: request_update() and
sc_signal::update().
sc_signal behaves like VHDL’ signal and Verilog’s reg. By the
way.
Only one process can write to a sc_signal in order to avoid
race condition.
sc_signal <datatype> name_of_signal;
name_of_signal.write(new_value);
name_of_signal.read(name_of_var);
sensitive << name_of_signal.default_event();
wait(name_of_signal.default_event);
………
09/12/9