1. Pulse Oximeter SoC Capable of Conducting SpO2 and Heart Rate
Measurements
Tianhao Li1, Huijie Pan1, and Ke Tang1
Abstract— This paper proposes a System-on-Chip (SoC) to
be used in a pulse oximeter with two LEDs, one photodiode,
one LCD display and one microprocessor that are all off-
chip. The proposed SoC has a similar architecture to that in
[1], and contains a transimpedance amplifier, a demodulator,
two band-pass filters, two low-pass filters, an analog-to-digital
converter, two Automatic Gain Control (AGC) circuits and two
LED drivers, and biasing circuits. The SoC together with the
off-chip elements can be used to measure arterial blood oxygen
saturation level (SpO2) and estimate heart rate. The final design
achieved a power consumption 4.78 mW.
I. INTRODUCTION
Since its advent, pulse oximetry has become a convenient
and popular method for measuring blood oxygen satura-
tion level (SpO2) and estimating heart rate noninvasively.
The blood oxygen measuring feature makes pulse oximetry
widely applied in intensive care, operating rooms, emer-
gency, patient transport, general wards, birth and delivery,
neonatal care, sleep laboratories, home care and in veterinary
medicine. In addition, photoplethysmography (PPG) signal
available from pulse oximetry is essential information for
not only medical instruments, but also wearable devices like
smart watches that use PPG to estimate heart rate[1][2].
Pulse oximetry is usually implemented through pulse
oximeters, which operate based on the following principles
[1].
1) The light absorbance of oxygenated hemoglobin
(HbO2) and deoxygenated one (Hb) at two different
wavelengths is different, as can be seen in Fig. 1. The
difference is large enough for meaningful measurement
but not so large that the blood appears opaque for one
of the two substances.
2) The pulsatile nature of arterial blood allows the ab-
sorbance effects of arterial blood to be identified from
those of nonpulsatile venous blood. By using a quotient
of the two effects mentioned in 1) and 2) at different
wavelengths it is possible to obtain an oximeter that
does not need calibration with respect to overall tissue
absorbance.
3) Light scattering in blood and tissue will illuminate
sufficient arterial blood and thus allow detection of the
pulsatile signal. The scattering needs to be calibrated,
but at the same time it allows a transmittance path
around the bone in the finger.
1Tianhao Li, Huijie Pan, and Ke Tang are with School of Electrical and
Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-
0250, USA tianhao@gatech.edu, hpan33@gatech.edu,
ke.tang@gatech.edu
Fig. 1. Absorption spectrum of reduced hemoglobin (Hb) and oxyhe-
moglobin (HbO2) [3].
The three principles require that an oximeter have (1) at
least two sources of light at different wavelengths and with
intensity sufficient enough to transmit through human ears
or fingertips, (2) a light sensing device able to detect the
transmitted light, and (3) an ”intermediate mechanism” ca-
pable of controlling the emitted light, recording the intensity
of the transmitted light (the variation of the intensity of the
transmitted light itself is PPG signal) and passing it to (4) a
microprocessor for further processing. The microprocessor
can calculate blood oxygen saturation level at a specific
time based on Beer’s law with the relative concentrations of
Hb and HbO2. Specifically, the microprocessor calculates
the ratio of the intensity of the transmitted light to that
of the emitted light for the two sources of light; then the
microprocessor goes to an empirical look up table for an
SpO2 value, which is calculated as:
SpO2 =
HbO2
HbO2 + Hb
× 100%. (1)
To estimate heart rate from the PPG signal, the micropro-
cessor will use relevant DSP algorithms [2][4][5]. Although
analog circuits can perform arithmetic operations such as
subtraction and division so as to calculate SpO2, as shown
in [6], for heart rate measurement algorithms it would be
more convenient and efficient to use a microprocessor than
to use analog circuits.
Normally, LEDs are used as the light sources because
they can transmit light whose intensity is proportional to the
LEDs’ current, which can easily be controlled by driving
circuits. The two wavelengths are chosen to be 660 nm

2. Fig. 2. Block Diagram for Design Architecture.
and 940 nm because at these two wavelengths (1) there are
LEDs available; (2) the absorbance (extinction coefficient)
of Hb and HbO2 has a detectable difference; (3) as the
actual blood oxygen saturation level increases, the overall
absorbance of light increases at 940 nm and decreases at
660 nm. Photodiodes serve as the light sensing device. The
”intermediate mechanism” can be implemented as an SoC.
In this paper, we propose an architecture for the SoC. Our
SoC is able to (1) drive a red LED and an infrared LED
in an alternating fashion; (2) take in the current generated
by a photodiode, and convert the current to a voltage; (3)
extract the low-frequency AC signal from the voltage; (4)
convert the extracted signal to digital data suitable for an
off-chip microprocessor. The off-chip microprocessor uses
the digital data to calculate SpO2 and estimate heart rate. It
also interacts with a display that shows the results to the end
user.
The rest of the paper is divided into the following sections.
In Section II, we introduce each function block of our pro-
posed SoC, present their topology, and show their respective
performance with supporting simulation results. In Section
III, we compare the achieved performance with several state-
of-the-art systems. In Section IV, we talk about the work
distribution in the group. We draw the conclusion in Section
II. SOC DESIGN & SIMULATIONS
The overall architecture of the SoC and off-chip functional
blocks are illustrated in Figure 2. The architecture is adapted
from the architectures illustrated in [1] and [6]. The major
difference is that, the architecture of this work does not have
a modulator that combines the demodulated and filtered IR
LED and red LED signals before ADC. Instead, it directly
converts the signals to digital ones and pass them to the
off-chip microprocessor. The calculation of SpO2 and the
estimation of heart rate are to be completed in the off-chip
microprocessor.
A. LED
A red and a near-infrared LED will be placed off-chip
on a PCB board. The group has selected an infrared LED
APA3010F3C-GX from Kingbright [7]. For the red LED,
the group has selected APT1608SRCPRV from Kingbright
with similar power consumption [8]. The peak current the
LED driver uses to drive the LEDs is 8mA. If the LEDs are
powered with constant current, the power consumption of the
SoC will exceed 50mW. However, two pulse signals with 5%
duty cycle are used to drive the LEDs instead, which reduces
the total power consumption of the LEDs to 2.7mW and at
the same allows effective sensing on photodiode. A circuit
model is created for the LED for simulation purpose based
on datasheets[7][8].
B. Photodiode
A single off-chip photodiode is used to detect the LED
light transmitted through patient’s finger. When photodiode
is in a dark environment, there is a reverse dark current which
is in the order of pA. When light of interest is present, the
photodiode will generate a reverse light current proportional
to the irradiance of the light. Most off-the-shelf photodiodes
have reverse light currents that are linearly dependent on
the irradiance of the received light. This property is ideal
for decoding the light intensity at the microprocessor stage.
Through an extensive survey of datasheets, our group has
decided on BPV10 Silicon PIN photodiode [9] from Vishay
Semiconductors. BPV10 has a relatively low reverse dark
current which gives a higher light sensitivity. Additionally,
the relative spectral sensitivity is maximized over the red
& infrared range as shown in Fig. 3. For this design, the
ac component of the blood pulsating signals detected by

3. photodiode lies between 25nA ∼ 100nA, while the DC
component ranges between 1µA and 2.5µA [10].
Fig. 3. Relative Spectral Density versus Wavelength [9].
C. Transimpedance Amplifier (TIA) and Zeoring Circuit
The typical ac component of the readout current from pho-
todiode is in the order of nA. Before further processing the
analog signal, a transimpedance amplifier (TIA) is designed
to convert this current into a detectable voltage. For a lower
bound readout current with a dc of 1µA and an ac of 25nA,
a transimpedance gain of 200KV/v is appropriate, since
the relative large dc component of the pulsating signal may
easily overwhelm the ICMR (0.1V ∼ 2.1V ) of the following
circuit if the gain is too high. After the amplification of the
TIA, the pulsating signal has a minimum amplitude of ∼
5mV . The addition of the feedback capacitors CF eliminates
the peaking effect caused by the large input capacitance
of the photodiode. Due to the low frequency nature of
blood pulsating signals (0.5Hz to 5Hz), lowering the input-
referred current flicker noise is of paramount importance
since it determines the highest SNR our system can achieve.
Our group designed a two-stage op amp with PMOS inputs
which has 25% of the flicker noise comparing to NMOS
inputs with the same aspect ratios [11]. The transistor level
topology is shown in 4. Equation 2 shows that by increasing
L3 and W1, the flicker noise can be minimized [11]. The
final sizing of the transistors is shown in table I
¯V 2
eq( 1
f )
=
2Kp
W1L1Coxf
1 +
KnµnL2
1
KpµpL2
3
∆f (2)
TABLE I
ASPECT RATIO OF TRANSISTORS IN TIA
Q1 Q2 Q3 Q4 Q5 Q6 Q7
Width (um) 129.6 57.6 84 13.2 120
Length (um) 1.2 19.2 1.2 1.2 1.2
Fig. 4. PMOS low-noise op amp used in TIA.
Based on simulation, it is shown that the flicker noise at
the bandwidth of interest reaches an RMS value of 178pA,
which can be seen in 5. This noise level is roughly 40dB
below the minimum pulsating signals read by photodiode.
Immediately following the differential TIA is a zeroing
circuit, whose major purpose is to remove the ambient light
signal from the photodiode output signal. Fig. 7 shows its
topology. The timing control opens the switch when either
the red LED control signal or the IR LED control signal is
high. When the switch is closed, the RC network is active and
the capacitor is charged. When the switch opens, leaving the
ambient light voltage across the capacitor, the voltage level
at the inverting terminal of the op amp will be either the red
LED voltage or the IR LED voltage subtracting the ambient
light voltage.
D. Demodulator
With a single photodiode, the output of the differential TIA
contains both voltages from infra-red and red light sources.
Since the two LEDs are pulsed alternately with sufficient
time separation, the two voltages are demodulated using
two track-and-hold circuits, which are shown in Fig. 8. The
two switches are transmission-gates controlled by respective
LED timing signals. The simulation result shows a charge-
injection and clock-feedthrough of less than 1µV , which
ends up filtered out by the following BPF.
E. Band-Pass Filters
Two band-pass filters (BPF) are used to extract the low
frequency pulsating signals from the sampled pulses at the
outputs of the demodulator. With sufficiently large roll-off,
the BPF filters out the dc component and the high frequency
noise picked up from clock signals and ambient environment.
Each BPF is implemented using cascaded Gm-C filters.
In the final design, the BPF is a 3rd order one, giving
a 60 dB/decade roll-off. Therefore 6 Gm-C filters (three
of which are identical Gm-C high-pass filters with 0.5-Hz

4. Fig. 5. Noise spectrum of the low-noise TIA in this design.
Fig. 6. Transimepance amplifier connected to a photodiode circuit model.
Fig. 7. Zeroing circuit.
Fig. 8. Demodulator.
cutoff frequency and the other three identical Gm-C low-
pass filters with 5-Hz cutoff frequency) are needed for each
BPF, as shown in Fig. 9. The Gm-C filters are composed
of operational transconductance amplifiers (OTA), as shown
in Fig. 10, and the aspects ratio of each transistor are listed
in tableII. One of the characteristics of ideal op-amp is low
output impedance, and it is used as voltage buffer. Op-amps
can only drive capacitive loads up to a certain limit. However,
as for OTAs, they have better frequency capability than op-
amps, and they are loaded with capacitor. At high frequency,
the output voltage of OTA is proportional to gm/c, which
makes it easier to control the voltage by varying the gain.
The simulation result of the BPF is shown in Fig. 11
Fig. 9. Third-order Gm-C band-pass filter.
Immediately following the BPF is the gain stage shown
in 12. It is a non-inverting operational amplifier with a gain

5. Fig. 10. Operational transconductance amplifier used in Gm-C filters.
TABLE II
ASPECT RATIO OF TRANSISTORS IN OTA
Q1 Q2 Q3 Q7 Q8 Q9 Q4 Q5 Q6
Width (um) 1.5 500 1.743
Length (um) 1.2 1.2 1.2
of 100V/V . The same operational amplifier design is in fact
used in demodulator, sample and hold circuit in ADC, and
other blocks which require op amp. The ac simulation of
the op amp is shown in 13, and its performance metrics is
displayed in III.
TABLE III
OPERATIONAL AMPLIFIER SPECIFICATIONS
Q1 Q2
DC Gain (dB) 69.82
GBW (MHz) 1.93
Phase Margin (Deg) 72
ICMR (V) 0.1∼ 2.1
Output Swing (MHz) 0.24 ∼ 3.2
Power (µW) 73
F. Analog-to-Digital Converter (ADC)
The ADC takes in the analog voltage signals from the
outputs of the BPFs and convert them into digital signals for
further processing. Since it has been shown that the RMS
value of the input referred noise current of the system is 178
pA, and since the input current has a maximum amplitude
of 50 nA, the maximum SNR of the system is
SNRmax = 20 log10
iacmax,rms
iinoise,rms
= 45.96dB. (3)
Therefore, we chose 8 bits as the ADC resolution since an
ADC with less than 8 bits has an SNR less than SNRmax
Fig. 11. AC simulation of band-pass filter.
Fig. 12. AC simulation of band-pass filter.
Fig. 13. AC simulation of the two-stage operational amplifier.

6. and will degrade the quality of the output digital signal,
and an ADC with more than 8 bits is meaningless since
the ENOB of the ADC will not be greater than 8 because
SNRmax < 49.92. We chose successive approximation
routine (SAR) ADC as the architecture due to its low
power, which fits our primary design goal. SAR ADCs use
binary search algorithm and have medium to high resolution,
making it good for 8-bit to 16-bit ADC implementation.
Given that the red LED and the IR LED signals have
low frequencies, we chose a clock frequency of 100 kHz
(equivalent to a sampling frequency of 11.1 kS/s). Fig.14
presents the overall schematic diagram of the 8-bit SAR
ADC. It consists of an array of capacitors and switches, a
control logic block, a comparator, an 8-bit register.
Fig. 14. Overall diagram of the SAR ADC.
Since the voltage at the top of the capacitor array (con-
nected to the inverting terminal of the comparator) can vary
from below 0 to VDD, the comparator needs rail-to-rail
ICMR. Our design is shown in Fig. 15. All PMOS have an
aspect ratio of 20
1 and all NMOS have an aspect ratio of 10
1
except the one NMOS under the positive feedback network,
which has an aspect ratio of 10
10 . The comparator has both
NMOS and PMOS input differential pairs to ensure rail-to-
rail ICMR. Simulation of the comparator shows that it has a
delay of 12 ns and a power consumption of 290 uW.
Fig. 15. Schematic of the Comparator.
The control logic consists of 18 D flip-flops, as shown in
Fig. 16. The top pin of each D flip-flop is reset, which forces
the output to be high regardless of the input when it is high.
The top 9 D flip-flops form a ring counter (or, a shift register)
that propagates a logic 1 through them for each comparison.
the bottom 9 D flip-flops store the results of comparison and
control the single-throw-triple-switches in the SAR ADC.
Fig. 16. Schematic of the SAR control logic. [12]
A SAR ADC needs a sample and hold circuit at its input.
The sample and hold circuit we chose is shown in Fig. 17.
Fig. 17. Schematic of the sample and hold circuit.
The unit capacitor of the capacitor array also needs
consideration. The choice needs to be based on trade-offs
between area, speed, and noise. Since our application is a
low-speed one, and the ADC’s resolution does not result in
a large minimum unit capacitor requirement, we were able
to choose from a wide range of values. We chose 100 fF for
this design.
We designed the layout of the whole ADC. The layout
of the comparator, the sample and hold circuit, the control
logic, the single-throw triple-pole switch, and the capacitor
array is shown in Fig. 18, Fig. 19, Fig. 20, Fig. 21, and Fig.
22 respectively. The overall layout is shown in Fig. 23.
To measure the performance of the SAR ADC, we used
effective number of bits (ENOB), differential nonlinearity
(DNL), integral nonlinearity (INL), and figure of merit
(FOM) as the metrics. ENOB is defined as
ENOB =
SNDR − 1.76
6.02
, (4)

7. Fig. 18. Layout of the comparator.
Fig. 19. Layout of the sample and hold circuit.
where SNDR is the signal to noise and distortion ratio of
the ADC in dB. DNL is the difference between the actual
step and the ideal step of the voltage transfer characteristics
(VTC) curve. INL is the difference between the actual
transition point to the ideal transition point of the VTC curve.
Typical FOM definition of the ADCs is:
FOM =
Power
2ENOB · fs
, (5)
where fs is the sampling frequency.
A series of simulations were conducted to obtain these
values. To obtain the ENOB, we input a slow (100 Hz)
sinusoidal wave into the ADC, collected its output digital
codes, and reconstructed the signal using the codes. We then
calculated the RMS value of the reconstructed signal and that
of the difference between it and the input. We then calculated
Fig. 20. Layout of the SAR control logic.
Fig. 21. Layout of the single-throw-triple-pole switch.
Fig. 22. Layout of the capacitor array.
Fig. 23. Layout of the entire SAR ADC.
the SNDR of the ADC by dividing the two RMS values, and
then computed the ENOB. To obtain the INL and the DNL,
we swept the input voltage at selected voltage ranges, and
computed the INL and the DNL by plotting its actual VTC
and comparing it to the ideal one. The power consumption
was calculated in a simulation where the ADC converted a
sinusoidal wave. With the power consumption and the ENOB
known, FOM can be easily calculated. The results of these
simulations and calculations are shown in IV. The INL and
the DNL on selected voltage ranges are shown in Fig. 24
and Fig. 25, respectively.
G. Low-Pass Filters
Two low-pass filters (LPF) are used to pass only the DC
components of both channels coming out of the demodulator
to AGC. Through negative feedback, the AGC offsets the DC

8. TABLE IV
PERFORMANCE SUMMARY OF THE 8-BIT SAR ADC
Metrics Pre-Layout Post-Layout
ENOB (bits) 7.739 7.135
DNL (LSB) < 0.3 < 0.9
INL (LSB) < 0.2 < 0.62
Power (uW) 387 294
FoM (uJ/Step) 163 188
Fig. 24. INL of the SAR ADC.
voltage variation by changing LED’s supply current. Three
identical Gm-C LPFs with the cutoff frequency of 0.1 Hz
are used, as shown in Fig. 26. The effective gm value of the
OTA circuit is greatly decreased by reducing the mirror ratio
of the Q5-Q6 mirror and Q4-Q7 mirror and bias voltage on
the tail transistor. The DC components are then passed to the
AGC and for LED control.
H. AGC & LED Driver
The DC components of the infra-red signal and the red
signal are inputs of the AGC and the LED driver. Fig.
27 shows the AGC and the driver for the red LED (The
schematic for the IR LED is nearly identical). The AGC
is a difference amplifier which takes as its input the DC
component of the red signal and Vcm. The output of the
difference amplifier feeds an LED driver through a switch
controlled by red LED control signal. When the control
signal is low, the switch connects the non-inverting terminal
Fig. 25. DNL of the SAR ADC.
Fig. 26. Gm-C low-pass filter.
of OA2 to VDD and there is no current flowing through the
LED. When the control signal is high, the switch connects
the output of OA1 to the non-inverting terminal of OA2, and
the current flowing through the red LED is given by
ILED =
VDD − R2
R1
(Vin − Vcm)
R3
. (6)
Where R2
R1
= 5 and R3 = 200, based on simulation results.
The LEDs, the photodiode, the TIA, the demodulator, the
low-pass filters, the AGCs and the drivers form a negative
feedback loop. Assume that somehow the current through
one of the LEDs becomes larger. This would cause the
intensity of the emitted light to become stronger. This will
increase the DC current picked up by photodiode and also the
V in for AGC. From Eq. 6 we know that the LED current will
decrease. Therefore, there is indeed a negative feedback loop
in the system that stabilizes the LED currents. The simulation
result is shown in 28. As the AGC V in varies, the LED
current varies inversely.
Fig. 27. LED driver and AGC.
I. Timing Control
For this system-on-chip, clock signals of two different fre-
quencies are used. LED-control and sample & hold circuits
in demodulator use two separate 1KHz pulses with 5%
duty cycle. ADC’s operating frequency is 100KHz, which
requires another clock signal at a different frequency. The
ideal LED pulses are shown in Fig. 29 [13].
All three clock signals are generated by the off-chip
general-purpose microprocessor. By controlling the LED

9. Fig. 28. AGC controls LED current through negative feedback. (LED
current is shown in purple)
Fig. 29. Timing signals for the LED drivers [13].
clock, microprocessor knows which pulsating signal of the
two is being converted by ADC.
J. Microprocessor
Texas Instrument’s MSP430 FR5994 [14] calculates the
final values of SpO2 and heart rate digitally. Additionally,
the MSP430 controls a LCD screen through an I2C port to
output information to user. MSP430 FR5994 is an ultra-low-
power microprocessor with active power of 120µA/MHz at
1.8V supply.
K. User Display
A LCD screen MI0283QT-11 from Multi-Inno Technology
[15] is selected as the off-chip display where user can read
out blood oxygen saturation and heart rate information.
L. Biasing & Reference Generator
A general purpose long-channel beta-multiplier reference
(BMR), as shown in Fig.30 [16], is designed to provide
vbiasn = 1.088V and vbiasp = 2.206V . The power supply
rejection ratio of the BMR circuit is better compared to band-
gap reference, and it also consumes less power. Although
the stability of BMR is easily affected by temperature, a
significantly stable reference voltage can be generated by
using a combination of resistors of required temperature
sensitivity within a given temperature range.
III. COMPARISON OF THIS WORK WITH THE STATE OF
THE ART
The total power consumption of the SoC is 4.782mW,
much lower than proposed design and most commercial pulse
oximeters. The most power hungry blocks are zeroing circuit
and LED drivers. The former drives a 100µF capacitor,
Fig. 30. Beta Multiplier [16].
and the latter supplies 8mA peak currents to both LEDs.
The group achieves state of the art power consumption by
using system bias voltages with a 5% VDD overdrive voltage.
Additionally, the LPFs and BPFs of this work operate in sub-
threshold with nA quiescent currents, reducing the power
consumption even further.
TABLE V
SOC POWER CONSUMPTION BREAKDOWN
Block Name Power Consumption
TIA 0.198 mW
Demodulator 0.149 mW
Zeroing Circuit 0.551 mW
BPF&LPF 37.4 uW
Gain Stage 73 uW
AGC & LED Drivers 3.4 mW
ADC 0.29 mW
Biasing Generator 0.1 mW
TABLE VI
COMPARISON OF THIS WORK WITH STATE OF THE ART
Pulse Oximeter Version Total power consumption
This work 4.78 mW
Design in [6] 4.8 mW
WristOx 3100 55 mW
Xpod 60 mW
Ipod 60 mW
Avant 4000 71 mW
PalmSAT 2500 80 mW
Onyx 9500 120 mW
8400 Series 130 mW
IV. WORK DISTRIBUTION
The group followed the planned work distribution whose
details are presented in tableVII. ADC design, layout, and
system integration require more effort than the other el-
ements, the group worked on these blocks together. The

10. following items have not been completed. The layout and
post-layout simulations for blocks besides ADC on the SoC;
on-chip voltage regulator that steps down a 5V from battery
to 3.3V ; temperature and Vdd variation simulations; a Gm-C
filter topology with smaller capacitors.
TABLE VII
WORK DISTRIBUTION
Name Tasks
Tianhao Li Demodulators, Biasing & Reference Generator
Huijie Pan TIA, AGC & LED Drivers
Ke Tang LPF, BPF
Team ADC, System Integration, Layout
V. CONCLUSION
In this paper, we proposed a pulse oximeter SoC archi-
tecture able to conduct SpO2 and heart rate measurement if
equipped with necessary off-chip measurements. The overall
power consumption of the SoC is comparable to the state
of the art. Plus, the proposed architecture achieves more
functionality since the one in [6] is not able to measure heart
rate.
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