1.
RISC & CISC ARCHITECTURES
CISC & RISC
Dr.YNM

2.
INTRODUCTION
The processor designs are broadly classified into two
categories.
i. Complex Instruction Set Computers (CISC) &
ii.Reduced Instruction Set Computers (RISC).
• Earlier days Intel & Motorola processors were
mainly based on CISC design. (For ex: 8085 to
Pentium &Motorola MC68060)
• But the recent trend is to use the RISC designs. For
example the widely used ARM processors are
RISC.
• The ARM is a very popular processor in the market
which is widely used in smartphones Laptops etc.

3.
contd
• The five very popular RISC processors are MIPS,
SPARC, PowerPC, Itanium, and ARM.
• Its clear from the above thatIntel has also shifted to
RISC architecture.For Ex: Itanium is from Intel.
• The RISC approach promises many advantages
over CISC architectures including superior
performance, design simplicity, rapid development
time.

4.
CISC FEATUES
• The Complex Instruction Set Computer systems use
complex instructions.
• For instance assume that you want to add two
numbers. This is a simple instruction.
• Instead assume that an instruction has to copy an
element from one array to another and has to update
both array subscripts automatically.
This is certainly a complex instruction.
• Also , to execute Complex instructions , complex
hardware is aso required which was also expensive.

5.
contd
• During 1950s a concept called microprogrammed
control was introduced.
• A microprogram is a small run-time interpreter that
takes the complex instructions and generates a
sequence of simple instructions that
can be executed by the hardware.
• This is process is as shown in the
diagram.

6.
What is ISA?
• ISA stands for Instruction Set Architecture.
• The ISA specifies how a processor functions i.e
what instructions it executes and what interpretation
is given to these instructions.
i.e the ISA defines a logical processor.
• So, the instruction set architecture (ISA) is a useful
abstraction to understand the processor’s internal
details.

7.
RISC DESIGN
• Basically as the name suggests, the RISC processors
have fewer instructions.
• RISC has simple instructions so that each can be
executed in one cycle.
• RISC processors allow only special Load and Store
operations to access memory.
• This feature simplifies instruction set design as it
allows execution of instructions at a one-instruction-
per-cycle rate.

8.
contd
• As the RISC processors employ register-to-register
instructions, most instructions use register-based
addressing.
• As only the load and store instructions are used for
memory access RISC designs provide very few
addressing modes: some time just one or two.
• Reduced instruction set computers aim for both
simplicity in hardware and synergy between
architectures and compilers.

9.
DIFFERENCES ::CISC &RISC

10.
contd