1. 1
Low Power VLSI Design:Low Power VLSI Design:
Challenges and solutionsChallenges and solutions
Dr.S.SaravananDr.S.Saravanan M.E.,PhDM.E.,PhD
HOD/EEE(UG)HOD/EEE(UG)
Muthayammal Engineering CollegeMuthayammal Engineering College
RasipuramRasipuram
12.03.2012
2. 2
AgendaAgenda
MotivationMotivation
Introduction To VLSI designIntroduction To VLSI design
Sources of Power DissipationSources of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionsConclusions
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MotivationMotivation
PORTABLE DEVICES …….Note BookPORTABLE DEVICES …….Note Book
Computers, PDAs, Laptops, Cell Phones,Computers, PDAs, Laptops, Cell Phones,
Pacemaker etc historical drivers of low powerPacemaker etc historical drivers of low power
……..require low power consumption & high……..require low power consumption & high
through putthrough put
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Motivation (Contd..)Motivation (Contd..)
• New portable compute-intensive applicationsNew portable compute-intensive applications
* Multi-media* Multi-media
* Video display and capture* Video display and capture
* Audio reproduction & capture* Audio reproduction & capture
* Handwriting recognition* Handwriting recognition
* Notebook computer* Notebook computer
* Personal data assistant* Personal data assistant
* Implantable medical electronics* Implantable medical electronics
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Motivation (contd..)Motivation (contd..)
Why so much of stress on Low Power?Why so much of stress on Low Power?
Portable devices run on batteryPortable devices run on battery
Battery life is limitedBattery life is limited
Energy density of Nickel-MetalEnergy density of Nickel-Metal
Hydride (NiMH) is low@30Wh/lbHydride (NiMH) is low@30Wh/lb
The battery technology is not improving atThe battery technology is not improving at
the same speed as that of VLSIthe same speed as that of VLSI
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7. VLSI Chip Power DensityVLSI Chip Power Density
4004
8008
8080
8085
8086
286
386
486
Pentium®
P6
1
10
100
1000
10000
1970 1980 1990 2000 2010
Year
PowerDensity(W/cm2
)
Hot Plate
Nuclea
rReacto
r
Rocket
Nozzle
Surface
Sun’s
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Motivation (contd..)Motivation (contd..)
Power dissipation increases with the increase inPower dissipation increases with the increase in
clock speedclock speed
This will increase the costThis will increase the cost packagingpackaging to remove theto remove the
heatheat
Increased Power will generate excessive heat. ThisIncreased Power will generate excessive heat. This
will causewill cause Electro migrationElectro migration
ThusThus ReliabilityReliability becomes an added issue to costbecomes an added issue to cost
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AgendaAgenda
MotivationMotivation
Introduction To VLSI DesignIntroduction To VLSI Design
Sources Of Power DissipationSources Of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionConclusion
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What is MicroWhat is Micro
Electronics?Electronics?
• The size of the Electronic Devices in
μ- Electronics is in the range of micrometers
• Advantages of such devices…..
• Examples.. ICs……..
• μ- Electronics gave ICs
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Some Land MarksSome Land Marks
• 1883 - Thomas Alva Edison , demonstrated the conduction
of electrons in vacuum
• 1904 - John Fleming invented the vacuum diode
• 1947 – The transistor was developed by BARDEEN,
SHOCKLEY and BRATTAIN at Bell Labs.
• 1958 - JACK KILBY developed the first IC
• 1971 – Intel’s 4004 PMOS 4-bit processor @740K
• 1976 – Intel’s first Micro controller
• 1993- Pentium Processor
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12. BornBorn
23 May23 May 19081908))
Madison, WisconsinMadison, Wisconsin,, United StatesUnited States
DiedDied
January 30January 30,, 19911991 (aged 82)(aged 82)
BostonBoston,, MassachusettsMassachusetts
NationalityNationality United StatesUnited States
FieldsFields PhysicsPhysics
InstitutionsInstitutions
Bell LabsBell Labs
University of MinnesotaUniversity of Minnesota
University of Illinois at Urbana-ChampaignUniversity of Illinois at Urbana-Champaign
Alma materAlma mater
University of Wisconsin-MadisonUniversity of Wisconsin-Madison
Princeton UniversityPrinceton University
DoctoralDoctoral advisoradvisor Eugene WignerEugene Wigner
Doctoral studentsDoctoral students
John SchriefferJohn Schrieffer
Nick HolonyakNick Holonyak
Known forKnown for
TransistorTransistor
BCS theoryBCS theory
Notable awardsNotable awards
Nobel Prize in PhysicsNobel Prize in Physics (1956)(1956)
Nobel Prize in PhysicsNobel Prize in Physics (1972)(1972)
IEEE Medal of HonorIEEE Medal of Honor (1971)(1971)
John Bardeen
13. 13
BornBorn
February 10February 10,, 19021902
China-AmoyChina-Amoy
DiedDied
October 13October 13,, 19871987
NationalityNationality United StatesUnited States
FieldsFields PhysicistPhysicist,, InventorInventor
Known forKnown for TransistorTransistor
Notable awardsNotable awards Nobel Prize in PhysicsNobel Prize in Physics (1956)(1956)
Walter Houser Brattain
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14. 14
BornBorn
13 February13 February 19101910))
London, EnglandLondon, England
DiedDied
12 August12 August 1989 (aged 79)1989 (aged 79)
Stanford, CaliforniaStanford, California
InstitutionsInstitutions
Bell LabsBell Labs
Shockley SemiconductorShockley Semiconductor
StanfordStanford
Alma materAlma mater
CaltechCaltech
MITMIT
Doctoral advisorDoctoral advisor John C. SlaterJohn C. Slater
Known forKnown for Co inventor of theCo inventor of the transistortransistor
Notable awardsNotable awards Nobel Prize in Physics (1956)Nobel Prize in Physics (1956)
Religious stanceReligious stance None, atheistNone, atheist
William Shockley
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What is VLSI?What is VLSI?
• Classification of ICs….. Based on no. of transistors
• In VLSI… Transistor count is in excess of 40 thousand
• A state of art of VLSI has more than 100 million transistors
• VLSI Chip…. Only CMOS transistors
• CAD tools are a must to design , verify and test the
VLSI chips
• SOC- System On Chip
• ASP-Application Specific Product using IP CORES
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P6
Pentium ® proc
486
386
2868086
8085
8080
8008
4004
0.1
1
10
100
1971 1974 1978 1985 1992 2000
Year
Power(Watts) Lead Microprocessors power continues to increaseLead Microprocessors power continues to increase
Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive
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Lead microprocessors frequency doubles every 2 yearsLead microprocessors frequency doubles every 2 years
P6
Pentium ® proc
486
386
2868086
8085
8080
8008
4004
0.1
1
10
100
1000
10000
1970 1980 1990 2000 2010
Year
Frequency(MHz)
2X every 2 years
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VLSI Design FlowVLSI Design Flow
VLSI DESIGN STYLES
Full Custom
Semi custom FPGA Based
Standard
cell Based
Gate Array
Based
Xilinx
Altera
Actel
……
……
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System Idea
Sub Blocks Identification
Bottom – Up
(Full custom) Top Down
(Standard Cell)
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RTL Code
Logic Synthesis
& Target Library
Mapping
Target
Library
Gate level
Net list
Digital
Simulation
Placement &
Routing
(Std.Cells)
Post layout
Simulation
Standard Cell Flow
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Placement & Routing
(Top level)
Top level
Verification
Tape-out
Prototyping
Testing
Fabrication
Back End Flow
Full custom Standard cell
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CAD in VLSI
E (Engg) CAD
T (Technology) CAD
CONCEPT
VLSI
Ckt.
Design
VLSI Chip
CONCEPT- Defines the final Product Specification ( the
Product May be a Intel μP, Texas DSP or Motorola’s μC or it
could be an ASIC)
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VLSI ProcessingVLSI Processing
OxidationOxidation
Diffusion/Ion ImplantationDiffusion/Ion Implantation
Poly DepositionPoly Deposition
EtchingEtching
Metallisation(vacuum/Sputtering)Metallisation(vacuum/Sputtering)
TestingTesting
SCRIBING And PACKAGINGSCRIBING And PACKAGING
Testing…..Release To MarketTesting…..Release To Market
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AgendaAgenda
MotivationMotivation
Introduction To VLSI DesignIntroduction To VLSI Design
Sources Of Power DissipationSources Of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionConclusion
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Sources of Power DissipationSources of Power Dissipation
2.2. Static PowerStatic Power = Leakage Power= Leakage Power
= I= ILL .V.VDDDD
N+ N+
I Rev
VDD
P-Sub
Gate Tunneling current is a major leakage power
source in DSM ICs
IT
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Sources of Power DissipationSources of Power Dissipation
3.3. Short Circuit PowerShort Circuit Power
PP shortshort = I= IDD ShortShort . V. VDDDD
IIDD ShortShort
VDD
VDD
VGND VGND
VDD/2
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AgendaAgenda
MotivationMotivation
Introduction To VLSI DesignIntroduction To VLSI Design
Sources Of Power DissipationSources Of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionConclusion
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Reduction of switching activity
• By proper choice of logic topology
• By circuit level optimization
• The representation of data can have significant
impact on switching activity at the system level
Ex: Use of Gray coding instead of binary coding
in applications where data bits change sequentially
such as address bits
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Gated Clock SignalsGated Clock Signals
Reg
Reg
Reg
EX-OR
MSB
Comparator
(N-1)
bit
Comp-
arator
Clk Gated clock
A(N-1)
B(N-1)
In conventional approach
All bits are first latched into
2 N-bit Regs, and
Subsequently applied to the
comparator
Clk
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Reduction of Switched CapsReduction of Switched Caps
System level Measures
Large bus Caps due to:
i) Large no.of drivers & receivers sharing the same bus
ii) The parasitic Cap.of the long bus
Global bus structure is partitioned into a number of smaller
Dedicated local buses to handle data transmission
C bus
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Circuit- Level Measures
• Cap is a function of the no. of transistors in
a Logic circuit
• Use Pass-transistor (transmission gates) logic
• Using Xn gates one can construct 2:1 mux
And a XOR gate with 6 Transistors against
12 and 14 transistors
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Leakage current/powerLeakage current/power
Dynamic Power isDynamic Power is αα VV22
dddd
Static power is proportional to VStatic power is proportional to Vdddd
So power reduces with the reduction of VSo power reduces with the reduction of Vdddd
With the scaling down of voltage andWith the scaling down of voltage and
dimensions Vdimensions Vthth of the transistor is also scaledof the transistor is also scaled
downdown
But leakage current increases exponentiallyBut leakage current increases exponentially
in sub-threshold region . So reduce leakagein sub-threshold region . So reduce leakage
currentcurrent
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Variable Threshold CMOSVariable Threshold CMOS
Leakage is reduced by turning OFFLeakage is reduced by turning OFF
transistors not in usetransistors not in use
Use High Vt transistor for low I -leak andUse High Vt transistor for low I -leak and
use Low Vt transistor in critical pathuse Low Vt transistor in critical path
So one should use transistors of differentSo one should use transistors of different
threshold voltagesthreshold voltages
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Software Design For Low PowerSoftware Design For Low Power
Most efforts….focused on hardware designMost efforts….focused on hardware design
It is because HW is the physical means byIt is because HW is the physical means by
which power is converted into usefulwhich power is converted into useful
computationcomputation
It would be unwise to ignore the influence ofIt would be unwise to ignore the influence of
SW on power dissipationSW on power dissipation
In systems based on digital processors orIn systems based on digital processors or
controllers, it is SW that directs much of thecontrollers, it is SW that directs much of the
activity of the HWactivity of the HW
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So , the manner in which SW uses the HWSo , the manner in which SW uses the HW
can have a substantial impact on the powercan have a substantial impact on the power
dissipation of a systemdissipation of a system
Can draw an analogy from automobilesCan draw an analogy from automobiles
The manner in which one drives his/herThe manner in which one drives his/her
automobile can have a significant effect onautomobile can have a significant effect on
total fuel consumptiontotal fuel consumption
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AgendaAgenda
MotivationMotivation
Introduction To VLSI DesignIntroduction To VLSI Design
Sources Of Power DissipationSources Of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionConclusion
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IntroductionIntroduction
Power is a serious concern in today'sPower is a serious concern in today's
SoC design.SoC design.
Core based SoC design is common toCore based SoC design is common to
get time to market advantage.get time to market advantage.
Cores are designed to be generic andCores are designed to be generic and
reusable with configurability.reusable with configurability.
Need For Core customization.Need For Core customization.
Core evaluation for PowerCore evaluation for Power
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AgendaAgenda
MotivationMotivation
Introduction To VLSI DesignIntroduction To VLSI Design
Sources Of Power DissipationSources Of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionConclusion
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52. VLSI Signal Processing BuildingVLSI Signal Processing Building
BlocksBlocks
AdderAdder
MultiplierMultiplier
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55. Dynamic Range DeterminationDynamic Range Determination
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Add to Match the
required word length
Add to Match the
required word length
Dynamic range
determination
Dynamic range
determination
Dynamic range
determination
Dynamic range
determination
Large eff. Dynamic
range
Large eff. Dynamic
range
Addition on the eff.
bit
Addition on the eff.
bit
56. Glitching Power MinimizationGlitching Power Minimization
By replacing some existing gates withBy replacing some existing gates with
functionally equivalent ones that can befunctionally equivalent ones that can be
“frozen” by asserting a control signal.“frozen” by asserting a control signal.
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57. Main Functions in MultiplierMain Functions in Multiplier
Partial products generationPartial products generation
Partial product compressionPartial product compression
Partial product additionPartial product addition
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AgendaAgenda
MotivationMotivation
Introduction To VLSI DesignIntroduction To VLSI Design
Sources Of Power DissipationSources Of Power Dissipation
Low Power Design MethodologiesLow Power Design Methodologies
Low Power Soc DesignsLow Power Soc Designs
Low Power Multiplier DesignLow Power Multiplier Design
Design of Low Power MACDesign of Low Power MAC
ConclusionConclusion
12.03.2012
63. Design of Low Power MACDesign of Low Power MAC
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64. Input Image And Its Pixel ValuesInput Image And Its Pixel Values
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1/9 1/9 1/9
1/9 1/9 1/9
1/9 1/9 1/9
Input image of the filterInput image of the filter
Pixel value matrix of input image
65. Output Image And Its Pixel ValuesOutput Image And Its Pixel Values
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Output image of the filter
Pixel value matrix of output image
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ConclusionsConclusions
State of art VLSI chip ( SOC) containsState of art VLSI chip ( SOC) contains
hundres of million transistorshundres of million transistors
So it dissipates lot of powerSo it dissipates lot of power
To keep the packaging cost low….lowTo keep the packaging cost low….low
power technologypower technology
For portable devices low power ICs …aFor portable devices low power ICs …a
mustmust
There are different low power designThere are different low power design
techniquestechniques
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ReferencesReferences
Principles of CMOS VLSI Design---Neil westePrinciples of CMOS VLSI Design---Neil weste
and K.Eshraghianand K.Eshraghian
ASICs -------M.J.SmithASICs -------M.J.Smith
CMOS Design, layout and simulationCMOS Design, layout and simulation
R.Jacob BakerR.Jacob Baker
Introduction to VLSI circuits & systemsIntroduction to VLSI circuits & systems
-----John Uvemura-----John Uvemura
Digital systems design using VHDL----Jr.RothDigital systems design using VHDL----Jr.Roth
VHDL Primer----Jayaram BhaskarVHDL Primer----Jayaram Bhaskar
Low-Power CMOS VLSI Circuit Design------Low-Power CMOS VLSI Circuit Design------
Kaushik Roy, Sharat PrasadKaushik Roy, Sharat Prasad
12.03.2012
As more and more applications are getting added in a small portable devices working on battery, it is becoming important to put in conscience effort to reduce power so that the device can operate for longer time for the same battery power. As the innovations to increase the battery life has yielded the advantage, there is a three fold increase in the complexity of the Systems and also number of applications being run on these devices has increased in many folds. This makes all designers to be aware of the low power methodology at all stages of design cycle. Today's SoCs are of very high complexity of the order of multi million gates which puts a mandatory need to go an IP cores integration way to get the time to market advantage. So it has become the rule of the game to use the IP cores customized and integrated to get the complete SoC. As ready cores are used in SOC design, these cores has to be evaluated for power considerations to achieve the set power target for the SOC. We shall discuss the evaluation consideration for a blue tooth core and results of evaluation.