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VHDL PROJECT
LIST
E2MATRIX RESEARCH LAB
OPP PHAGWARA BUS STAND, BACKSIDE AXIS BANK,
PARMAR COMPLEX, PHAGWARA PUNJAB (INDIA).
CONTACT : +91 9041262727
WEB: WWW.E2MATRIX.COM -- EMAIL:
SUPPORT@E2MATRIX.COM
E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
PROJECT LIST
• Turbo Encoder For LTE Process
• Reconfigurable Coprocessor for Redundant Radix-4 Arithmetic
• 4 BIT SFQ Multiplier
• New Adaptive Weight Algorithm For Salt And Pepper Noise Removal
• Seal Encryption On FPGA, GPU AND Multi-Core Processors
• Lossless Implementation Of Daubechies 8-Tap Wavelet Transform
• Design of Control Area Network Protocol
• Asynchronous Transfer Mode Knockout SwitchE2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
PROJECT LIST
• LFSR Based Test Generator Synthesis
• Rotation-Based Bist With Self-Feedback
• Operation Improvement of Indoor Robot
• Low-Power And Area-Efficient Carry Select Adder
• Soft-Error Tolerance and Mitigation
• Design of 16 BIT QPSK
• Design of 64-Bit QAM
• Custom Floating-Point Unit GenerationE2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
PROJECT LIST
• Design of JPEG Compression Standard
• A Framework for Correction of Multi-Bit Soft Errors
• Spurious-Power Suppression Technique for Multimedia/DSP
Applications
• Design of A Bus Bridge Between AHB and OCP
• General Linear Feedback Shift Register
• Design of 16 Point Radix-4 FFT Algorithm
• Design and Implementation of Efficient Systolic Array
E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
PROJECT LIST
• Exploitation of Narrow-Width Values
• Design And Synthesis Of Programmable Logic Block
• Fault Secure Encoder
• Pipeline VLSI Architecture
• 3-D Lifting-based Discrete Wavelet Transform
• Shift-Register-Based Data Transposition
• Design and Implementation of High Speed DDR SDRAM Controller
• Design Of Parallel Multiplier Based On RADIX-2 Modified Booth
Algorithm
E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
PROJECT LIST
• Cyclic Redundancy Checker Generator
• Multilayer AHB Bus Matrix
• Novel Area-Efficient FPGA Architectures
• Implementation of FFT/IFFT Blocks for OFDM
• Behavioral Synthesis of Asynchronous Circuits
• Implementation Of Guessing Game
• Very Fast and Low Power Carry Select Adder CircuitE2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
• Short Range MIMO Communications
• VLSI Progressive Coding for Wavelet-based Image Compression
• Self-Immunity Technique to Improve Register File Integrity against
Soft Errors
• Universal Asynchronous Receiver Transmitter
• Design Of 32 Bit RISC Processor
• Multiplication Acceleration Through Twin Precision
• Task Migration In Mesh NOCS
• AMBA-Advanced High Performance Bus IP Block
• Design of On-Chip Bus with OCP Interface
E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
THE END
E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727

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Vhdl Project List - Verilog Projects

  • 1. VHDL PROJECT LIST E2MATRIX RESEARCH LAB OPP PHAGWARA BUS STAND, BACKSIDE AXIS BANK, PARMAR COMPLEX, PHAGWARA PUNJAB (INDIA). CONTACT : +91 9041262727 WEB: WWW.E2MATRIX.COM -- EMAIL: SUPPORT@E2MATRIX.COM E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 2. PROJECT LIST • Turbo Encoder For LTE Process • Reconfigurable Coprocessor for Redundant Radix-4 Arithmetic • 4 BIT SFQ Multiplier • New Adaptive Weight Algorithm For Salt And Pepper Noise Removal • Seal Encryption On FPGA, GPU AND Multi-Core Processors • Lossless Implementation Of Daubechies 8-Tap Wavelet Transform • Design of Control Area Network Protocol • Asynchronous Transfer Mode Knockout SwitchE2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 3. PROJECT LIST • LFSR Based Test Generator Synthesis • Rotation-Based Bist With Self-Feedback • Operation Improvement of Indoor Robot • Low-Power And Area-Efficient Carry Select Adder • Soft-Error Tolerance and Mitigation • Design of 16 BIT QPSK • Design of 64-Bit QAM • Custom Floating-Point Unit GenerationE2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 4. PROJECT LIST • Design of JPEG Compression Standard • A Framework for Correction of Multi-Bit Soft Errors • Spurious-Power Suppression Technique for Multimedia/DSP Applications • Design of A Bus Bridge Between AHB and OCP • General Linear Feedback Shift Register • Design of 16 Point Radix-4 FFT Algorithm • Design and Implementation of Efficient Systolic Array E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 5. PROJECT LIST • Exploitation of Narrow-Width Values • Design And Synthesis Of Programmable Logic Block • Fault Secure Encoder • Pipeline VLSI Architecture • 3-D Lifting-based Discrete Wavelet Transform • Shift-Register-Based Data Transposition • Design and Implementation of High Speed DDR SDRAM Controller • Design Of Parallel Multiplier Based On RADIX-2 Modified Booth Algorithm E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 6. PROJECT LIST • Cyclic Redundancy Checker Generator • Multilayer AHB Bus Matrix • Novel Area-Efficient FPGA Architectures • Implementation of FFT/IFFT Blocks for OFDM • Behavioral Synthesis of Asynchronous Circuits • Implementation Of Guessing Game • Very Fast and Low Power Carry Select Adder CircuitE2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 7. • Short Range MIMO Communications • VLSI Progressive Coding for Wavelet-based Image Compression • Self-Immunity Technique to Improve Register File Integrity against Soft Errors • Universal Asynchronous Receiver Transmitter • Design Of 32 Bit RISC Processor • Multiplication Acceleration Through Twin Precision • Task Migration In Mesh NOCS • AMBA-Advanced High Performance Bus IP Block • Design of On-Chip Bus with OCP Interface E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727
  • 8. THE END E2MATRIX RESEARCH LAB, CONTACT : +91 9041262727