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Air Traffic Control on  a SIMD COTS System Stewart Reddaway World Scape  Inc, Marlton, NJ Will Meilander  (retired) Johnnie Baker Justin Kidman Kent State University, Dept Computer Science, OH IPDPS Denver, April 2005
Abstract ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Introduction
A previous analysis at Kent State (1) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],Static scheduling is key to guaranteed real-time database operation
A previous analysis at Kent State (2) Statically Scheduled Solution Time Task    p  j  c  d  Proc time 1. Report Correlation & Tracking  .5  15  .09  .10  1.44 2. Cockpit Display 750 /sec)    1.0  120  .09  .20  .72 3. Controller Display Update (7500/sec) 1.0  12  .09  .30  .72 4. Aperiodic Requests (200 /sec)    1.0  250  .05  .36  .4 5. Automatic Voice Advisory (600 /sec)  4.0  75  .18  .78  .36 6. Terrain Avoidance    8.0  40  .32  2.93  .32 7. Conflict Detection & Resolution    8.0  60  .36  3.97  .36 8. Final Approach (100 runways)    8.0  33  .2  6 .81  .2 Summation of Tasks in a period P  4.52 The system period P (in which all tasks must be completed) is 8 seconds p the task period time, determines the next task release time ri + 1 = ri + p j is the execution time, in microseconds, for each jobset in a task, c is the cost for each task for the worst-case set of jobsets, d the deadline time for each task ri + c + .01 (includes 10 ms interrupt proc. per task)
Modern SIMD Chips ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Generic core of the SIMD chips   In multi-chip systems, each chip runs  its own program.  Global SIMD achieved by same code in  each chip, and software synchronization Cycle estimates are for highly optimized  assembly code. (Less optimized code can  still comfortably achieve real-time)
SIMD boards ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Analysis for a modern SIMD system ,[object Object],[object Object],[object Object],[object Object],[object Object]
Reduction and broadcast operations (1) ,[object Object],[object Object],[object Object],[object Object],[object Object]
Reduction and broadcast operations (2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Reduction and broadcast operations (3) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Reduction and broadcast operations (4) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Reduction and broadcast operations (5) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (1) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (2)  (omit?) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (3)  (omit?) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (4)  (omit?) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (5) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (6) ,[object Object],[object Object],[object Object],[object Object],[object Object]
Report Correlation & Tracking (7) ,[object Object],[object Object],[object Object]
Conflict Detection & Resolution (1) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Conflict Detection & Resolution (2)
Conflict Detection & Resolution (3) ,[object Object],[object Object],[object Object],[object Object]
Conflict Detection & Resolution (3) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Cockpit Display ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Controller Display Update   ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Terrain Avoidance (1)   ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Terrain Avoidance (2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Sporadic (Aperiodic) requests ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Automatic Voice Advisory (AVA)   ,[object Object],[object Object],[object Object],[object Object]
Final Approach (Runways)   ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Speedup with Sorting (1) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Speedup with Sorting (2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Speedup with Sorting (3) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Summary Table Two CSX600 chips will do all the processing
A staged plan of work ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
References ,[object Object],[object Object],[object Object]
Flight Plan/Track Conformance

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Atc On An Simd Cots System Wmpp05

  • 1. Air Traffic Control on a SIMD COTS System Stewart Reddaway World Scape Inc, Marlton, NJ Will Meilander (retired) Johnnie Baker Justin Kidman Kent State University, Dept Computer Science, OH IPDPS Denver, April 2005
  • 2.
  • 4.
  • 5. A previous analysis at Kent State (2) Statically Scheduled Solution Time Task p j c d Proc time 1. Report Correlation & Tracking .5 15 .09 .10 1.44 2. Cockpit Display 750 /sec) 1.0 120 .09 .20 .72 3. Controller Display Update (7500/sec) 1.0 12 .09 .30 .72 4. Aperiodic Requests (200 /sec) 1.0 250 .05 .36 .4 5. Automatic Voice Advisory (600 /sec) 4.0 75 .18 .78 .36 6. Terrain Avoidance 8.0 40 .32 2.93 .32 7. Conflict Detection & Resolution 8.0 60 .36 3.97 .36 8. Final Approach (100 runways) 8.0 33 .2 6 .81 .2 Summation of Tasks in a period P 4.52 The system period P (in which all tasks must be completed) is 8 seconds p the task period time, determines the next task release time ri + 1 = ri + p j is the execution time, in microseconds, for each jobset in a task, c is the cost for each task for the worst-case set of jobsets, d the deadline time for each task ri + c + .01 (includes 10 ms interrupt proc. per task)
  • 6.
  • 7. Generic core of the SIMD chips In multi-chip systems, each chip runs its own program. Global SIMD achieved by same code in each chip, and software synchronization Cycle estimates are for highly optimized assembly code. (Less optimized code can still comfortably achieve real-time)
  • 8.
  • 9.
  • 10.
  • 11.
  • 12.
  • 13.
  • 14.
  • 15.
  • 16.
  • 17.
  • 18.
  • 19.
  • 20.
  • 21.
  • 22.
  • 23. Conflict Detection & Resolution (2)
  • 24.
  • 25.
  • 26.
  • 27.
  • 28.
  • 29.
  • 30.
  • 31.
  • 32.
  • 33.
  • 34.
  • 35.
  • 36. Summary Table Two CSX600 chips will do all the processing
  • 37.
  • 38.