The document discusses chip design as a metaphor for an urban system. It describes chip design as involving different levels of abstraction, from transistors to logic gates to larger functional units. Different teams work at each level of abstraction, with tools to check that one level is consistent with the whole design. The document suggests chip design handles complexity through hierarchical abstraction levels and verification tools, while noting key differences from urban planning such as dedicated interconnect wiring and lack of opinions from transistors.