Mark Zuckerberg has funded a project called Aquila, which is an unmanned solar-powered airplane that can stay in the air for months at a time. Its purpose is to beam internet connectivity from the sky. It has the wingspan of a Boeing 737 but weighs less than a car. Embedded blocks such as memory, processors and DSP units are commonly used in FPGAs to improve performance, power efficiency and resource utilization for the target application. However, unused blocks result in silicon waste.

1. Shivananda
(Shivoo)
R
Koteshwar
Teacher
Facebook:
shivoo.koteshwar
MSRIT, Faculty Development Program,
Bangalore
Jul 2015

2. ! Solar-­‐powered
Internet
plane
funded
by
Mark
Zuckerberg
(Facebook)
! Aquila
is
a
solar
powered
unmanned
plane
that
beams
down
internet
connectivity
from
the
sky
! It
has
the
wingspan
of
a
Boeing
737,
but
weighs
less
than
a
car
and
can
stay
in
the
air
for
months
at
a
time.

3. ! To
maintain/increase
the
impact
of
your
product
and
solution,
its
important
to
take
care
of
the
eco
system
in
which
your
product/solution
exists
! Similarly,
you
need
to
understand
the
eco
system
of
FPGA
and
try
to
enhance
the
elements
! Embedded
Processor,
Memory,
Interconnects,
Technology
constraints,
Software,
Verification,
Testing,
Platform
…

6. ! FPGAs
are
being
used
to
augment,
and
sometimes
even
replace,
general-­‐purpose
processors
(GPPs)
or
DSPs,
thanks
to
their
vastly
larger
gate
counts,
specialized
DSP
units,
embedded
processors
and
high-­‐speed
serial
link
! Their
flexibility
and
computational
performance
per
watt
also
make
them
an
attractive
choice
for
systems
with
tough
size,
weight
and
power
(SWaP)
constraints

7. 65 nm
90 nm
130 nm
150 nm
180 nm
45 nm
32 nm
22 nm
1999 2001 2003 2005 2007 2009 2011 2013 2015 2017
8 nm
Mature
FPGA Product
Technology
Developing
FPGA Product
Technology
Future
Process Technology
• “Traditional Scaling” is starting to be
effected by the fundamental material
limits of the planar CMOS process
• “Equivalent Scaling” or the
assimilation of new materials,
structures and functional integration
will drive continued scaling

8. ! Performance
of
FPGAs
as
a
compute
platform
exceed
conventional
processors
in
all
three
performance
vectors;
i/o
bandwidth,
memory
bandwidth
and
computation
! Implementing
an
effective
programming
model
is
the
main
issue
the
industry
is
working
hard
to
solve
! Power
and
Reliability
Challenges

9. ! Embedded
Processor
! Embedded
Memory
! Embedded
Functions
–
Multiplier,
DSP

10. DeviceComplexityandPerformance
• FPGA Fabric
• Block RAM
• Embedded Registers
and Multipliers
• Clock Management
• Multi-standard
Programmable IO
• FPGA Fabric
• Block RAM
• FPGA Fabric
Domain-optimized
System Logic
• FPGA Fabric
• Block RAM
• Embedded Registers
and Multipliers
• Clock Management
• Multi-standard
Programmable IO
• Embedded
Microprocessor
• Multigigabit
Transceivers
• FPGA Fabric
• Block RAM
• Embedded Registers
and Multipliers
• Clock Management
• Multi-standard
Programmable IO
• Embedded
Microprocessor
• Multigigabit
Transceivers
• Embedded DSP-
optimized Multiplers
• Embedded Ethernet
MACs
Glue
Logic
Block
Logic
Platform
Logic
System
Logic

17. ! Most
integrate
an
ARM-­‐based
hard
processor
system
(HPS)
consisting
of
processor,
peripherals,
and
memory
interfaces
with
the
FPGA
fabric
using
a
high-­‐bandwidth
interconnect
backbone.
! It
combines
the
performance
and
power
savings
of
hard
intellectual
property
(IP)
with
the
flexibility
of
programmable
logic.
! These
user-­‐customizable
ARM-­‐based
SoCs
are
ideal
for:
! Reducing
system
power,
cost,
and
board
size
by
integrating
discrete
processors
and
digital
signal
processing
(DSP)
functions
into
a
single
FPGA
! Improving
system
performance
via
high-­‐bandwidth
interconnect
between
the
processor
and
the
FPGA
! Differentiating
your
end
product
by
customizing
in
both
hardware
and
software
! Developing
ARM-­‐compatible
software
with
unmatched
target
visibility,
control,
and
productivity

18. ! Improved
system
performance
through
a
higher
hard
processor
system
(HPS)
to
FPGA
bandwidth
interconnect,
hardware
acceleration,
and
increased
memory
performance
! Increased
reliability
through
error
correction
code
(ECC)
and
memory
protection
that
help
protect
systems
against
potential
hardware
or
software
errors
and
warm/cold
CPU
reset
that
initiates
without
affecting
or
reprogramming
the
FPGA
! More
flexibility
through
hardware
differentiation,
system
boot
and
configuration
options,
and
multiple
hardened
memory
controllers
! Lower
system
cost
through
single-­‐chip
integration,
integrated
PCIe®
controller,
and
no
power
off
sequencing
! Increased
productivity
through
advanced
debugging
tool
with
target
visibility,
control,
and
productivity
! Path
for
the
future
through
our
roadmap
for
high-­‐end,
mid-­‐range,
and
low-­‐end
applications,
forward
migration
of
software,
and
products
with
average
life
cycles
of
15
years
or
more

20. ! With
soft
processor,
the
designer
has
the
luxury
of
a
different
approach.
They
can
now
start
with
a
processor
core
and
build
the
peripheral
set
to
meet
their
exact
requirements
! Silicon
waste
is
reduced
to
zero
since
the
designer
will
only
implement
what
they
need
! Software
design
complexity
is
reduced
because
no
code
need
ever
be
written
to
disable
unwanted
processor
functionality
! The
creation
of
unusual
processor
configurations,
which
can
be
changed
at
any
time
to
suit
changes
in
the
specification,
is
reduced
to
a
simple
task

21. ! Embedded
Memory
"
FPGA
with
on-­‐chip
storage
! Challenge:
! When
embedding
memory
arrays
onto
an
FPGA
is
to
provide
enough
interconnect
between
the
memory
arrays
and
the
logic
resources
! Since
memory
access
time
is
often
the
performance
bottleneck
in
many
systems,
it
is
crucial
that
the
memory/logic
interface
provides
a
flexible
high-­‐speed
link
between
logic
and
memory
! If
the
interface
is
not
flexible
enough,
many
circuits
will
be
unroutable,
while
if
it
is
too
flexible,
it
will
be
slower
and
consume
more
chip
area
than
is
necessary
! Alternate
use
! Using
EMB
(Embedded
Memory
Block)
to
implement
logic
functions
when
they
are
not
used
as
a
on-­‐chip
memory

22. ! Embedded
blocks
are
extensively
used
in
FPGAs,
serving
to
improve
delay,
power
and
area
if
utilized
by
the
application,
but
waste
area
and
power
if
unused.
! Early
embedded
blocks
included
fast
carry
chains,
memories,
phase
locked
loops,
delay
locked
loops,
boundary
scan
testing
and
multipliers.
! More
recently,
multipliers
have
been
replaced
by
digital
signal
processing
(DSP)
blocks
which
add
support
for
logical
operations,
shifting,
addition,
multiply-­‐add,
complex
multiplication
etc.
! Complex
primitive
functions
(Filters,
Transforms
and
Floating
point)
can
be
implemented
because
of
advanced
features
like
Multiple
Wordlength
and
cascadability

24. All pictures are from flickr.com
with either no copyright or wit
common creatives

25. ! http://www.ee.usyd.edu.au/people/philip.leong/UserFiles/File/papers/
rtfpga_delta08.pdf
! http://www.rtcmagazine.com/articles/view/101079
! https://lis.ei.tum.de/fpl2014/papers/w1a_02.pdf
! https://www.ll.mit.edu/HPEC/agendas/proc09/Day1/
F1_1025_Manohar_presentation.pdf
! http://fortune.com/2015/07/30/facebook-­‐solar-­‐power-­‐plane-­‐aquila/
! http://www.ziti.uni-­‐heidelberg.de/ziti/uploads/ce_group/seminar/2013-­‐
Stephanie-­‐Rupprich-­‐presentation.pdf
! http://www.ziti.uni-­‐heidelberg.de/ziti/uploads/ce_group/seminar/2013-­‐
Stephanie-­‐Rupprich-­‐presentation.pdf
! https://www.altera.com/products/soc/overview.html
! http://perso.uclouvain.be/fstandae/PUBLIS/110.pdf
! http://www.design-­‐reuse.com/articles/13212/fpga-­‐prototyping-­‐as-­‐a-­‐
verification-­‐methodology.html
! http://www.xilinx.com/support/documentation/white_papers/wp360.pdf
! http://semiengineering.com/current-­‐generation-­‐fpgas-­‐pose-­‐power-­‐
reliability-­‐challenges/

26. Visit my slideshare to
view all these
presentations

27. Shivananda
(Shivoo)
R
Koteshwar
Director,
Mediatek
shivoo.koteshwar@gmail.com/
Facebook:
shivoo.koteshwar
BLOG:
http://shivookoteshwar.wordpress.com
SLIDESHARE:
www.slideshare.net/shivoo.koteshwar