1. NATIONAL COLLEGE OF SCIENCE AND TECHNOLOGY
Amafel Bldg. Aguinaldo Highway Dasmariñas City, Cavite
EXPERIMENT # 2
Class B Push-Pull Power Amplifier
Cauan, Sarah Krystelle P. October 11, 2011
Signal Spectra and Signal Processing/ BSECE 41A1 Score:
Engr. Grace Ramones
Instructor
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2. Objectives:
1. Determine the dc load line and locate the operating point (Q-point) on the dc load line for a
class B push-pull amplifier.
2. Determine the ac load line for a class B push-pull amplifier.
3. Observe crossover distortion of the output waveshape and learn how to estimate it in a
class b push-pull amplifier.
4. Determine the maximum ac peak-to-peak output voltage swing before peak clipping occurs
and compare the measured value with the expected value for a class B push-pull amplifier.
5. Compare the maximum undistorted ac peak-to-peak output voltage swing for a class B
amplifier with the maximum for a class A amplifier.
6. Measure the large-signal voltage gain of a class B push-pull amplifier.
7. Measure the maximum undistorted output power for a class B push-pull amplifier.
8. Determine the amplifier efficiency of a class B push-pull amplifier.
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3. Sample Computation:
Step 7 – Computation of voltage gain
Step 9 Output power
Step 10 Input power
Step 11 Power efficiency
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4. Data Sheet:
Materials:
One digital multimeter
One function generator
One dual-trace oscilloscope
One dc power supply
One 2N3904 npn bipolar junction transistor
One 2N3906 pnp bipolar junction transistor
Two 1N4001 diodes
Capacitors: two 10 µF, one 100 µF
Resistors: one 100 Ω, two 5 kΩ
Theory:
A power amplifier is a large-signal amplifier in the final stage of a communications transmitter that
provides power to the to the antenna or in the final stage of a receiver that drives the speaker.
When an amplifier is biased at cutoff so that it operates in a linear region of the collector
characteristic curves for one-half cycle of the input sine wave (180o), it is classified as a class B
amplifier. In order to produce a complete reproduction of the input waveshape, a matched
complementary pair of transistors in a push-pull configuration, as shown in Figure 15-1,is
necessary. In a class B push-pull amplifier, each transistor conducts during opposite halves of the
input cycle. When the input is zero, both transistor conducts during opposite halves of the input
cycle. When the input is zero, both transistors are at cutoff (IC = 0). This makes a class B amplifier
much more efficient than a class Q amplifier, in which the transistor conducts for the entire input
cycle (360o) . the man disadvantage of class B amplifier is that it is not as linear as class A amplifier.
Class b amplifiers are used in high-power applications where a linear amplifier is required, such as
high-power audio amplifiers or linear power amplifiers in high-power transmitters with low-level
Am or SSB modulation.
Figure 15-1 Class B Push-Pull Amplifier with Crossover Distortion
XSC1
Ext T rig
+
R1 V1
_
XFG1 5kΩ A B
20 V + _ + _
Q1
C1
10µF
2N3904
C3
Q2
C2 100µF
R3
100Ω
10µF R2
5kΩ 2N3906
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5. In a class B push-pull emitter follower configuration in Figure 15-1, both transistors are biased at
cutoff. When a transistor is biased at cutoff, the input signal must exceed the base-emitter junction
potential (VBE) before it can conduct. Therefore, in the push-pull configuration in figure 15-1 there
is a time interval during the input transition from positive to negative or negative to positive when
the transistors are not conducting, resulting in what is known as crossover distortion. The dc
biasing network in figure 15-2 will eliminate crossover distortion but biasing the transistors
slightly above cutoff. Also, when the characteristics of the diodes (D1 and D2) are matched to the
transistor characteristics, a stable dc bias is maintained over a wide temperature range.
Figure 15-2 Class B Push-Pull Amplifier – DC Analysis
XMM1
+ U3
0.000 A DC 1e-009Ohm
-
R1
5kΩ
Q1
V1
D1 2N3904 20 V
1N4001GP
D2
1N4001GP Q2
R2 2N3906
5kΩ
The dc load line for each transistor in figure 15-2 is a vertical line crossing the horizontal axis at VCE
= VCC/2. The load line is vertical because there is no dc resistance n a collector or emitter circuit
(slope of the dc load line is the inverse of the dc collector and emitter resistance). The Q-point on
the dc load line for each transistor is close to cutoff (Ic = 0). The dc collector-emitter voltages for
the two transistors in Figure 15-2 can be determined from the value of VE using the equations
VCE1 = VCC – VE
and
VCE2 = VE – 0 = VE
The complete class B push-pull amplifier is shown in Figure 15-2. Capacitors C1, C2, and C3 are
coupling capacitors to prevent the transistor dc bias voltages being affected by the input circuit or
the load circuit. The ac load line for each transistor should have a slope of 1/RL (the ac equivalent
resistance in the emitter circuit is RL), cross the horizontal axis at VCC/2, and cross the vertical axis
at IC (sat) = VCC/2RL. The Q-point on the ac load line should be close to cutoff (Ic = 0) for each
transistor. When one of the transistors is conducting, its operating point (Q-point) moves up the ac
load line. The voltage swing of the conducting transistor can go all the way from cutoff to
saturation. On the alternate half cycle the other transistor can go all the way from cutoff to
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6. saturation. Therefore, the maximum peak-to-peak output voltage is equal to 2(VCC/2) = vCC. The
amplifier voltage gain is measured by dividing the ac peak-to-peak output voltage (Vo) by the ac
peak-to-peak input voltage (Vin). Because the push-pull amplifier in figure 15-3 is an emitter
follower configuration, the voltage gain should be close to unity (1). This is not a problem for large-
signal amplifiers because they are used primarily for power amplification rather than voltage
amplification.
Figure 15-3 Class B Push-Pull Amplifier
XFG1
XSC1
V1
20 V Ext T rig
+
R1 _
5kΩ A B
+ _ + _
Q1
C2
10µF D1 2N3904
1N4001GP
C3
D2
1N4001GP Q2 100µF
C1
R3
10µF 100Ω
R2 2N3906
5kΩ
The amplifier output power (PO) is calculated as follows:
The percent efficiency (ŋ) of a large-signal amplifier is equal to the maximum output power (PO)
divided by the power supplied by the source (PS) times 100%. Therefore,
where Ps = (VCC)(ICC). The current at the source (IS) is determined from
where = VCC/2RL and IC(AVG) is the average value of the half-wave collector current.
Note: IRB1 is normally much less than IC(AVG) and can be neglected.
Procedure:
Step 1 Open circuit file FIG 15-1. Bring down the function generator enlargement. Make
sure that the following settings are selected: Time base (Scale = 200 us/Div, Xpos =
0, Y/T), Ch A (Scale =2 V/Div, Ypos = 0, AC), Ch B (Scale = 2 V/Div, Ypos = 0, AC),
Trigger (Pos edge, Level = 0, Auto). Run the simulation to four full screen displays,
then pause the simulation. You are plotting the amplifier input (red) and the output
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7. (blue) on the oscilloscope. Notice the crossover distortion of the output waveshape
(blue curve). Draw the waveshape in the space provided and note the crossover
distortion.
Crossover Distortion
Step 2 Open circuit file FIG 15-2. Bring down the multimeter enlargement and make sure
that V and dc ( ) are selected. Run the simulation and record the dc base1 voltage
(VB1). Move the multimeter positive lead to node VB2, then node VE, then node A and
run the simulation for each reading and record the dc voltages. Also record the dc
collector current (IC)
VB1 = 10.496 V VB2 = 9.504 V VE = 10.017 V
VA =10V IC = 0 A
Step 3 Based on the voltages recorded in Step 2, calculate the dc collector-emitter voltage
(VCE) for both transistors.
VCE1 = VCC – VE = 20V – 10.017 V = 9.983 V
VCE2 = VE – 0 = VE = 10.017 V
Step 4 Draw the dc load line on the graph and locate the operating point (Q-point) on the
dc load line based on the data in Step 2 and the calculations in Step 3.
IC(sat)
100
AC load line
75
50
25 Q-point
DC load line
0 5 10 15 20 VCE(V)
Step 5 Open circuit file FIG 15-3. Bring down the function generator enlargement. Make
sure that the following settings are selected: Sine wave, freq = 1 kHz, Ampl = 4 V,
Offset = 0 V. Bring down the oscilloscope enlargement. Make sure that the following
settings are selected Time base (Scale = 200 us/Div, Xpos = 0, Y/T), Ch A (Scale = 2
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8. V/Div, Ypos = 0, AC), Ch B (Scale = 2 V/Div, Ypos = 0, AC), trigger (Pos edge, Level
= 0, Auto). Based on the values of VCC and RL, draw the ac load line on the graph in
step 4.
Questions: Where was the operating point (Q-point) on the dc load line? Where was the operating
point on the ac load line? Explain.
The operating point on the dc load line is at the cutoff where I C = 0. While the
operating points for each transistors in the ac load line is also at the cutoff.
What was the relationship between the dc load line and the ac load line? Explain.
The dc load line is vertical however the ac load line has a slope of 0.01. The dc and
the ac load line have same operating point which is located at the cutoff.
Step 6 Run the simulation. Notice that there is hardly any crossover distortion of the
output waveshape. Keep increasing the input signal voltage until output peak
distortion occurs. Then reduce the input signal level slightly until there is no longer
any distortion. Pause the analysis and record the maximum undistorted ac peak-to-
peak output voltage (VO) and the ac peak-to-peak input voltage (Vin). Adjust the
oscilloscope settings as needed.
VO = 10.184 V for one transistor 20.368 V for two transistors
Vin = 10.2 V
Questions: What caused the crossover distortion in Step 1? What does the addition of diodes D1 and
D2 accomplish?
There is crossover distortion in Step 1 because when the transistors are not
conducting, there is a time interval during the input transition from positive to
negative or vise versa. The addition of D1 and D2 minimize the distortion because
there is a stable dc biasing is maintained.
How did the maximum undistorted peak-to-peak output voltage for the class B amplifier, measured
in Step 6, compare with the maximum undistorted peak-to-peak output voltage for the class A
amplifier, measured in Experiment 14, Step 9?
The maximum undistorted peak-to-peak output voltage for the class B amplifier
measured in Step 6 is 18 V more than the maximum undistorted peak-to-peak
output voltage for the class A amplifier measured in the previous experiment.
Step 7 Based on the voltages measured in Step 6, calculate the voltage gain of the amplifier.
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9. Questions: How did the measured amplifier voltage gain compare with the expected value for a
class B push-pull emitter circuit?
The measured and expected value of the amplifier voltage gain have a difference of
0.002 therefore, the measured AV is almost what expected value is.
Step 8 Based on the ac load line and Q-point located on the graph in Step 4, estimate what
the maximum ac peak-to-peak output voltage (Vo) should be before output clipping
occurs. Record your answer.
Vo = 10V
Question: How did the maximum undistorted peak-to-peak output voltage measured in step 6
compare with the expected maximum estimated in Step 8?
The difference is 0.184 V or 1.81% difference.
Step 9 Based on the maximum undistorted ac peak-to-peak output voltage measured in
Step 6, calculate the maximum undistorted output power (PO) to the load (RL).
Step 10 Based on the supply voltage (VCC) and the average collector current (IC(AVG)),
calculate the power supplied by the dc voltage source (PS).
Step 11 Based on the power supplied by the dc voltage source (PS) and the maximum
undistorted output power (PO) calculated in Step 9, calculate the efficiency (ŋ) of the
amplifier.
Questions: How did the efficiency of this class B push-pull amplifier compare with the efficiency of
the class A amplifier in Experiment 14?
The efficiency of this class B push-pull amplifier is much higher than the efficiency of the class A
amplifier.
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10. Conclusion
After performing the experiment about class B, I conclude that class B is much different
from class A. Class B conducts at half cycle unlike class A. To produce full cycle wave class B uses a
matched complementary pairs of transistors in a push-pull configuration. Moreover, the quiescent
point of the class B amplifier is located at the cutoff of each transistor because the value of the
collector current is zero that is why the dc load line appears as a vertical line. The ac load line
crosses the saturation current and the half of the supply voltage. Its slope is the inverse of the load
resistance.
In addition, when the input voltage exceeds the maximum ac peak-to-peak output voltage
swing, a crossover distortion will occur in the output signal. Furthermore, a crossover distortion
occurs because there are time intervals when the transistors are not conducting. To avoid this,
diodes are connected to the network to maintain a stable dc bias. The voltage gain of class B push-
pull amplifier is close to the unity gain. Lastly, the power efficiency of class B is much higher than
with class A amplifier.
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