Accident reporting system using mems

ABSTRACT
In highly populated Countries like India, everyday people lose their lives because of
accidents and poor emergency facilities. These lives could have been saved if medical facilities
are provided at the right time. This paper implies system which is a solution to this drawback.
Acceleratometer sensor can be used in car security system to sense vibrations in vehicle and
GPS to give location of vehicle, so dangerous driving can be detected. When accident occurs,
Acceleratometer will detect signal and will send signal to AVR controller, microcontroller
will enable airbag to blow and message with accident location is sent to preprogrammed
numbers such as ambulance, police station, etc via GSM.
MEMS controlled accident reporting system is a MEMS-operated unobtrusive assistive
technology, which can potentially avoid losing lives of people with severe with eﬀective access
by sending message to the nearby hospital, police station and relatives. When the MEMS
values goes out of a certain range, it leads to the unstability of the vehicle.the unstable
condition leads to message sending to the nearby contacts.
In this system Acceleratometer and GPS tracking system are used for accident detec-
tion. When accident occurs, this system sends short message to mobile number via GSM
modem. Message will give longitude and latitude values. From these values location of
accident can be determined.
i

Contents
1 INTRODUCTION 1
2 BLOCK DIAGRAM 2
3 HARDWARE DESCRIPTION 4
3.1 ARM PROCESSOR LPC2148 . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1.2 Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1.3 Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1.4 Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.5 On-Chip Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.6 On-Chip Static RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.7 General Purpose Parallel I/O . . . . . . . . . . . . . . . . . . . . . . 8
3.1.8 10 Bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.9 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.10 UARTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1.11 USB 2.0 Device Controller . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 MEM Sensor ADXL 335 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.2 Working principle of ADXL335 . . . . . . . . . . . . . . . . . . . . . 11
3.2.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 Liquid Crystal Display (LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3.1 LCD Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.2 LCD Command Codes . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.4 Global System for Mobile Communication (GSM) . . . . . . . . . . . . . . . 15
3.4.1 Subscriber Identity Module (SIM) . . . . . . . . . . . . . . . . . . . . 16
3.4.2 GSM Modems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.5 Global Positioning System (GPS) . . . . . . . . . . . . . . . . . . . . . . . . 16
3.5.1 Working of GPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.5.2 GPS Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.5.3 Frequencies used by GPS . . . . . . . . . . . . . . . . . . . . . . . . . 18
4 SYSTEM SOFTWARE 19
4.1 Keil vision 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Philips LPC2000 ﬂash utility V2.2.3 . . . . . . . . . . . . . . . . . . . . . . . 19
ii

ACCIDENT REPORTING SYSTEM USING MEMS 2014-15
4.3 Flowcharts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Advantages and Disadvantages 21
5.1 Advantages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.2 Disadvantages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6 Result 22
7 Conclusion 23
7.1 Future Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Bibliography 24
Appendix 25
8 ARM PROCESSOR LPC2148 26
8.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.2 Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.3 Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.4 Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.5 On-Chip Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.6 On-Chip Static RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.7 General Purpose Parallel I/O . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.8 10 Bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.9 UARTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.10 USB 2.0 Device Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Department of TCE, S.I.T.,Tumkur iii

List of Figures
2.1 Block Diagram of MEMS Controlled System . . . . . . . . . . . . . . . . . . 2
3.1 ARM processor based LPC 2148 Microcontroller . . . . . . . . . . . . . . . 6
3.2 Pin Diagram Of LPC 2148 . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3 Functional Block Diagram of MEMS . . . . . . . . . . . . . . . . . . . . . . 11
3.4 Sample LCD Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5 GSM Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.6 GPS Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 LPC2000 Flash Utility Window . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1 LPC2148 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.2 LPC2148 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8.1 ARM processor based LPC 2148 Microcontroller . . . . . . . . . . . . . . . 27
8.2 Pin Diagram Of LPC 2148 . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
iv

Chapter 1
INTRODUCTION
The main objective of this project is to detect the vehicle accident and transmit the
location of the accident with the information of victim and type of accident to the medical
help centre and police control room. So medical help centre and police control room will get
the exact location by the geographical co-ordinates transmitted via message with the help
of map.
The system detects the vehicle accident with the help of MEM sensor. GPS module
captures the location of vehicle accident and a inform message is transmitted which contains
the co-ordinates value with the help of GSM modem. To provide very fast medical treatment
to the victim of vehicle accident. It also sends a message to police control room with the
location of accident to minimise the time required for legal police process, and a victim can
get fast treatment.
In this project an accelerometer can be used in a car alarm application so that dan-
gerous driving can be detected. It can be used as a crash or rollover detector of the vehicle
during and after a crash. With signals from an accelerometer, a severe accident can be
recognized. According to this project when a vehicle meets with an accident immediately
Vibration sensor will detect the signal or if a car rolls over, a Micro electro mechanical system
(MEMS) sensor will detects the signal and sends it to ARM controller.
If the person meets with a small accident or if there is no serious threat to anyone‘s
life, then the alert message can be terminated by the driver by a switch provided in order to
avoid wasting the valuable time of the medical rescue team.
1

Chapter 2
BLOCK DIAGRAM
Figure 2.1: Block Diagram of MEMS Controlled System
When any kind of movement or tilting of MEM sensor takes place,a output voltage
is produced by the sensor which is fed into ADC of LPC2148.MEMS accelerometers are
one of the simplest but also most applicable micro-electromechanical systems. They became
indispensable in automobile industry, computer and audio-video technology. The ADXL335
is a small, thin, low power, complete 3-axis accelerometer with signal conditioned voltage
outputs. The product measures acceleration with a minimum full-scale range of 3 g. It can
measure the static acceleration of gravity in tilt-sensing applications, as well as dynamic
acceleration resulting from motion, shock, or vibration.
2

The sensor is a polysilicon surface- micromachined structure built on top of a silicon
wafer. Polysilicon springs suspend the structure over the surface of the wafer and provide
a resistance against acceleration forces. Deflection of the structure is measured using a
differential capacitor that consists of independent fixed plates and plates attached to the
moving mass. The fixed plates are driven by 180 out-of-phase square waves. Acceleration
deflects the moving mass and unbalances the differential capacitor resulting in a sensor output
whose amplitude is proportional to acceleration. Phase-sensitive demodulation techniques
are then used to determine the magnitude and direction of the acceleration.
The LPC2141/2/4/6/8 microcontrollers are based on a 32/16 bit ARM7TDMI-S CPU
with real-time emulation and embedded trace support, that combines the microcontroller
with embedded high speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide
memory interface and a unique accelerator architecture enable 32-bit code execution at the
maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode
reduces code by more than 30
Liquid Crystal Display is a very important device in embedded system. It offers high
flexibility to users as it can display the required data. Frequently, a microcontroller program
must interact with the outside world using input and output devices that communicate
directly with a human being. One of the most common output devices used is a LCD. Some
common LCDs are 4x20 and 20x2 displays.
Department of TCE, S.I.T.,Tumkur 3

Chapter 3
HARDWARE DESCRIPTION
The following are the components used in MEMS Controlled Accident Reporting sys-
tem:
• ARM Processor LPC 2148
• MEM Sensor ADXL 335
• LCD Module
• GSM Module
• GPS Module
3.1 ARM PROCESSOR LPC2148
memory interface and a unique accelerator architecture enable 32-bit code execution at
the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb
mode reduces code by more than 30./. with minimal performance penalty. Due to their
tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for applications where
miniaturization is a key requirement, such as access control and point-of-sale.
A blend of serial communications interfaces ranging from a USB 2.0 Full Speed device,
multiple UARTs, SPI, SSP to I2Cs, and on-chip SRAM of 8 kB up to 40 kB, make these
devices very well suited for communication gateways and protocol converters, soft modems,
voice recognition and low end imaging, providing both large buﬀer size and high processing
power. Various 32-bit timers, single or dual 10-bit ADC(s),10-bit DAC, PWM channels and
45 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these
microcontrollers particularly suitable for industrial control and medical systems.
3.1.1 Features
• 8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip ﬂash program memory.
• 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
4

• 128 bit wide interface/accelerator enables high speed 60 MHz operation.
• In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader software.
• Single flash sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms.
• Embedded ICE RT and E RT and Embedded Trace interfaces offer real-time debugging
with the
• On-chip Real Monitor software and high speed tracing of instruction execution.
• USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM.
• In addition, the LPC2146/8 provide 8 kB of on-chip RAM accessible to USB by DMA.
• One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total of
6/14
• analog inputs, with conversion times as low as 2.44 micro sec per channel.
• Single 10-bit D/A converter provides variable analog output.
• Two 32-bit timers/external event counters (with four capture and four compare chan-
nels each), PWM unit (six outputs) and watchdog.
• Low power real-time clock with independent power and dedicated 32 kHz clock input.
• Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus
• (400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
• Vectored interrupt controller with configurable priorities and vector addresses.
• Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.
• Up to nine edge or level sensitive external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with settling
time of 100 microseconds.
• On-chip integrated oscillator operates with an external crystal in range from 1 MHz
to 30 MHz and with an external oscillator up to 50 MHz.
• Power saving modes include Idle and Power-down.
• Individual enable/disable of peripheral functions as well as peripheral clock scaling for
additional power optimization.

• Processor wake-up from Power-down mode via external interrupt, USB, Brown-Out
Detect (BOD) or Real-Time Clock (RTC).
• Single power supply chip with Power-On Reset (POR) and BOD circuits:CPU operat-
ing voltage range of 3.0 V to 3.6 V (3.3 V per 10
Figure 3.1: ARM processor based LPC 2148 Microcontroller
3.1.2 Architectural Overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which oﬀers high per-
formance and very low power consumption. The ARM architecture is based on Reduced
Instruction Set Computer (RISC) principles, and the instruction set and related decode
mechanism are much simpler than those of micro programmed Complex Instruction Set
Computers (CISC). This simplicity results in a high instruction throughput and impressive
real-time interrupt response from a small and cost-eﬀective processor core.
Pipeline techniques are employed so that all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed, its
successor is being decoded, and a third instruction is being fetched from memory. The
ARM7TDMI-S processor also employs a unique architectural strategy known as Thumb,
which makes it ideally suited to high-volume applications with memory restrictions, or appli-
cations where code density is an issue. The key idea behind Thumb is that of a super-reduced
instruction set. Essentially, the ARM7TDMI-S processor has two instruction sets:

• The standard 32-bit ARM set.
• A 16-bit Thumb set.
The Thumb sets 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARMs performance advantage over a tradi-
tional 16-bit processor using 16-bit registers. This is possible because Thumb code operates
on the same 32-bit register set as ARM code. Thumb code is able to provide up to 65./.
of the code size of ARM, and 160./. of the performance of an equivalent ARM processor
connected to a 16-bit memory system.
The particular ﬂash implementation in the LPC2141/42/44/46/48 allows for full speed
execution also in ARM mode. It is recommended to program performance critical and short
code sections (such as interrupt service routines and DSP algorithms) in ARM mode. The
impact on the overall code size will be minimal but the speed can be increased by 30./. over
thumb mode.
3.1.3 Pin Diagram
The ﬁgure shows the 64 pin arrangement of LPC2148. The pin packaging is done as
per the users demand. The diagram explains the internal structure of the IC and provides
the idea of interconnections.
Figure 3.2: Pin Diagram Of LPC 2148

3.1.4 Pin Functions
The pin connect block allows selected pins of the microcontroller to have more than
one function. Configuration registers control the multiplexers to allow connection between
the pin and the on chip peripherals. Peripherals should be connected to the appropriate
pins prior to being activated, and prior to any related interrupt(s) being enabled. Activity
of any enabled peripheral function that is not mapped to a related pin should be considered
undefined.
The Pin Control Module with its pin select registers defines the functionality of the
microcontroller in a given hardware environment. After reset all pins of Port 0 and 1 are
configured as input with the following exceptions: If debug is enabled, the JTAG pins will
assume their JTAG functionality; if trace is enabled, the trace pins will assume their trace
functionality. The pins associated with the I2C0 andI2C1 interface are open drain
3.1.5 On-Chip Flash Memory
The LPC2148 incorporate a 512 kB flash memory system. This memory may be used
for both code and data storage. Programming of the flash memory may be accomplished in
several ways. It may be programmed In System via the serial port. The application program
may also erase and/or program the flash while the application is running, allowing a great
degree of flexibility for data storage field firmware upgrades, etc. Due to the architectural
solution chosen for an on-chip boot loader, flash memory available for users code on LPC2148
is 500 kB. The LPC2148 flash memory provides a minimum of 100,000 erase/write cycles
and 20 years of data-retention.
3.1.6 On-Chip Static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8-bit, 16-bit, and 32-bit. The LPC2148 provide 32 kB of static RAM. In case of
LPC2146/48 only, an 8 kB SRAM block intended to be utilized mainly by the USB can also
be used as a general purpose RAM for data storage and code storage and execution.
3.1.7 General Purpose Parallel I/O
Device pins that are not connected to a specific peripheral function are controlled by
the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.

LPC2141/42/44/46/48 introduces accelerated GPIO functions over prior LPC2000 de-
vices:
• GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing.
• Mask registers allow treating sets of port bits as a group, leaving other bits unchanged.
• All GPIO registers are byte addressable.
• Entire port value can be written in one instruction.
3.1.8 10 Bit ADC
The LPC2141/42 contains one and the LPC2144/46/48 contains two analogs to digital
converters. These converters are single 10-bit successive approximation analog to digital
converters. While ADC0 has six channels, ADC1 has eight channels. Therefore, total number
of available ADC inputs for LPC2141/42 is 6 and for LPC2144/46/48 is 14.
3.1.9 Features
• 10 bit successive approximation analog to digital converter.
• Measurement range of 0 V to VREF (2.0 V VREF VDDA).
• Each converter capable of performing more than 400,000 10-bit samples per second.
• Every analog input has a dedicated result register to reduce interrupt overhead.
• Burst conversion mode for single or multiple inputs.
• Optional conversion on transition on input pin or timer match signal.
• Global Start command for both converters (LPC2142/44/46/48 only).
3.1.10 UARTS
The LPC2141/42/44/46/48 each contains two UARTs. In addition to standard trans-
mit and receive data lines, the LPC2144/46/48 UART1 also provides a full modem con-
trol handshake interface. Compared to previous LPC2000 microcontrollers, UARTs in
LPC2141/42/44/48 introduce a fractional baud rate generator for both UARTs, enabling
these microcontrollers to achieve standard baud rates such as 115200 with any crystal fre-
quency above 2 MHz In addition, auto-CTS/RTS ﬂow-control functions are fully imple-
mented in hardware (UART1 in LPC2144/46/48 only).
• 16 byte Receive and Transmit FIFOs.

• Register locations conform to 550 industry standard.
• Receiver FIFO trigger points at 1, 4, 8, and 14 bytes
• Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
• Transmission FIFO control enables implementation of software (XON/XOFF) flow
control on both UARTs.
• LPC2144/46/48 UART1 equipped with standard modem interface signals. This mod-
ule also provides full support for hardware flow control (auto-CTS/RTS).
3.1.11 USB 2.0 Device Controller
The USB is a 4-wire serial bus that supports communication between a host and a
number (127 max) of peripherals. The host controller allocates the USB bandwidth to
attached devices through a token based protocol. The bus supports hot plugging, unplugging,
and dynamic configuration of the devices. All transactions are initiated by the host controller.
The LPC2141/42/44/46/48 is equipped with a USB device controller that enables 12
Mbit/s data exchange with a USB host controller. It consists of a register interface, serial
interface engine, endpoint buffer memory and DMA controller. The serial interface engine
decodes the USB data stream and writes data to the appropriate end point buffer memory.
The status of a completed USB transfer or error condition is indicated via status registers.
An interrupt is also generated if enabled.
3.2 MEM Sensor ADXL 335
MEMS accelerometers are one of the simplest but also most applicable micro-electromechanical
systems. They became indispensable in automobile industry, computer and audio-video tech-
nology. The ADXL335 is a small, thin, low power, complete 3-axis accelerometer with signal
conditioned voltage outputs. The product measures acceleration with a minimum full-scale
range of 3 g. It can measure the static acceleration of gravity in tilt-sensing applications, as
well as dynamic acceleration resulting from motion, shock, or vibration.
The user selects the bandwidth of the accelerometer using the CX, CY, and CZ ca-
pacitors at the XOUT, YOUT, and ZOUT pins. Bandwidths can be selected to suit the
application, with a range of 0.5 Hz to 1600 Hz for the X and Y axes, and a range of 0.5 Hz
to 550 Hz for the Z axis.
The ADXL335 is available in a small, low profile, 4 mm 4 mm 1.45 mm, 16-lead, plastic
lead frame chip scale package. It contains a polysilicon surface-micro machined sensor and

signal conditioning circuitry to implement open-loop acceleration measurement architecture.
The output signals are analog voltages that are proportional to acceleration. Figure:-4.1
show the functional block diagram of ADXL335.
Figure 3.3: Functional Block Diagram of MEMS
3.2.1 Features
• 3-axis sensing
• Small, low proﬁle package
• 4 mm 4 mm 1.45 mm LFCSP
• Low power : 350 A (typical)
• Single-supply operation: 1.8 V to 3.6 V
• 10,000 g shock survival
• Excellent temperature stability
• BW adjustment with a single capacitor per axis
3.2.2 Working principle of ADXL335
The ADXL335 is a complete 3-axis acceleration measurement system. The ADXL335
has a measurement range of 3 g minimum. It contains a polysilicon surface-micro machined
sensor and signal conditioning circuitry to implement an open-loop acceleration measurement
architecture. The output signals are analog voltages that are proportional to acceleration.
The accelerometer can measure the static acceleration of gravity in tilt-sensing applications
as well as dynamic acceleration resulting from motion, shock, or vibrations.

The sensor is a polysilicon surface- micro machined structure built on top of a silicon
wafer. Polysilicon springs suspend the structure over the surface of the wafer and provide
a resistance against acceleration forces. Deflection of the structure is measured using a
differential capacitor that consists of independent fixed plates and plates attached to the
moving mass. The fixed plates are driven by 180 out-of-phase square waves. Acceleration
deflects the moving mass and unbalances the differential capacitor resulting in a sensor output
whose amplitude is proportional to acceleration. Phase-sensitive demodulation techniques
are then used to determine the magnitude and direction of the acceleration.
The demodulator output is amplified and brought off-chip through a 32 k resistor.
The user then sets the signal bandwidth of the device by adding a capacitor. This filtering
improves measurement resolution and helps prevent aliasing.
3.2.3 Applications
• Cost sensitive, low power, motion- and tilt-sensing applications
• Mobile devices
• Gaming systems
• Disk drive protection
• Image stabilization
• Sports and health devices
3.3 Liquid Crystal Display (LCD)
Liquid Crystal Display is a very important device in embedded system.It offers high
flexibility to users as it can display the required data. Frequently, a microcontroller program
must interact with the outside world using input and output devices that communicate
directly with a human being. One of the most common output devices used is a LCD. Some
common LCDs are 4x20 and 20x2 displays.
In recent years the LCD is finding widespread use replacing LEDs (seven segment LEDs
or other multisegment LEDs). This is due to the following reasons :
1. The declining prices of LCDs.
2. The ability to display numbers, characters, and graphics. This is in contrast to LEDs,
Which are limited to numbers and a few characters.
3. Incorporation of a refreshing controller into the LCD, thereby relieving the CPU of the
task of refreshing the LCD. In contrast, the LED must be refreshed by the CPU (or in some

other way) to keep displaying the data.
4. Ease of programming for characters and graphics.
3.3.1 LCD Pin Description
VCC, VSS, and VEE:
While VCC and VSS provide +5V and ground, respectively, VEE is used for controlling
LCD contrast. RS, register select. There are two very important registers inside the LCD.
The RS pin is used for their selection as follows. If RS=0, the instruction command code
register is selected, allowing the user to send a command such as clear display, cursor at
home, etc. IF RS=1 the data register is selected, allowing the user to send data to be
displayed on the LCD.
R/W (read/write):
R/W input allows the user to write information to the LCD or read information from
it. R/W=1 when reading; R/W=0 when writing.
E (enable):
The enable pin is used by the LCD to latch information presented to its data pins.
When data is supplied to data pins, a high-to-low pulse must be applied to this pin in order
for the LCD to latch in the data present at the data pins. This pulse must be a minimum
of 450 ns wide.
D0 - D7:
The 8-bit data pins, D0 - D7, are used to send information to the LCD or read the
contents of the LCDs internal registers.
To display letters and numbers, we send ASCII codes for the letters A - Z, a - z, and
numbers 0 - 9 to these pins while making RS=1.
There are also instruction command codes that can be sent to the LCD to clear the
display or force the cursor to the home position or blink the cursor. Table 11.2 lists the
instruction command codes. We also use RS = 0 to check the busy flag bit to see if the
LCD is ready to receive information. The busy flag is D7 and can be read when R/W=1
and RS = 0, as follows: if R/W = 1, RS = 0. When D7 = 1 (busy flag = 1), the LCD is
busy taking care of internal operations and will not accept any new information. When D7
= 0, the LCD is ready to receive new information. Note: It is recommended to check the

busy flag before writing any data to the LCD.
Figure 3.4: Sample LCD Display
3.3.2 LCD Command Codes
Code Command to LCD Instruction
(Hex) – Register
1 – Clear display screen
2 – Return home
4 – Decrement cursor (shift cursor to left)
6 – Increment cursor (shift cursor to right)
5 – Shift display right
7 – Shift display left
8 – Display off, cursor off
A – Display off, cursor on
C – Display on, cursor off
E – Display on, cursor blinking
F – Display on, cursor blinking
10 – Shift cursor position to left
14 – Shift cursor position to righ
18 – Shift the entire display to the left
1C – Shift the entire display to the right
80 – Force cursor to beginning of 1st line
C0 – Force cursor to beginning of 1st line
38 – 2 lines and 5x7 matrix

3.4 Global System for Mobile Communication (GSM)
Global System for Mobile communications is the most popular standard for mobile
phones in the world. Its promoter, the GSM Association, estimate that 82 % of the global
mobile market uses the standard. GSM is used by over 2 billion people across more than 212
countries and territories. Its ubiquity makes international roaming very common between
mobile phone operators, enabling subscribers to use their phones in many parts of the world.
GSM has used a variety of voice codecs to squeeze 3.1 kHz audio into between 5.6 and
13 kbit/s. Originally, two codecs, named after the types of data channel they were allocated,
were used, called Half Rate (5.6 kbit/s) and Full Rate (13 kbit/s). These used a system
based upon linear predictive coding (LPC). In addition to being efficient with bit rates,
these codecs also made it easier to identify more important parts of the audio, allowing the
air interface layer to prioritize and better protect these parts of the signal.
There five different cell sizes in a GSM network-macro, micro, Pico, femto and umbrella
cells. The coverage area of each cell varies according to the implementation environment.
Macro cells can be regarded as cells where the base station antenna is installed on a mast
or a building above average roof top level. Micro cells are cells whose antenna height is
under average roof top level; they are typically used in urban areas. Picocells are small cells
whose coverage diameter is a few dozen meters; they are mainly used indoors. Femtocells
are cells designed for use in residential or small business environments and connect to the
service providers network via a broadband internet connection. Umbrella cells are used to
cover shadowed regions of smaller cells and fill in gaps in coverage between those cells.
Figure 3.5: GSM Module

3.4.1 Subscriber Identity Module (SIM)
One of the key features of GSM is the Subscriber Identity Module (SIM), commonly
known as a SIM card. The SIM is a detachable smart card containing the users subscription
information and phonebook. This allows the user to retain his or her information after
switching handsets. Alternatively, the user can also change operators while retaining the
handset simply by changing the SIM. Some operators will block this by allowing the phone
to use only a single SIM, or only a SIM issued by them; this practice is known as SIM locking,
and is illegal in some countries.
A subscriber can usually contact the provider to remove the lock for a fee, utilize pri-
vate services to remove the lock, or make use of ample software and websites available on
the Internet to unlock the handset themselves. While most web sites offer the unlocking for
a fee, some do it for free. The locking applies to the handset, identified by its International
Mobile Equipment Identity (IMEI) number, not o the account (which is identified by the
SIM card). It is always possible to switch to another (non-locked) handset if such a handset
is available.
3.4.2 GSM Modems
A modem is a communication device that converts binary into analog acoustic signals
for transmission over telephone lines and converts these acoustics signals back into binary
form at the receiving end. Conversion to analog signal is known as modulation; conversion
back to binary signal is known as demodulation.
In the terminology used in the RS-232C communication standard, modems are DCEs,
which mean the connected at one end to a DTE (e.g. computer) device. Low-speed modems
are designed to operate say ASK is not used For data communications because it is very sus-
ceptible to electrical noise interference. Low-speed modems use FSK, higher speed modems
use PSK, and the very high speed modems use a conjunction of ASK and PSK synchronously.
Each data frame conforms an asynchronous transmission mechanism.
3.5 Global Positioning System (GPS)
The Global Positioning System (GPS), is the only fully-functional satellite navigation
system. More than two dozen GPS satellites orbit the Earth, transmitting radio signals
which allow GPS receivers to determine their location, speed and direction. GPS has become
indispensable for navigation around the world and an important tool for map-making and
synchronization of telecommunications networks.

Figure 3.6: GPS Module
3.5.1 Working of GPS
A GPS receiver calculates its position by measuring the distance between itself and
three or more GPS satellites. Measuring the time delay between transmission and reception
of each GPS radio signal gives the distance to each satellite, since the signal travels at a known
speed. The signals also carry information about the satellites’ location. By determining the
position of, and distance to, at least three satellites, the receiver can compute its location
using trilateration.Receivers do not have perfectly accurate clocks, and must track one extra
satellite to correct their clock error.
Trilateration is a method of determining the relative positions of objects using the
geometry of triangles in a similar fashion as triangulation. Unlike triangulation, which uses
angle measurements (together with at least one known distance) to calculate the subject’s
location, trilateration uses the known locations of two or more reference points, and the
measured distance between the subject and each reference point. To accurately and uniquely
determine the relative location of a point on a 2D plane using trilateration alone, generally
at least 3 reference points are needed.
3.5.2 GPS Receiver
In general, GPS receivers are composed of an antenna, tuned to the frequencies trans-
mitted by the satellites, receiver-processors, and a highly-stable clock. A receiver is often
described by its number of channels, which signiﬁes how many satellites it can monitor
simultaneously.

3.5.3 Frequencies used by GPS
• L1 (1575.42 MHz) - Mix of Navigation Message, coarse-acquisition (C/A) code and
encrypted precision P(Y) code.
• L2 (1227.60 MHz) - P(Y) code, and a second C/A code on the Block II-R and newer
satellites.
• L3 (1381.05 MHz) - Used by the Defense Support Program to signal detection of missile
launches, nuclear detonations, and other high-energy infrared events.
• L4 (1841.40 MHz) - Being studied for additional ionospheric correction.
• L5 (1176.45 MHz) - Proposed for use as a civilian safety-of-life (SoL) signal. This fre-
quency falls into an internationally protected range for aeronautical navigation, promis-
ing little or no interference under all circumstances. The ﬁrst Block IIF satellite that
would provide this signal is set to be launched in 2008.

Chapter 4
SYSTEM SOFTWARE
The softwares used for the development of the system are
• Keil Vision 4
• Philips LPC2000 flash utility V2.2.3
4.1 Keil vision 4
The Vision from keil combines project management, make facilities, source coding edit-
ing, program debugging and complete simulation in one powerful environment. The Vision
development platform is easy to use and helping one quickly create embedded program that
work. The vision editor and debugger are integrated in a single application that provides a
seamless embedded project development environment.
4.2 Philips LPC2000 flash utility V2.2.3
Philips LPC2000 flash utility is a special software program from Phillips which is used
to send new firmware to the product. It is used to serially dump the code. Without the
Bootloader, updating the main firmware in the product is more difficult, because the enclo-
sure must be opened to access the configuration button. The Phillips program, simplifies
the firmware update process. Figure 5.1 shows LPC2000 flash utility window which is used
for serial dumping of the code.
Figure 4.1: LPC2000 Flash Utility Window
19

4.3 Flowcharts
The ﬂowcharts given in the below demonstrate the working of accident reporting system
using MEMS and overall step by step functioning of the system.
Figure 4.2: Flowchart

Chapter 5
Advantages and Disadvantages
5.1 Advantages
• Vehicle which has undergone accident can be identified using tracking technology.
• Few sensors are able to capture a wide variety of movements
• User convenience and effective power saving.
• Immediate medication will be provided to the victims in remote areas.
5.2 Disadvantages
• Delay in sensing of MEMS sensor motion.
• Existing system do not work if the system itself damaged in the vehicle accident.
• System is not very effective in case of accident of heavy vehicles
21

Chapter 6
Result
In our project the ARM processor LPC 2148 is interfaced with LCD, GPS, GSM AND
MEMS .We had ﬁrst tried to understand the working of our project through schematic and
then we proceeded to build the circuit as per the schematic. Initially we interfaced LCD
with LPC 2148 and the ﬁgures are shown below for the outputs :
Figure 6.1: LPC2148
Figure 6.2: LPC2148
22

Chapter 7
Conclusion
This system can shorten the alarm time greatly and locate the accident spot accurately,
realizing the automation of accident detection and information transmission. Consequently,
it will save the rescuers form wasting their time in search. The experiments of model cars
collision and rollover proved that this system can automatically detect corresponding accident
and sent related information. Such functions can be achieved by buttons representing ”false
alarm”, help and safety, respectively.
To minimize deaths and the severe conditions due to accidents the GPS and GSM
technologies are used where immediate action would take place by the ambulance/police
service which might reduces the severity. Other advantages of the MEMS controlled system
are being unobtrusive, low cost, minimally invasive, ﬂexible, and easy to operate.
7.1 Future Scope
There is a scope for improvement and as a future implementation we can add a wireless
webcam for capturing the images which will help in providing driver‘s assistance.This system
can be interfaced with vehicle airbag system that prevents vehicle occupants from striking
interior objects such as the steering wheel or window.
23

Bibliography
[1] ADXL 335 - http://www.elechouse.com
[2] ARM-LPC2148 - http://www.nxp.com
[3] GPS - http://www.ublox.com
[4] GSM - https://www.youtube.com/watch?v=wI-pQyG13ZM
24

APPENDIX

ARM PROCESSOR LPC2148
memory interface and a unique accelerator architecture enable 32-bit code execution at
the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb
mode reduces code by more than 30./. with minimal performance penalty. Due to their
tiny size and low power consumption, LPC2141/2/4/6/8 are ideal for applications where
miniaturization is a key requirement, such as access control and point-of-sale.
A blend of serial communications interfaces ranging from a USB 2.0 Full Speed device,
multiple UARTs, SPI, SSP to I2Cs, and on-chip SRAM of 8 kB up to 40 kB, make these
devices very well suited for communication gateways and protocol converters, soft modems,
voice recognition and low end imaging, providing both large buffer size and high processing
power. Various 32-bit timers, single or dual 10-bit ADC(s),10-bit DAC, PWM channels and
45 fast GPIO lines with up to nine edge or level sensitive external interrupt pins make these
microcontrollers particularly suitable for industrial control and medical systems.
Features
• 8 to 40 kB of on-chip static RAM and 32 to 512 kB of on-chip flash program memory.
• 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
• 128 bit wide interface/accelerator enables high speed 60 MHz operation.
• In-System/In-Application Programming (ISP/IAP) via on-chip boot-loader software.
• Single flash sector or full chip erase in 400 ms and programming of 256 bytes in 1 ms.
• Embedded ICE RT and E RT and Embedded Trace interfaces offer real-time debugging
with the
• On-chip Real Monitor software and high speed tracing of instruction execution.
26

Figure 7.1: ARM processor based LPC 2148 Microcontroller
• USB 2.0 Full Speed compliant Device Controller with 2 kB of endpoint RAM.
• In addition, the LPC2146/8 provide 8 kB of on-chip RAM accessible to USB by DMA.
• One or two (LPC2141/2 vs. LPC2144/6/8) 10-bit A/D converters provide a total of
6/14
• analog inputs, with conversion times as low as 2.44 micro sec per channel.
• Single 10-bit D/A converter provides variable analog output.
• Two 32-bit timers/external event counters (with four capture and four compare chan-
nels each), PWM unit (six outputs) and watchdog.
• Low power real-time clock with independent power and dedicated 32 kHz clock input.
• Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus
• (400 kbit/s), SPI and SSP with buﬀering and variable data length capabilities.
• Vectored interrupt controller with conﬁgurable priorities and vector addresses.
• Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package.

• Up to nine edge or level sensitive external interrupt pins available.
• 60 MHz maximum CPU clock available from programmable on-chip PLL with settling
time of 100 microseconds.
• On-chip integrated oscillator operates with an external crystal in range from 1 MHz
to 30 MHz and with an external oscillator up to 50 MHz.
• Power saving modes include Idle and Power-down.
• Individual enable/disable of peripheral functions as well as peripheral clock scaling for
additional power optimization.
• Processor wake-up from Power-down mode via external interrupt, USB, Brown-Out
Detect (BOD) or Real-Time Clock (RTC).
• Single power supply chip with Power-On Reset (POR) and BOD circuits:CPU operat-
ing voltage range of 3.0 V to 3.6 V (3.3 V per 10
Architectural Overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which oﬀers high per-
formance and very low power consumption. The ARM architecture is based on Reduced
Instruction Set Computer (RISC) principles, and the instruction set and related decode
mechanism are much simpler than those of micro programmed Complex Instruction Set
Computers (CISC). This simplicity results in a high instruction throughput and impressive
real-time interrupt response from a small and cost-eﬀective processor core.
Pipeline techniques are employed so that all parts of the processing and memory
systems can operate continuously. Typically, while one instruction is being executed, its
successor is being decoded, and a third instruction is being fetched from memory. The
ARM7TDMI-S processor also employs a unique architectural strategy known as Thumb,
which makes it ideally suited to high-volume applications with memory restrictions, or appli-
cations where code density is an issue. The key idea behind Thumb is that of a super-reduced
instruction set. Essentially, the ARM7TDMI-S processor has two instruction sets:
• The standard 32-bit ARM set.
• A 16-bit Thumb set.

The Thumb sets 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARMs performance advantage over a tradi-
tional 16-bit processor using 16-bit registers. This is possible because Thumb code operates
on the same 32-bit register set as ARM code. Thumb code is able to provide up to 65./.
of the code size of ARM, and 160./. of the performance of an equivalent ARM processor
connected to a 16-bit memory system.
The particular ﬂash implementation in the LPC2141/42/44/46/48 allows for full speed
execution also in ARM mode. It is recommended to program performance critical and short
code sections (such as interrupt service routines and DSP algorithms) in ARM mode. The
impact on the overall code size will be minimal but the speed can be increased by 30./. over
thumb mode.
Pin Diagram
The ﬁgure shows the 64 pin arrangement of LPC2148. The pin packaging is done as
per the users demand. The diagram explains the internal structure of the IC and provides
the idea of interconnections.
Figure 7.2: Pin Diagram Of LPC 2148

Pin Functions
The pin connect block allows selected pins of the microcontroller to have more than
one function. Configuration registers control the multiplexers to allow connection between
the pin and the on chip peripherals. Peripherals should be connected to the appropriate
pins prior to being activated, and prior to any related interrupt(s) being enabled. Activity
of any enabled peripheral function that is not mapped to a related pin should be considered
undefined.
The Pin Control Module with its pin select registers defines the functionality of the
microcontroller in a given hardware environment. After reset all pins of Port 0 and 1 are
configured as input with the following exceptions: If debug is enabled, the JTAG pins will
assume their JTAG functionality; if trace is enabled, the trace pins will assume their trace
functionality. The pins associated with the I2C0 andI2C1 interface are open drain
On-Chip Flash Memory
The LPC2148 incorporate a 512 kB flash memory system. This memory may be used
for both code and data storage. Programming of the flash memory may be accomplished in
several ways. It may be programmed In System via the serial port. The application program
may also erase and/or program the flash while the application is running, allowing a great
degree of flexibility for data storage field firmware upgrades, etc. Due to the architectural
solution chosen for an on-chip boot loader, flash memory available for users code on LPC2148
is 500 kB. The LPC2148 flash memory provides a minimum of 100,000 erase/write cycles
and 20 years of data-retention.
On-Chip Static RAM
On-chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8-bit, 16-bit, and 32-bit. The LPC2148 provide 32 kB of static RAM. In case of
LPC2146/48 only, an 8 kB SRAM block intended to be utilized mainly by the USB can also
be used as a general purpose RAM for data storage and code storage and execution.
General Purpose Parallel I/O
Device pins that are not connected to a specific peripheral function are controlled by
the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
LPC2141/42/44/46/48 introduces accelerated GPIO functions over prior LPC2000 de-
vices:

• GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing.
• Mask registers allow treating sets of port bits as a group, leaving other bits unchanged.
• All GPIO registers are byte addressable.
• Entire port value can be written in one instruction.
10 Bit ADC
The LPC2141/42 contains one and the LPC2144/46/48 contains two analogs to digital
converters. These converters are single 10-bit successive approximation analog to digital
converters. While ADC0 has six channels, ADC1 has eight channels. Therefore, total number
of available ADC inputs for LPC2141/42 is 6 and for LPC2144/46/48 is 14.
Features
• 10 bit successive approximation analog to digital converter.
• Measurement range of 0 V to VREF (2.0 V VREF VDDA).
• Each converter capable of performing more than 400,000 10-bit samples per second.
• Every analog input has a dedicated result register to reduce interrupt overhead.
• Burst conversion mode for single or multiple inputs.
• Optional conversion on transition on input pin or timer match signal.
• Global Start command for both converters (LPC2142/44/46/48 only).
UARTS
The LPC2141/42/44/46/48 each contains two UARTs. In addition to standard trans-
mit and receive data lines, the LPC2144/46/48 UART1 also provides a full modem con-
trol handshake interface. Compared to previous LPC2000 microcontrollers, UARTs in
LPC2141/42/44/48 introduce a fractional baud rate generator for both UARTs, enabling
these microcontrollers to achieve standard baud rates such as 115200 with any crystal fre-
quency above 2 MHz In addition, auto-CTS/RTS ﬂow-control functions are fully imple-
mented in hardware (UART1 in LPC2144/46/48 only).
• 16 byte Receive and Transmit FIFOs.
• Register locations conform to 550 industry standard.
• Receiver FIFO trigger points at 1, 4, 8, and 14 bytes

• Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
• Transmission FIFO control enables implementation of software (XON/XOFF) flow
control on both UARTs.
• LPC2144/46/48 UART1 equipped with standard modem interface signals. This mod-
ule also provides full support for hardware flow control (auto-CTS/RTS).
USB 2.0 Device Controller
The USB is a 4-wire serial bus that supports communication between a host and a
number (127 max) of peripherals. The host controller allocates the USB bandwidth to
attached devices through a token based protocol. The bus supports hot plugging, unplugging,
and dynamic configuration of the devices. All transactions are initiated by the host controller.
The LPC2141/42/44/46/48 is equipped with a USB device controller that enables 12
Mbit/s data exchange with a USB host controller. It consists of a register interface, serial
interface engine, endpoint buffer memory and DMA controller. The serial interface engine
decodes the USB data stream and writes data to the appropriate end point buffer memory.
The status of a completed USB transfer or error condition is indicated via status registers.
An interrupt is also generated if enabled.

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