SRAM is the part of RAM .SRAM STANDS FOR STATIC RANDOM ACCESS MEMORY . THIS PPT IS ALL ABOUT THE SRAM .

2. Memory Arrays
Random Access Memory Serial Access Memory Content Addressable Memory
(CAM)
SRAM Slide 2
Read/Write Memory
(RAM)
(Volatile)
Read Only Memory
(ROM)
(Nonvolatile)
Static RAM
(SRAM)
Dynamic RAM
(DRAM)
Shift Registers Queues
First In
First Out
(FIFO)
Last In
First Out
(LIFO)
Serial In
Parallel Out
(SIPO)
Parallel In
Serial Out
(PISO)
Mask ROM Programmable
ROM
(PROM)
Erasable
Programmable
ROM
(EPROM)
Electrically
Erasable
Programmable
ROM
(EEPROM)
Flash ROM

3.  Static (SRAM)
 Data stored as long as supply is applied
 Large (6 transistors per cell)
 Fast
 Differential signal (more reliable)
 Dynamic (DRAM)
 Periodic refresh required
 Small (1-3 transistors per cell) but slower
 Single ended (unless using dummy cell to generate
differential signals)

4.  SRAM :-
 Is static memory.
 The term static is derived from the fact that it
doesn't need to be refreshed like dynamic
RAM.
 Has cycle time is much shorter than that of
DRAM because it does not need to pause
between accesses.
 Is often used only as a memory cache

5. SRAM Features:-
1.Low Power SRAM-
• Low Power Supply Voltage : 5V -> 3V -> 1.8V -> sub
1.0V
-> Low Power Dissipation for Handheld Application
• Low Standby Power Dissipation : 100uA -> 10uA ->
1uA
-> support for Data Retention Application
2.FAST SRAM-
 Power Supply Voltage : 5V, 3.3V
 Low Operating Power Dissipation
-> Application for large amount of SRAM usage
 FAST Speed requirements : 8ns-20ns

6. 3.Synchronous SRAM-
• Low Power Supply Voltage : 3.3V -> 2.5V -> 1.8V
-> Small geometry Transistor technology to improve
speed
• Various Sync. SRAM Features:
-> Late Write operation to enhance the bus efficiency
• High Bandwidth Interface :
• FAST Speed Requirements : 150MHz-over
500MHz(1Gbps)
• High Performance Package Solution

7. Ax
Data line Data line
M2
M1
M4
M3
DESIGN:-
M5
M6
Q
Q
VDD
Write Read
Data i/p Data o/p
6-transistor SRAM Cell
M9 M7
M8
M10
Ay

8.  To write:-
 W=1, M9 ON.
1- If data i/p=1,vltg at Q will be high.
2- If data i/p=0,vltg at Q will be low.
Hence we have a static situation as lon as bias is applied.
 To read:-
 R=1, thus complement of the data level written into
cell is read at data o/p.

9. TYPES
A. Bipolar-
1.Application for ultra high speed SRAM
 Cache and Main Memory in high performance mainframe
computers
 ECL interface
2.High cost and High power dissipation
B. NMOS-
1.Lower cost than Bipolar
2.Limitation of high density and high performance due to
complicated circuit design
 Need dynamic circuit and bootstrapped circuit technique
3.Limitation of low power dissipation and high speed

10. C. Bi-CMOS-
- High speed
. application for small volume/high performance
- Complicated process [7][8]
. use triple diffused BiCMOS process
- Limitation of low power supply voltage [9]
. improve the MOS Transistor (Lower Vth)
. use BiNMOS or NBiCMOS
. Base boost technique
D. CMOS-
1. Low cost and low power dissipation
2. Easy to make high density SRAM
3.Limitation of high speed
 Improve the MOS Transistor
 Use Dynamic Gate Logic

11. CHARACTERISTICS:-
• SRAM is more expensive, but faster and significantly
less power hungry (especially idle) than DRAM.
• It is therefore used where either bandwidth or low
power, or both, are principal considerations.
• SRAM is also easier to control (interface to) and
generally more truly random access than modern types
of DRAM.
• Due to a more complex internal structure, SRAM is
less dense than DRAM and is therefore not used for
high-capacity, low-cost applications such as the
main memory in personal computers.

12. USES:-
• Many categories of industrial and scientific
subsystems, automotive electronics, and
similar, contain static RAM.
• Some amount (kilobytes or less) is also
embedded in practically all modern appliances,
toys, etc. that implement an electronic user
interface.
• Several megabytes may be used in complex
products such as digital cameras, cell phones,
synthesizers, etc.