2. Topic Will Be Discussed
History Of AMD K6
AMD K6 Specification
AMD Architecture
AMD K6 Features

3. HISTORY OF AMD K6

1995-AMD K5 is too slow to compete with
Intel’s fast Pentium CPU.

AMD launched its K6 processor to much
acclaim amongst the computer world in 1997.

The K6 was built around the original NexGen
686 core which was inherited by AMD when it
bought the small firm in 1996.

4. 
NexGen had developed a powerful "six issue"
RISC processor core which gave the chip
impressive sixth generation performance.

Additionally, they slap on Intel’s MMX code
making it compatible with Pentiums.

These chips were compatible with HX, VX and
TX chipset motherboards which supported MMX
processors.

5. 
This placed it above Intel processors for many
who did not wish to pay high prices for their
processing power.

It was marketed as a product which could
perform as well as its Intel Pentium II equivalent
but at a significantly lower price.

the AMD K6 processors used a Pentium II-based
performance rating (PR2) to designate their
speed. The PR2 rating was dropped because the
rated frequency of the processor was the same as
the real frequency.

6. 
First release: April 2,1997

AMD k6 is 32bit Processor.

Speeds of 166Mhz to 200Mhz can
be maximize upto 300Mhz

8.8 million transistors in 350 nm.

8. L1-Cache: 32 + 32 KB (Data +
Instructions)
MMX( Multiple Math eXtension,
or Matrix Math eXtension.)
AMD k6 Microprocessor uses MMx Technology
which consists of three improvements over the
Non -MMX Pentium microprocessor:
1)57 new microprocessor instructions have
been added that are designed to handle video,
audio, and graphical data more efficiently.

9. 2) A new process, Single Instruction Multiple
Data ( SIMD ), makes it possible for one
instruction to perform the same operation on
multiple data items.
3) The memory cache on the microprocessor has
increased to 32 thousand bytes, meaning fewer
accesses to memory that is off the
microprocessor.

10. Socket 7
Socket 7 is a physical and electrical specification
for an x86-style CPU socket on a personal
computer motherboard. In AMD k6 socket 7 is
used insted of socket 5 used in intel p5 pentium
microprocessor.
Major differences between Socket 5 and Socket 7
are that Socket 7 has an extra pin and is
designed to provide dual split rail voltage, as
opposed to Socket 5's single voltage.

11. Front side bus: 66 MHz
A front-side bus (FSB) is a computer
communication interface (bus) often used in
Intel-chip-based computers.
VCore: 2.9 V (166/200) 3.2/3.3 V (233)
Clockrate: 166, 200, 233 MHz

14. 
The AMD-K6 processor contains
•
Parallel Decoders
•
Scheduler/Instruction Control Unit
•
Branch Logic
•
Instruction Fetch and Decode
•
Execution Units

15.  Parallel Decoders
•
Short decoders - Decodes the most commonly
used x86 instructions
•
Long decoders - Decodes the semi-common and
commonly used instructions
•
Vector decoders - Decodes uncommon, complex x86
instructions.

16.  Scheduler/Instruction Control Unit
•
The centralized scheduler or buffer is managed by
the Instruction Control Unit (ICU).
•
The 24-operation buffer size is optimized for the
efficient use of the processor's six-stage RISC86
pipeline and seven parallel execution units.
•
The scheduler accepts up to four RISC86 operations
at a time from the decoders.
•
The ICU can simultaneously issue up to six RISC86
operations per clock to the execution units

17.  Branch Logic
• The AMD-K6 processor uses dynamic branch logic to
minimize delays due to the branch instructions
common in x86 software.
• The processor implements a two-level branch
prediction scheme based on an 8,192-entry branch
history table, which stores prediction information
used to predict conditional branches
• The branch target cache augments predicted branch
performance by avoiding a one-clock cache fetch
penalty.

18. •
Load Unit - performs data memory reads with a twostage pipeline; data is available from this unit after two
clocks.
•
Store Unit - performs data writes and register
calculations with a two-stage pipeline; data memory
and register writes from stores are available after one
clock.
•
Integer X Unit - operates on ALU operations,
multiplies, divides, shifts, and rotates.

19. •
Multimedia Unit - executes all MMX™ instructions.
•
Integer Y Unit - operates on the basic word and
double-word ALU operations.
•
Floating-Point Unit - executes all floating-point
instructions.
•
Branch Unit - resolves conditional branches after
they have been evaluated.

20. K6 was significantly cheaper than the Pentium
The AMD K6 processors used a Pentium IIbased performance rating (PR2) to designate
their speed
The main advantage of this particular
microprocessor is that it was designed to fit
into existing desktop designs for Pentium
branded CPUs.

21. AMD K6 processor was faster than similar
clocked K5 CPU in integer and floating-point
calculations.
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