The document describes several receiver designs developed at the Analog and Mixed-Signal Center between 2000-2008, including a Bluetooth receiver, a dual-standard Bluetooth/Wi-Fi receiver ("Chameleon" receiver), and others. It provides details on the system design and individual building blocks for the Bluetooth and Chameleon receivers, such as the low-IF architecture, active complex filter, GFSK demodulator, and time-interleaved pipeline ADC. Experimental results showed the Bluetooth receiver achieved -82dBm sensitivity while the Chameleon receiver achieved -91dBm and -86.5dBm for Bluetooth and Wi-Fi modes respectively.

1. Receivers Design: Cases Studies Edgar Sánchez-Sinencio TI J. Kilby Chair Professor Department of Electrical Engineering Analog and Mixed-Signal Center Texas A&M University http://amesp02.tamu.edu/~sanchez/

3. Bluetooth Receiver Chameleon Receiver Ultra-Wideband Receiver ZigBee Transceiver MICS Transceiver Millimeter-wave Dual standard Receiver Radios Designed in AMSC 2000-2008

9. Bluetooth: System Level Design

12. What other receiver structures alternatives can be considered and with what properties ? Can we make the IF very low, say to DC ? How and at what price ? Direct Conversion (IF=0)

21. Complete Receiver Diagram

22. Building Blocks Design LNA Mixer Frequency synthesizer & VCO Active complex filter Limiter & GFSK demodulator DC offset tracking and canceling Low Noise Amplifier

27. Building Blocks Design Mixer

30. Building Blocks Design Frequency Synthesizer

35. Building Blocks Design Voltage Controlled Oscillator

37. VCO Schematics

39. Building Blocks Design Complex Filter

49. Building Blocks Design GFSK Demodulator

53. Building Blocks Design Baseband

59. System Testing

65. The Team who developed and proposed the BT Implementation.

67. Cham eleon Receiver: Timeline Meeting Bluetooth & 802.11b Standards

69. Standards Overview 2.4 – 2.48GHz 2.4 – 2.48GHz Freq band DSSS-CCK FH-GFSK Modulation Higher Lower Power 1-11Mb/s 1Mb/s Data rate 802.11b Bluetooth

71. Proposed Dual-Mode Architecture Direct-conversion BT / WiFi receiver architecture

77. NF, IIP3, and IIP2 contributions

78. Power consumption and area contributions

80. Receiver Die Photo 5.6mm 3.8mm Deep Trench Isolation

81. Testing Board

84. Sensitivity Test

86. Comparison Table 2.5V 1.8V 2.7V Supply voltage 10mm 2 - - - - ADC area (w/ pads) 9mm 2 (w/o ADC) 16mm 2 (transceiver) N/A Rx area (w/ pads) 10dBm 20dBm N/A N/A IIP2 -13dBm -12dBm -8dBm -7dBm IIP3 15.6mA 13.4mA - - - - ADC active current 30mA (w/o ADC) 27.9mA (w/o ADC) 60mA 65mA 46mA Rx active current 0.25m BiCMOS 0.18 m CMOS 0.35 m CMOS Technology -86dBm -91dBm -92dBm (0dB SNR) -80dBm -88dBm -82dbm Sensitivity 6MHz (LPF) 600kHz (LPF) 7.5MHz (LPF) 1MHz (BPF) 7.5MHz (LPF) 1MHz (BPF) Filter bandwidth Included Not included Not included ADC Shared shared separate Baseband amplifier Programmable programmable separate Channel select filter AC coupling Injection at AGC input Programmable loop Offset cancellation DCR DCR DCR Low-IF DCR Low-IF Receiver Architecture Wi-Fi BT WiFi BT WiFi BT This design [2] [1]

88. Refer ences [1] W. Sheng, B. Xia, A.E.Emira, C. Xin, A.Y. Valero-Lopez, S.T. Moon, and E. Sanchez-Sinencio, “ A 3-V, 0.35 um CMOS Bluetooth Receiver IC ,” IEEE J. of Solid-State Circuits , Vol. 38, pp. 30-42, January 2003 [2] B. Xia, C. Xin, W. Sheng, A.Y. Valero-Lopez, and E. Sanchez-Sinencio, “ A GFSK Demodulator for Low-IF Bluetooth Receiver,” IEEE J. Solid-State Circuits , Vol. 38, pp. 1397-1400, August 2003. [3] A.A Emira,.; E.Sánchez-Sinencio, “A pseudo differential complex filter for Bluetooth with frequency tuning” IEEE Circuits and Systems II ,Volume: 50, pp. 742 - 754 Oct. 2003 [4] K. Shu, E. Sanchez-Sinencio, J. Silva-Martinez, S.H.K. Embabi, S.H” A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier. “ IEEEJ. of Solid-State Circuits , Vol. 38 , pp. 866-874, June 2003. [5] A. Emira, A. Valdes-Garcia, B. Xia, A. Mohieldin, A. Valero-Lopez, S. Moon, C. Xin, and E. Sánchez-Sinencio, “A Dual-Mode 802.11b/Bluetooth Receiver in 0.25mm BiCMOS,” IEEE International Solid-State Circuits Conference (ISSCC)I, pp. 270-271,527, Wireless Consumer Papers, San Francisco, CA, February 2004.

89. Thank you for your attention Any question ? Analog and Mixed-Signal Center, TAMU Department of Electrical and Computer Engineering