A micro processors details. As example it's AMD Athlon.

1. Microprocessor
AMD Athlon™

2. • What is Athlon ?
 is the brand name applied to a series of x86-
compatible microprocessors designed and manufactured
by Advanced Micro Devices (AMD).
 The original Athlon (now called Athlon Classic) was the first
seventh-generation x86 processor.
 was the first desktop processor to reach speeds of one
gigahertz (GHz).
 AMD has continued using the Athlon name with the Athlon
64, an eighth-generation processor featuring x86-64 (later
renamed AMD64) architecture, and the Athlon II.

3. The Athlon XP microprocessor from AMD is a
seventh-generation 32-bit CPU targeted at the
consumer market.
Type of AMD Althon XP microprocessors are :
• Desktop CPU :
1. Athlon XP "Palomino" (Model 6, 180 nm )
2. Athlon XP "Thoroughbred A/B" (Model 8, 130 nm)
3. Athlon XP "Thorton" (Model 10, 130 nm)
4. Athlon XP "Barton" (Model 10, 130 nm)

4. • Server CPU :
1. Athlon MP "Palomino" (Model 6, 180 nm)
2. Athlon MP "Thoroughbred" (Model 8, 130 nm)
3. Athlon MP "Barton" (Model 10, 130 nm)
• Mobile Processors :
1. Athlon XP-M "Thoroughbred" (Low Voltage, 35 W TDP, Socket A)
2. Athlon XP-M "Barton" (Mainstream, 45-53 W TDP, Socket A)
3. Athlon XP-M "Barton" (Desktop Replacement, 72 W TDP, Socket A)
4. Athlon XP-M "Barton" (Low Voltage, 35 W TDP, Socket A)
5. Athlon XP-M "Thoroughbred" (Low Voltage, Socket 563)
6. Athlon XP-M "Barton" (Low Voltage, Socket 563)
7. Athlon XP-M "Dublin" (K8-based, Socket 754)

5. General Architecture
Internally, the Athlon is a fully seventh
generation x86 processor, the first of its kind.
Athlon dynamically buffers internal micro-
instructions at runtime resulting from parallel
x86 instruction decoding. The CPU is an out-of-
order design.

7. General Architecture
AMD designed the CPU with more robust x86
instruction decoding capabilities. to enhance its ability
to keep more data in-flight at once. The Athlon's three
decoders could potentially decode three x86
instructions to six microinstructions per clock,
although this was somewhat unlikely in real-world
use.

8. Athlon "Classic"
The AMD Athlon processor launched on June 23, 1999, with general availability
by August '99.It launched at 500 MHz and was, on average, 10% faster than
the Pentium III at the same clock for Business applications, and even faster
(~20%) for gaming workloads.

9. Specifications
◇ L1-Cache: 64 + 64 kB (Data + Instructions)
◇ L2-Cache: 512 kB, external chips on CPU module with 50%, 40% or
33% of CPU speed
◇ MMX, 3DNow!
◇ Slot A (EV6)
◇ Front-side bus: 200 MT/s (100 MHz double-pumped)
◇ VCore: 1.6 V (K7), 1.6–1.8 V (K75)
◇ First release: June 23, 1999 (K7), November 29, 1999 (K75)
◇ Clockrate: 500–700 MHz (K7), 550–1000 MHz (K75)

10. “
◇The thunderbird(T-bird)

11.  General Architecture Thunderbird (T-
Bird)
The second generation Athlon, the Thunderbird, debuted on June 5, 2000.
This version of the Athlon shipped in a more traditional pin-grid array
(PGA) format that plugged into a socket ("Socket A") on the motherboard
(it also shipped in the slot A package). It was sold at speeds ranging from
600 MHz to 1.4 GHz (Athlon Classics using the Slot A package could clock
up to 1 GHz).
AMD replaced the 512 kB external reduced-speed cache of the Athlon
Classic with 256 kB of on-chip, full-speed exclusive cache. As a general
rule, more cache improves performance, but faster cache improves it
further still.

12. AMD changed cache design significantly with the Thunderbird core. With the
older Athlon CPUs, the CPU caching was of an inclusive design where data
from the L1 is duplicated in the L2 cache. Thunderbird moved to an exclusive
design where the L1 cache's contents are not duplicated in the L2. This
increases total cache size of the processor and effectively makes caching
behave as if there is a very large L1 cache with a slower region (the L2) and a
very fast region (the L1). Because of Athlon's very large L1 cache and the
exclusive design, which turns the L2 cache into basically a "victim cache", the
need for high L2 performance and size was lessened.
AMD kept the 64-bit L2 cache data bus from the older Athlons, as a result, and
allowed it to have a relatively high latency.

13. A simpler L2 cache reduced the possibility of the L2 cache causing clock
scaling and yield issues. Still, instead of the 2-way associative scheme
used in older Athlons, Thunderbird did move to a more efficient 16-way
associative layout.

14. Specifications
•L1-Cache: 64 + 64 kB (Data + Instructions)
•L2-Cache: 256 kB, full speed
•MMX, 3DNow!
•Slot A & Socket A (EV6)
•Front-side bus: 100 MHz (Slot-A, B-models), 133 MHz (C-models)
(200 MT/s,
266 MT/s)
•V Core: 1.70–1.75 V
•First release: June 5, 2000
•Transistor count: 37 million
•Manufacturing Process: 0.18 µm/180 nm
•Clock rate:
•Slot A: 650–1000 MHz
•Socket A, 100 MHz FSB (B-models): 600–1400 MHz
•Socket A, 133 MHz FSB (C-models): 1000–1400 MHz

15. ◇General Architecture
Palomino
AMD released the third-generation
Athlon, code-named "Palomino", on
October 9, 2001 as the Athlon XP. The
"XP" suffix is interpreted to
mean extended performance and also
as an unofficial reference to
Microsoft Windows XP.[16] The Athlon
XP was marketed using a PR system,
which compared its relative
performance to an Athlon utilizing the
earlier "Thunderbird" core.

16. ◇Palomino was the first K7
core to include the
full SSE instruction set from
the Intel Pentium III, as well
as AMD's 3DNow!
Professional. It is roughly
10% faster than Thunderbird
at the same clock speed,
thanks in part to the new
SIMD functionality and to
several additional
improvements.
◇Palomino's goals of
lowered power consumption
(and resultant heat
produced) allowed AMD to
increase performance within
a reasonable power
envelope. Palomino's design
also allowed AMD to
continue using the same
180 nm manufacturing
process node and core
voltages as Thunderbird.

17. ◇Interestingly, the Palomino core actually debuted
earlier in the mobile market—branded as Mobile Athlon
4 with the codename "Corvette". It distinctively used
a ceramic interposer much like the Thunderbird instead
of the organic pin grid array package used on all later
Palomino processors.[18]

18. Specifications
◇L1-Cache: 64 + 64 kB(Data + Instructions)
◇L2-Cache: 256 kB, full speed
◇MMX, 3DNow!, SSE
◇Socket A (EV6)
◇Front-side bus: 133 MHz (266 MT/s)
◇VCore: 1.50 to 1.75 V
◇Power consumption: 68 W
◇First release: October 9, 2001
◇Clock rate:
￭Athlon 4: 850–1400 MHz
￭Athlon XP: 1333–1733 MHz (1500+ to 2100+)
￭Athlon MP: 1000–1733 MHz

19. General features of AMD Athlon
processor
1

20. “
◇Speed ranges from 500MHz to 1.4GHz
◇Front side bus is 200MHz or 266MHz
◇Integrated DDR memory controller which enables a
processor to communicate with the main memory
directly
◇AMD64 technology – which enables a processor to run
32-bit applications as well

21. “
◇Up to 2GHz Hyper transport technology
◇Enhanced 3DNow Multimedia technology support
◇Streaming SIMd Instructions (SSE2 and SSE3)set
support
◇128 L1 cache and 512 or 1MB L2 cache
◇64-bit instruction set support

22. “ ◇MMX instructions support
◇Built in with enhanced virus protection technology
(supported in Windows XP SP2 operating system)
◇Lower power consumption

23. Thanks!
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