RISC and CISC computers

1. RISC AND CISC
COMPUTERS

2. WHAT IS CISC AND RISC?
• CISC stands for Complex Instruction Set Computers.
• The CISC approach attempts to minimize the number of instructions
per program, sacrificing the number of cycles per instruction.
• RISC stands for Reduced Instruction Set Computers.
• RISC does the opposite of CISC, reducing the cycles per instruction
at the cost of number of instructions per program.

3. WHY RISC AND CISC?
• Both RISC and CISC architectures were developed as
an attempt to cover the semantic gap.
• With an objective of improving efficiency of software
development, several powerful languages came up.
• They provide high level of abstraction, conciseness
and power.
• By this, semantic gap grows.
• To enable efficient compilation of high level
language programs, CISC and RISC designs were
introduced.

4. PIPELINING OF RISC
RISC Pipelines
A RISC processor pipeline operates in much the
same way, although the stages in the pipeline are
different. While different processors have different
numbers of steps, they are basically variations of
these five, used in the MIPS R3000 processor:
• fetch instructions from memory
• read registers and decode the instruction
• execute the instruction or calculate an address
• access an operand in data memory
• write the result into a register

5. RISC
• Reduced Instruction Set Computer
 Small number of instructions
 Instruction size constant
 Bans the indirect addressing mode
 Retains only those instructions that can be overlapped
and made to execute in one machine cycle or less
• RISC examples:
 Apple iPods
 Apple iPhone
 Nintendo Game Boy Advance
 Sony Network Walkman

6. WHY RISC?
RISC was introduced for 3 main reasons:
• Simple Instructions
• Instruction execution would be faster
• Smaller Programs
 Simple Instructions:
• RISC used complex High level Language operation as a single machine instruction.

7.  Instruction Execution would be faster:
• It is obvious that a complex high level language operation will execute faster as a single machine
instruction rather than a series of more primitive instructions.
• But because of this, the entire control unit must be made more complex and the microprogram
control store must be made larger to accommodate a richer instruction set.
• Either factor increases the execution time of the simple instruction.
 Smaller Programs:
• In many cases, even if RISC programs are shorter, but the number of bits of memory occupied
may not be noticeably smaller.
• So there is little or no savings using RISC.
• Also, because there are more instructions on a RISC, longer opcodes are required, producing
longer instructions.

8. CISC
• Complex Instruction Set Computer
 Large number of complex instructions
 Low level
 Facilitate the extensive manipulation of low-level
computational elements and events such as memory, binary
arithmetic and addressing.
• Examples of CISC processors are the
 System/360
 VAX
 PDP-11
 Motorola 68000 family
 Intel x86 architecture based processors

9. WHY CISC?
Because of the shortfalls of RISC, CISC was introduced.
The reason was:
• Desire to Simplify Compilers
• Desire to Improve Performance
 Compiler Simplification:
• Task of compiler is to generate a sequence of machine instructions for each high level language (HLL)
statement.
• If there are machine instructions that resemble HLL statements, this task is simplified.
• But RISC researchers found that complex machine instructions are often hard to exploit because the
compiler must find those cases that exactly fit the construct.
• The task of optimizing the generated code to minimize code size, reduce instruction execution count and
enhance pipelining is much more difficult with a Complex Instruction Set (CISC) than RISC.

10.  Improve Performance:
• Smaller programs serves 2 purposes:
1. Less Memory
2. Improved Performance
• Performance can be improved in 2 ways:
1. Fewer instructions means fewer instruction bytes to be fetched.
2. In a paging environment, smaller programs occupy fewer pages, reducing page faults.

11. RISC CISC
Acronym Reduced Instruction Set Computer Complex Instruction Set Computer
Definition RISC processors have a smaller set of
instructions with few addressing modes
CISC processors have a larger set of
instructions with many addressing modes
Memory Unit It has no memory unit and uses a separate
hardware to implement instructions
It has a memory unit to implement complex
instructions
Program It is a hard-wired unit of programming It has a micro-programming unit
Design Complex Compiler design Easy Compiler design
Calculations Faster and precise Slow and precise
Decoding Decoding of instructions is simple Decoding of instructions is complex
Time Execution time is very less Execution time is very high
External
Memory
Does not require external memory for
calculations
Require external memory for calculations
Pipelining Pipelining does function correctly Pipelining does not function correctly
Code Expansion Can be a problem Is not a problem
Disk Space Space is saved Space is wasted
Applications Video processing, telecommunication Security systems, home automation

12. THANK YOU!!
ANKITA MUNDHRA
ANUJ TIWARI
DHARMRAJ YADAV