SlideShare ist ein Scribd-Unternehmen logo
1 von 75
 Unit-1 : Boolean Algebra 
 Unit-2 : Minimization of Switching Functions 
 Unit-3 : Combinational Logic Design 
 Unit-4 : Programmable Logic Devices, Threshold Logic 
 Unit-5 : Sequential Circuits 
 Unit-6 : Algorithmic State Machines
 Digital Design: Morris Mano, PHI,2nd Edition. 
 Switching & Finite Automata Theory-Zvi Kohavi, 
TMH, 2nd Edition.
BINARY SYSTEMS PROBLEMS
Octal : 
16 = 8¹ x 2 + 8º x 0 => (16)10 = (20)8 
32 = 8¹ x 4 + 8º x 0 => (32)10 = (40)8 
20, 21, 22, 23, 24, 25, 26, 27, 30, 31, 32, 33, 34, 35, 36, 37, 40 
Hexadecimal : 
16 = 16¹ x 1 + 16º x 0 => (16)10 = (10)16 
32 = 16¹ x 2 + 16º x 0 => (32)10 = (20)8 
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B , 1C, 1D, 1E, 1F, 20
1.2-) What is the exact number of bytes in a system 
that contains (a) 32K byte, (b)64M bytes, and 
(c)6.4G byte ? 
(a) 32K byte: 
1K = 2¹º = 1,024 
32K = 32 x 2¹º = 32 x 1,024 = 32,768 
32K byte = 32,768 byte
(b) 64M byte: 
1M = 2²º = 1,048,576 
64M = 64 x 2²º = 64 x 1,048,576 = 67,108,864 
64M byte = 67,108,864 byte 
(c) 6.4G byte: 
1G = 2³º = 1,073,741,824 
6.4G = 6.4 x 2³º = 6.4 x 1,073,741,824 = 6,871,747,674 
6.4G byte = 6,871,747,674 byte
1.3-) What is the largest binary number that can be 
expressed with 12 bits? What is the equivalent 
decimal and hexadecimal ? 
Binary: 
(111111111111)2 
Decimal: 
(111111111111)2 = 1x 2º+ 1 x 2¹ + 1 x 2² +…..+ 1 x 2¹¹ + 1 x 2¹² 
(111111111111)2 = 4,095 
Hexadecimal: 
(1111 1111 1111)2 
F F F 
= (FFF)16
1.4-) Convert the following numbers with the 
indicated bases to decimal : (4310)5 , and (198)12 . 
(4310)5 = 0 x 5º + 1 x 5¹ + 3 x 5² + 4 x 5³ = 0 + 5 + 75 + 500 
(4310)5 = 580 
(198)12 = 8 x 12º + 9 x 12¹ + 1 x 12² = 8 + 108 + 144 
(198)12 = 260
1.7-) Express the following numbers in decimal : 
(10110.0101)2 , (16.5)16 . 
( 1 0 1 1 0 . 0 1 0 1 )2 
4 3 2 1 0 -1 -2 -3 -4 
(10110.0101)2 = 2 + 4 + 16 + (1/4) + (1/16) 
(10110.0101)2 = 22.3125 
( 1 6 . 5 )16 
1 0 -1 
(16.5)16 = 6 + 16 + (5/16) 
(16.5)16 = 22.3125 
= 2¹ + 2² + (2^4) +( 2^-2) + (2^-4)
1.8-) Convert the following binary numbers to 
hexadecimal and to decimal : (a) 1.11010 
(a) ( 1 . 1101 0 )2 = ( 1 . D )16 = 1 x 16º + D x (16^-1) 
1 D 0 0 -1
1.9-) Convert the hexadecimal number 68BE to 
binary and then from binary convert it to octal . 
(68BE)16 
Binary form: 
(0110 1000 1011 
1110)2=(0110100010111110)2 
6 8 B E 
Octal form: 
(0 110 100 010 111 110)2 
0 6 4 2 7 6 =(064276)8
(a) 1.10-) Convert the decimal number 345 to 
binary in two ways : 
Convert directly to binary; 
Convert first to hexadecimal, then from 
hexadecimal to binary. Which method is faster 
?
Method 1: 
(345)10 
Number Divided by 2 Remainder 
345 345/2=172 1 
172 172/2=86 0 
86 86/2=43 0 
43 43/2=21 1 
21 21/2=10 1 
10 10/2=5 0 
5 5/2=2 1 
2 2/2=1 1
Method 2: 
Number 
Divided by 
16 
Remainder 
345 345/16=21 9 
21 21/16=1 5 
(345)10=(159)16 (1 101 1001)2
1.11-) Do the following conversion problems : 
(a) Convert decimal 34.4375 to binary . 
(b) Calculate the binary equivalent of 1/3 out 
to 8 places. 
Then convert from binary to decimal. How 
close is the result to 1/3 ? 
(c) Convert the binary result in (b) into 
hexadecimal. Then convert the result to 
decimal . Is the answer the same ?
(a) 34.4375 
34 0.4375 
34:2=17 r=0 
17:2=8 r=1 
8:2=4 r=0 
4:2=2 r=0 
2:2=1 r=0 
34=(100010)2 
0.4375*2=0.875 r=0 
0.875*2=1.75 r=1 
0.75*2=1.5 r=1 
0.5*2=1.0 r=1 
0*2=0 r=0 
0.4375=(0.01110)2 
34.4375=(100010.01110)2
(b) 1/3=0.3333… 
0.33333*2=0.66666 r=0 
0.66666*2=1.33332 r=1 
0.33332*2=0.66664 r=0 
0.66664*2=1.33328 r=1 
. 
. 
. 
0.3333…=(0.010101….)= 0+ ¼ + 0 + 1/8 + 
0 + 1/32 +… =~0.33333…
(c) 
0.010101010…=0.0101 0101 0101 
(0.555..)16=5/16 +5/256 +5/4096 +…=~0.33203
1.12-) Add and multiply the following numbers 
without 
converting them to decimal. 
(a) Binary numbers 1011 and 101 . 
(a) 1011 (11) 1011(11) 
101 (5) 101(5) 
+__________ x_____ 
10000(16) 1011 
0000 
+ 1011 
_________ 
110111 (55)
1.13-) Perform the following division in binary : 
1011111 ÷ 101 . 
(1011111)2=95 
(101)2=5 
95/5=19 (10011)2 
1011111 101 
101 10011 
000111 
101 
0101 
101 
0000
1.14-) Find the 9’s- and the 10’s-complement of 
the following decimal numbers : 
(a) 98127634 (b) 72049900 (c) 10000000 (d) 
00000000 . 
9’s comlements : 
(a) 99999999-98127634=01872365 
(b) 99999999-72049900=27950099 
(c) 99999999-10000000=89999999 
(d) 99999999-0000000=99999999
10’s complements 
(a)100000000- 98127634= 01872366 
(b)100000000-72049900=27950100 
(c)100000000-10000000=90000000
1.16-) Obtain the 1’s and 2’S complements of the 
following binary numbers : 
(a)11101010 (b)01111110 (c)00000001 
(d)10000000 
1’s complements: 
(a) 00010101 (b)10000001 (c)11111110 (d)01111111 
2’s complement : 
(a) 00010110 (b)10000010 (c)11111111 (d)10000000
Boolean Algebra
1. Axiomatic definition of Boolean algebra 
2. Binary operators 
3. Postulates and Theorems 
4. Switching functions 
5. Canonical forms and standard forms 
6. Simplification of switching functions using 
theorems
1. Axiomatic definition of Boolean algebra 
2. Binary operators
3. Postulates and Theorems
Postulate 2 (a) x+0 = x (b) x.1 = x 
Postulate 5 (a) x+x’ = 1 (b) x.x’ = 0 
Theorem 1 (a) x+x = x (b) x.x = x 
Theorem 2 (a) x+1 = 1 (b) x.0 = 0 
Theorem3, involution (x’)’ = x 
Postulate3, commutative (a) x+y = y+x (b) xy = yx 
Theorem4, associative (a) x+(y+z)=(x+y)+z (b) x(yz) = (xy)z 
Postulate4, distributive (a) x(y+z)=xy+xz (b) x+yz = (x+y)(x+z) 
Theorem5, DeMorgan (a) (x+y)’ = x’y’ (b) (xy)’ = x’+y’ 
Theorem6, absorption (a) x+xy = x (b) x(x+y)=x
4. Switching functions
x y x.y x y x+y x x’ 
0 0 0 0 0 0 0 1 
0 1 0 0 1 1 1 0 
1 0 0 1 0 1 
1 1 1 1 1 1 
x.(y+z) = (x.y)+(x.z) 
x y z Y+z x.(y+z) x.y x.z (x.y)+x.z 
0 0 0 0 0 0 0 0 
0 0 1 1 0 0 0 0 
0 1 0 1 0 0 0 0 
0 1 1 1 0 0 0 0 
1 0 0 0 0 0 0 0 
1 0 1 1 1 0 1 1 
1 1 0 1 1 1 0 1 
1 1 1 1 1 1 1 1
Operator Precedence 
1.( ) 
2.NOT 
3.AND 
4.OR
x y z F1 F2 F3 F4 
0 0 0 0 0 0 0 
0 0 1 0 1 1 1 
0 1 0 0 0 0 0 
0 1 1 0 0 1 1 
1 0 0 0 1 1 1 
1 0 1 0 1 1 1 
1 1 0 1 1 0 0 
1 1 1 0 1 0 0
x 
y 
z 
F1 
z 
y 
F2 
x 
(a) F1 = xyz’ 
(b) F2 = x+y’z 
(c) F3 = x’y’z+x’yz+xy’ 
F3 
x 
y 
z
F4 
(c) F4 = xy’+x’z 
x 
y 
z 
Implementation of Boolean Function with GATES
1. x+x’y = (x+x’)(x+y) 
= 1.(x+y)=x+y 
2. x(x’+y) = xx’+xy 
= 0+xy=xy 
3. x’y’z+x’yz+xy’ 
= x’z(y’+y)+xy’ 
= x’z+xy’ 
4. xy+x’z+yz (Consensus Theorem) 
=xy+x’z+yz(x+x’) 
=xy+x’z+xyz+x’yz 
=xy(1+z)+x’z(1+y) 
=xy+x’z 
5. (x+y)(x’+z)(y+z)=(x+y)(x’+z) 
by duality from function 4
(A+B+C)’ = (A+X)’ 
= A’X’ 
= A’.(B+C)’ 
= A’.(B’C’) 
= A’B’C’ 
(A+B+C+D+…..Z)’ = A’B’C’D’…..Z’ 
(ABCD….Z)’ = A’+B’+C’+D’+….+Z’ 
Example using De Morgan’s Theorem (Method-1) 
F1 = x’yz’+x’y’z 
F1’ = (x’yz’+x’y’z)’ 
= (x+y’+z)(x+y+z’) 
F2 = x(y’z’+yz) 
F2’= [x(y’z’+yz)]’ 
= x’+(y+z)(y’+z’)
F1 = x’yz’ + x’y’z 
Dual of F1 = (x’+y+z’)(x’+y’+z) 
Complement  F1’ = (x+y’+z)(x+y+z’) 
F2 = x(y’z’+yz) 
Dual of F2=x+[(y’+z’)(y+z)] 
Complement =F2’= x’+ (y+z)(y’+z’)
Minterm or a Standard Product 
n variables forming an AND term provide 2n possible 
combinations, called minterms or standard products (denoted as 
m1, m2 etc.). 
Variable primed if a bit is 0 
Variable unprimed if a bit is 1 
Maxterm or a Standard Sum 
n variables forming an OR term provide 2n possible 
combinations, called maxterms or standard sums (denoted as 
M1,M2 etc.). 
Variable primed if a bit is 1 
Variable unprimed if a bit is 0
MINTERMS MAXTERMS 
x y z Term Designation Term Designation 
0 0 0 x’y’z’ m0 x+y+z M0 
0 0 1 x’y’z m1 x+y+z’ M1 
0 1 0 x’yz’ m2 x+y’+z M2 
0 1 1 x’yz m3 x+y’+z’ M3 
1 0 0 xy’z’ m4 x’+y+z M4 
1 0 1 xy’z m5 x’+y+z’ M5 
1 1 0 xyz’ m6 x’+y’+z M6 
1 1 1 xyz m7 x’+y’+z’ M7
x y z Function f1 Function f2 
0 0 0 0 0 
0 0 1 1 0 
0 1 0 0 0 
0 1 1 0 1 
1 0 0 1 0 
1 0 1 0 1 
1 1 0 0 1 
1 1 1 1 1 
f1 = x’y’z+xy’z’+xyz =m1 + m4 + m7 
f2 = x’yz+xy’z+xyz’+xyz = m3 + m5 + m6 + 
m7
f1 = x’y’z+xy’z’+xyz 
f1’ = x’y’z’+x’yz’+x’yz+xy’z+xyz’ 
f1 =(x+y+z)(x+y’+z)(x+y’+z’)(x’+y+z’) (x’+y’+z) 
= M0.M2.M3.M5.M6 
= M0M2M3M5M6 
f2 = x’yz+xy’z+xyz’+xyz 
f2’ = x’y’z’+x’y’z+x’yz’+xy’z’ 
f2 = (x+y+z)(x+y+z’)(x+y’+z)(x’+y+z) 
= M0 M1 M2 M4
Boolean functions expressed as a sum of 
minterms or product of maxterms are said to 
be in canonical form. 
m3+m5+m6+m7 or M0 M1 M2 M4
Example: F = A+B’C 
F = A(B+B’)+B’C(A+A’) 
= AB+AB’+AB’C+A’B’C 
= AB(C+C’)+AB’(C+C’)+AB’C+A’B’C 
= ABC+ABC’+AB’C+AB’C’+AB’C+A’B’C 
= A’B’C+AB’C’+AB’C+ABC’+ABC 
= m1+m4+m5+m6+m7 
F(A,B,C)=(1,4,5,6,7) 
ORing of term AND terms of variables A,B &C 
They are minterms of the function
Example: F = xy+x’z 
F = xy+x’z 
F = (xy+x’)(xy+z) distr.law (x+yz)=(x+y)(x+z) 
= (x+x’)(y+x’)(x+z)(y+z) 
= (x’+y)(x+z)(y+z) 
= (x’+y+zz’)(x+z+yy’)(y+z+xx’) 
= 
(x’+y+z)(x’+y+z’)(x+z+y)(x+z+y’)(y+z+x)(y+z+x’ 
) 
= (x+y+z)(x+y’+z)(x’+y+z)(x’+y+z’) 
= M0 M2 M4 M5 
F(x,y,z) = (0,2,4,5) 
ANDing of terms Maxterms of the function (4 OR 
terms of variables 
x,y&z)
F(A,B,C) = (1,4,5,6,7) 
 sum of minterms 
F’(A,B,C) = (0,2,3) 
= m0+m2+m3 
F(A,B,C) = (m0+m2+m3)’ 
= m0’.m2’.m3’ 
= M0 M2 M3 
= (0,2,3) 
 Product of maxterms 
Similarly 
F(x,y,z) = (0,2,4,5) 
F(x,y,z) = (1,3,6,7)
Sum of Products (OR operations) 
F1 = y’+xy+x’yz’ 
(AND term/product term) 
Product of Sums (AND operations) 
F2=x(y’+z)(x’+y+z’+w) 
(OR term/sum term) 
Non-standard form 
F3=(AB+CD)(A’B’+C’D’) 
Standard form of F3 
F3=ABC’D’ + A’B’CD
x y F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 
0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 
1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 
1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 
Operator 
symbols 
+ ,  ,  
F0 = 0 F1 = xy F2 = xy’ F3 = x 
F4 = x’y F5 = y F6 = xy’ +x’y F7= x +y 
F8 = (x+y)’ F9 = xy +x’y’ F10 = y’ F11 = x +y’ 
F12 = x’ F13 = x’ + y F14 = (xy)’ F15 = 1
 Equivalence is also known as equality, coincidence, 
and exclusive NOR. 
 16 logic operations are obtained from two variables 
x & y 
 Standard gates used in digital design are: 
complement, transfer, AND, OR , NAND, NOR, XOR & 
XNOR (equivalence).
NAME GRAPHIC 
SYMBOL 
ALGEBRIC 
FUNCTION 
TRUTH 
TABLE 
AND F=XY X Y F 
0 0 0 
0 1 0 
1 0 0 
1 1 1 
OR F=X+Y X Y F 
0 0 0 
0 1 1 
1 0 1 
1 1 1 
X 
Y 
F 
X 
Y 
F
NAME GRAPHIC 
SYMBOL 
ALGEBRIC 
FUNCTION 
TRUTH 
TABLE 
Inverter 
F=X’ 
X F 
0 1 
1 0 
Buffer 
F=X 
X F 
0 0 
1 1 
NAND F=(XY)’ 
X Y F 
0 0 1 
0 1 1 
1 0 1 
1 1 0 
X F 
X F 
X F 
Y
NAME GRAPHIC 
SYMBOL 
ALGEBRIC 
FUNCTION 
TRUTH 
TABLE 
X 
NOR F=(X+Y)’ 
X Y F 
0 0 1 
0 1 0 
1 0 0 
1 1 0 
Exclusive-OR 
(XOR) 
F=XY’+X’Y 
= X  Y 
X Y F 
0 0 0 
0 1 1 
1 0 1 
1 1 0 
Exclusive-NOR 
or 
Equivalence 
F=XY+X’Y’ 
=X Y 
X Y F 
0 0 1 
0 1 0 
1 0 0 
1 1 1 
Y F 
X F 
Y 
X F 
Y
Y (X Y) Z=(X+Y) Z’ 
Y 
x 
(X+Y)’ 
=XZ’+YZ 
’ 
[Z+(X+Y)’]’ 
(Y+Z)’ 
(X ( Y Z)=X’(Y+ Z) 
=X’Y+X’ 
Z 
[X+(Y+Z)’]’ 
Z 
X 
Z 
Demonstrating the nonassociativity of the NOR operator 
(X  Y) Z  X (Y Z)
XY 
Z 
(X+Y+Z) 
’ 
X 
Y 
Z 
(XYZ)’ 
(a) There input NOR gate (b) There input NAND gate 
A 
B 
C 
D 
E 
F=[(ABC)’. (DE)’]’=ABC+DE 
(c) Cascaded NAND gates 
Multiple-input AND cascaded NOR and NAND gates
X 
Y 
Z F=X  Y  Z 
(a) Using two input 
gates 
X 
Y 
Z 
(b) Three input gates 
(b) Three input exclusive OR gates 
TRUTH TABLE 
X Y Z F 
0 0 0 0 1 
0 0 1 1 0 
0 1 0 1 0 
0 1 1 0 1 
1 0 0 1 0 
1 0 1 0 1 
1 1 0 0 1 
1 1 1 1 0 
XOR 
XNOR 
Odd 
functio 
n 
Even 
functio 
n 
F=X  Y  Z
Signal amplitude assignment and type of logic 
1 H 
0 
L 
0 
1 
H 
L 
LOGIC 
VALUE 
SIGNAL 
VALUE 
LOGIC 
VALUE 
SIGNAL 
VALUE 
Negative Logic 
Positive Logic
DEMONSTRATION OF POSITIVE AND 
X y z 
1 1 0 
1 0 1 
0 1 1 
0 0 1 
Truth table for negative 
logic 
L=1 H=0 
NEGATIVE LOGIC 
x 
z 
y 
Graphic symbol for negative 
logic NOR gate 
Same gate can function 
+ive logic NAND or -ive logic NOR 
+ive logic NOR or -ive logic 
NAND
 F(A,B,C)=(1,4,5,6,7) 
 F(A,B,C)=(1,2,3,6,7) 
 F(x,y,z)=(1,4,5,6,7) 
 F(x,y,z) = (0,2,4,5)
The End

Weitere ähnliche Inhalte

Was ist angesagt?

Was ist angesagt? (20)

State space models
State space modelsState space models
State space models
 
Newton's Backward Interpolation Formula with Example
Newton's Backward Interpolation Formula with ExampleNewton's Backward Interpolation Formula with Example
Newton's Backward Interpolation Formula with Example
 
Digital Logic & Design
Digital Logic & DesignDigital Logic & Design
Digital Logic & Design
 
DSP_FOEHU - MATLAB 01 - Discrete Time Signals and Systems
DSP_FOEHU - MATLAB 01 - Discrete Time Signals and SystemsDSP_FOEHU - MATLAB 01 - Discrete Time Signals and Systems
DSP_FOEHU - MATLAB 01 - Discrete Time Signals and Systems
 
Z Transform And Inverse Z Transform - Signal And Systems
Z Transform And Inverse Z Transform - Signal And SystemsZ Transform And Inverse Z Transform - Signal And Systems
Z Transform And Inverse Z Transform - Signal And Systems
 
Lyapunov stability
Lyapunov stability Lyapunov stability
Lyapunov stability
 
Lyapunov stability
Lyapunov stability Lyapunov stability
Lyapunov stability
 
Fixed-point arithmetic
Fixed-point arithmeticFixed-point arithmetic
Fixed-point arithmetic
 
Fourier series Introduction
Fourier series IntroductionFourier series Introduction
Fourier series Introduction
 
Fourier transform
Fourier transformFourier transform
Fourier transform
 
Langrange Interpolation Polynomials
Langrange Interpolation PolynomialsLangrange Interpolation Polynomials
Langrange Interpolation Polynomials
 
Fast fourier transform
Fast fourier transformFast fourier transform
Fast fourier transform
 
Lu decomposition
Lu decompositionLu decomposition
Lu decomposition
 
1st order differential equations
1st order differential equations1st order differential equations
1st order differential equations
 
Chapter 03 cyclic codes
Chapter 03   cyclic codesChapter 03   cyclic codes
Chapter 03 cyclic codes
 
Derivate
DerivateDerivate
Derivate
 
Complex numbers 1
Complex numbers 1Complex numbers 1
Complex numbers 1
 
Interpolation in Numerical Methods
Interpolation in Numerical Methods Interpolation in Numerical Methods
Interpolation in Numerical Methods
 
Sequential logic circuits flip-flop pt 1
Sequential logic circuits   flip-flop pt 1Sequential logic circuits   flip-flop pt 1
Sequential logic circuits flip-flop pt 1
 
Fourier transform
Fourier transformFourier transform
Fourier transform
 

Andere mochten auch

Switching theory and logic design.
Switching theory and logic design.Switching theory and logic design.
Switching theory and logic design.Anto Jose Moyalan
 
Logic design and switching theory
Logic design and switching theoryLogic design and switching theory
Logic design and switching theoryjomerson remorosa
 
Digital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 unitsDigital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 unitsLekashri Subramanian
 
Difference Between Emulation & Simulation
Difference Between Emulation & SimulationDifference Between Emulation & Simulation
Difference Between Emulation & Simulationcatchanil1989
 
Computing and informatics class notes for amie
Computing and informatics class notes for amieComputing and informatics class notes for amie
Computing and informatics class notes for amiePanduga Kumar
 
Environment protection act
Environment protection actEnvironment protection act
Environment protection actSurbhi Gupta
 
Environment Protection Act
Environment Protection ActEnvironment Protection Act
Environment Protection Actsairamya20
 
Flip flops, counters & registers
Flip flops, counters & registersFlip flops, counters & registers
Flip flops, counters & registersDharit Unadkat
 
Understanding Factors Affecting House Form
Understanding Factors Affecting House FormUnderstanding Factors Affecting House Form
Understanding Factors Affecting House FormPratik Zaveri
 
Karnaugh Mapping Explained
Karnaugh Mapping ExplainedKarnaugh Mapping Explained
Karnaugh Mapping Explainedml4ml4
 
Environmental Pollution, protective measures of pollution
 Environmental Pollution, protective measures of pollution Environmental Pollution, protective measures of pollution
Environmental Pollution, protective measures of pollutionpardeeprattan
 
digital electronics
digital electronicsdigital electronics
digital electronicsjani
 

Andere mochten auch (20)

Switching theory and logic design.
Switching theory and logic design.Switching theory and logic design.
Switching theory and logic design.
 
Logic design and switching theory
Logic design and switching theoryLogic design and switching theory
Logic design and switching theory
 
Digital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 unitsDigital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 units
 
electromagnetic fields-1
   electromagnetic fields-1   electromagnetic fields-1
electromagnetic fields-1
 
STLD- Switching functions
STLD- Switching functions STLD- Switching functions
STLD- Switching functions
 
Karnaugh
KarnaughKarnaugh
Karnaugh
 
Unit 1(stld)
Unit 1(stld) Unit 1(stld)
Unit 1(stld)
 
Difference Between Emulation & Simulation
Difference Between Emulation & SimulationDifference Between Emulation & Simulation
Difference Between Emulation & Simulation
 
Computing and informatics class notes for amie
Computing and informatics class notes for amieComputing and informatics class notes for amie
Computing and informatics class notes for amie
 
STLD Unit 1
STLD Unit 1STLD Unit 1
STLD Unit 1
 
Environment protection act
Environment protection actEnvironment protection act
Environment protection act
 
Sodc 1 Introduction
Sodc 1 IntroductionSodc 1 Introduction
Sodc 1 Introduction
 
Environment Protection Act
Environment Protection ActEnvironment Protection Act
Environment Protection Act
 
Flip flops, counters & registers
Flip flops, counters & registersFlip flops, counters & registers
Flip flops, counters & registers
 
Understanding Factors Affecting House Form
Understanding Factors Affecting House FormUnderstanding Factors Affecting House Form
Understanding Factors Affecting House Form
 
PHASE LOCK LOOPs
PHASE LOCK LOOPsPHASE LOCK LOOPs
PHASE LOCK LOOPs
 
Karnaugh Mapping Explained
Karnaugh Mapping ExplainedKarnaugh Mapping Explained
Karnaugh Mapping Explained
 
Environmental Pollution, protective measures of pollution
 Environmental Pollution, protective measures of pollution Environmental Pollution, protective measures of pollution
Environmental Pollution, protective measures of pollution
 
Phase locked loop
Phase locked loopPhase locked loop
Phase locked loop
 
digital electronics
digital electronicsdigital electronics
digital electronics
 

Ähnlich wie Unit 1(stld)

11 x1 t09 03 rules for differentiation (2013)
11 x1 t09 03 rules for differentiation (2013)11 x1 t09 03 rules for differentiation (2013)
11 x1 t09 03 rules for differentiation (2013)Nigel Simmons
 
Kuliah 3 Sistem Digital.pptx
Kuliah 3 Sistem Digital.pptxKuliah 3 Sistem Digital.pptx
Kuliah 3 Sistem Digital.pptxTakaQiYazuru1
 
Revision test 1
Revision test 1Revision test 1
Revision test 1MARA
 
Calculus 10th edition anton solutions manual
Calculus 10th edition anton solutions manualCalculus 10th edition anton solutions manual
Calculus 10th edition anton solutions manualReece1334
 
Logic Design - Chapter 3: Boolean Algebra
Logic Design - Chapter 3: Boolean AlgebraLogic Design - Chapter 3: Boolean Algebra
Logic Design - Chapter 3: Boolean AlgebraGouda Mando
 
MT T4 (Bab 3: Fungsi Kuadratik)
MT T4 (Bab 3: Fungsi Kuadratik)MT T4 (Bab 3: Fungsi Kuadratik)
MT T4 (Bab 3: Fungsi Kuadratik)hasnulslides
 
Lecture4 binary-numbers-logic-operations
Lecture4  binary-numbers-logic-operationsLecture4  binary-numbers-logic-operations
Lecture4 binary-numbers-logic-operationsmarkme18
 
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...JanakiramanLohitha
 
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...NikxzsLeonTormon
 
Zeros of polynomial functions
Zeros of polynomial functionsZeros of polynomial functions
Zeros of polynomial functionsRhodaLuis
 
01 derivadas
01   derivadas01   derivadas
01 derivadasklorofila
 
Interpolation functions
Interpolation functionsInterpolation functions
Interpolation functionsTarun Gehlot
 
Chapter 6 taylor and maclaurin series
Chapter 6 taylor and maclaurin seriesChapter 6 taylor and maclaurin series
Chapter 6 taylor and maclaurin seriesIrfaan Bahadoor
 
Applied numerical methods lec10
Applied numerical methods lec10Applied numerical methods lec10
Applied numerical methods lec10Yasser Ahmed
 

Ähnlich wie Unit 1(stld) (20)

Bolum1cozumler
Bolum1cozumlerBolum1cozumler
Bolum1cozumler
 
11 x1 t09 03 rules for differentiation (2013)
11 x1 t09 03 rules for differentiation (2013)11 x1 t09 03 rules for differentiation (2013)
11 x1 t09 03 rules for differentiation (2013)
 
Kuliah 3 Sistem Digital.pptx
Kuliah 3 Sistem Digital.pptxKuliah 3 Sistem Digital.pptx
Kuliah 3 Sistem Digital.pptx
 
Revision test 1
Revision test 1Revision test 1
Revision test 1
 
Calculus 10th edition anton solutions manual
Calculus 10th edition anton solutions manualCalculus 10th edition anton solutions manual
Calculus 10th edition anton solutions manual
 
Logic Design - Chapter 3: Boolean Algebra
Logic Design - Chapter 3: Boolean AlgebraLogic Design - Chapter 3: Boolean Algebra
Logic Design - Chapter 3: Boolean Algebra
 
SOAL RANGKAIAN LOGIKA
SOAL RANGKAIAN LOGIKASOAL RANGKAIAN LOGIKA
SOAL RANGKAIAN LOGIKA
 
MT T4 (Bab 3: Fungsi Kuadratik)
MT T4 (Bab 3: Fungsi Kuadratik)MT T4 (Bab 3: Fungsi Kuadratik)
MT T4 (Bab 3: Fungsi Kuadratik)
 
Lecture4 binary-numbers-logic-operations
Lecture4  binary-numbers-logic-operationsLecture4  binary-numbers-logic-operations
Lecture4 binary-numbers-logic-operations
 
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
 
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
Solution_Manual_Digital_Design_With_an_Introduction_to_the_Verilog_HDL_5th_Ed...
 
Zeros of polynomial functions
Zeros of polynomial functionsZeros of polynomial functions
Zeros of polynomial functions
 
Digital Notes
Digital NotesDigital Notes
Digital Notes
 
CSE-205_ch-3.pptx
CSE-205_ch-3.pptxCSE-205_ch-3.pptx
CSE-205_ch-3.pptx
 
01 derivadas
01   derivadas01   derivadas
01 derivadas
 
Sect2 5
Sect2 5Sect2 5
Sect2 5
 
Interpolation functions
Interpolation functionsInterpolation functions
Interpolation functions
 
CIRCLES.pptx
CIRCLES.pptxCIRCLES.pptx
CIRCLES.pptx
 
Chapter 6 taylor and maclaurin series
Chapter 6 taylor and maclaurin seriesChapter 6 taylor and maclaurin series
Chapter 6 taylor and maclaurin series
 
Applied numerical methods lec10
Applied numerical methods lec10Applied numerical methods lec10
Applied numerical methods lec10
 

Mehr von Abhinay Potlabathini

A11 microprocessors & microcontrollers (common to eee, ece and ecm)
A11 microprocessors & microcontrollers (common to eee, ece and ecm)A11 microprocessors & microcontrollers (common to eee, ece and ecm)
A11 microprocessors & microcontrollers (common to eee, ece and ecm)Abhinay Potlabathini
 
A10 microprocessor & microcontrollers ( eee, ece & ecm )
A10 microprocessor & microcontrollers ( eee, ece & ecm )A10 microprocessor & microcontrollers ( eee, ece & ecm )
A10 microprocessor & microcontrollers ( eee, ece & ecm )Abhinay Potlabathini
 
A12 microprocessors & microcontrollers (common to eee & ecm)
A12 microprocessors & microcontrollers (common to eee & ecm)A12 microprocessors & microcontrollers (common to eee & ecm)
A12 microprocessors & microcontrollers (common to eee & ecm)Abhinay Potlabathini
 
A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)
A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)
A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)Abhinay Potlabathini
 
Op amps-and-linear-integrated-circuits-pdf
Op amps-and-linear-integrated-circuits-pdfOp amps-and-linear-integrated-circuits-pdf
Op amps-and-linear-integrated-circuits-pdfAbhinay Potlabathini
 

Mehr von Abhinay Potlabathini (20)

A11 microprocessors & microcontrollers (common to eee, ece and ecm)
A11 microprocessors & microcontrollers (common to eee, ece and ecm)A11 microprocessors & microcontrollers (common to eee, ece and ecm)
A11 microprocessors & microcontrollers (common to eee, ece and ecm)
 
A10 microprocessor & microcontrollers ( eee, ece & ecm )
A10 microprocessor & microcontrollers ( eee, ece & ecm )A10 microprocessor & microcontrollers ( eee, ece & ecm )
A10 microprocessor & microcontrollers ( eee, ece & ecm )
 
A12 microprocessors & microcontrollers (common to eee & ecm)
A12 microprocessors & microcontrollers (common to eee & ecm)A12 microprocessors & microcontrollers (common to eee & ecm)
A12 microprocessors & microcontrollers (common to eee & ecm)
 
A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)
A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)
A10 a11-microprocessor & microcontrollers (common to eee, ece & ecm)
 
GME - Unit 1
GME - Unit 1GME - Unit 1
GME - Unit 1
 
Op amps-and-linear-integrated-circuits-pdf
Op amps-and-linear-integrated-circuits-pdfOp amps-and-linear-integrated-circuits-pdf
Op amps-and-linear-integrated-circuits-pdf
 
Op-amp & its characteristics
Op-amp  & its characteristics Op-amp  & its characteristics
Op-amp & its characteristics
 
Underground cables
Underground cablesUnderground cables
Underground cables
 
Underground cables (1)
Underground cables  (1)Underground cables  (1)
Underground cables (1)
 
Proximity effect
Proximity effectProximity effect
Proximity effect
 
Insulators
Insulators Insulators
Insulators
 
Corona1
Corona1Corona1
Corona1
 
Capacitance
CapacitanceCapacitance
Capacitance
 
Coulombs law
Coulombs law Coulombs law
Coulombs law
 
Gauss law 1
Gauss law 1Gauss law 1
Gauss law 1
 
maxwells equation
 maxwells equation maxwells equation
maxwells equation
 
Emf applications
Emf applicationsEmf applications
Emf applications
 
Magnetic circuits (EMF)
Magnetic circuits (EMF)Magnetic circuits (EMF)
Magnetic circuits (EMF)
 
Poynting vector
Poynting vectorPoynting vector
Poynting vector
 
electric field, (dipoles)
  electric field, (dipoles)  electric field, (dipoles)
electric field, (dipoles)
 

Kürzlich hochgeladen

Z Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphZ Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphThiyagu K
 
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxBasic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxDenish Jangid
 
1029 - Danh muc Sach Giao Khoa 10 . pdf
1029 -  Danh muc Sach Giao Khoa 10 . pdf1029 -  Danh muc Sach Giao Khoa 10 . pdf
1029 - Danh muc Sach Giao Khoa 10 . pdfQucHHunhnh
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfAdmir Softic
 
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in DelhiRussian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhikauryashika82
 
The basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptxThe basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptxheathfieldcps1
 
Accessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactAccessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactdawncurless
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfagholdier
 
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...Shubhangi Sonawane
 
An Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdfAn Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdfSanaAli374401
 
Measures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SDMeasures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SDThiyagu K
 
APM Welcome, APM North West Network Conference, Synergies Across Sectors
APM Welcome, APM North West Network Conference, Synergies Across SectorsAPM Welcome, APM North West Network Conference, Synergies Across Sectors
APM Welcome, APM North West Network Conference, Synergies Across SectorsAssociation for Project Management
 
Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17Celine George
 
microwave assisted reaction. General introduction
microwave assisted reaction. General introductionmicrowave assisted reaction. General introduction
microwave assisted reaction. General introductionMaksud Ahmed
 
Introduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsIntroduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsTechSoup
 
Gardella_PRCampaignConclusion Pitch Letter
Gardella_PRCampaignConclusion Pitch LetterGardella_PRCampaignConclusion Pitch Letter
Gardella_PRCampaignConclusion Pitch LetterMateoGardella
 

Kürzlich hochgeladen (20)

Z Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot GraphZ Score,T Score, Percential Rank and Box Plot Graph
Z Score,T Score, Percential Rank and Box Plot Graph
 
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxBasic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
 
1029 - Danh muc Sach Giao Khoa 10 . pdf
1029 -  Danh muc Sach Giao Khoa 10 . pdf1029 -  Danh muc Sach Giao Khoa 10 . pdf
1029 - Danh muc Sach Giao Khoa 10 . pdf
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdf
 
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in DelhiRussian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
Russian Escort Service in Delhi 11k Hotel Foreigner Russian Call Girls in Delhi
 
The basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptxThe basics of sentences session 2pptx copy.pptx
The basics of sentences session 2pptx copy.pptx
 
Accessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impactAccessible design: Minimum effort, maximum impact
Accessible design: Minimum effort, maximum impact
 
Advance Mobile Application Development class 07
Advance Mobile Application Development class 07Advance Mobile Application Development class 07
Advance Mobile Application Development class 07
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdf
 
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
Ecological Succession. ( ECOSYSTEM, B. Pharmacy, 1st Year, Sem-II, Environmen...
 
Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024
 
An Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdfAn Overview of Mutual Funds Bcom Project.pdf
An Overview of Mutual Funds Bcom Project.pdf
 
Mattingly "AI & Prompt Design: The Basics of Prompt Design"
Mattingly "AI & Prompt Design: The Basics of Prompt Design"Mattingly "AI & Prompt Design: The Basics of Prompt Design"
Mattingly "AI & Prompt Design: The Basics of Prompt Design"
 
Measures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SDMeasures of Dispersion and Variability: Range, QD, AD and SD
Measures of Dispersion and Variability: Range, QD, AD and SD
 
APM Welcome, APM North West Network Conference, Synergies Across Sectors
APM Welcome, APM North West Network Conference, Synergies Across SectorsAPM Welcome, APM North West Network Conference, Synergies Across Sectors
APM Welcome, APM North West Network Conference, Synergies Across Sectors
 
Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17Advanced Views - Calendar View in Odoo 17
Advanced Views - Calendar View in Odoo 17
 
microwave assisted reaction. General introduction
microwave assisted reaction. General introductionmicrowave assisted reaction. General introduction
microwave assisted reaction. General introduction
 
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
Mattingly "AI & Prompt Design: Structured Data, Assistants, & RAG"
 
Introduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The BasicsIntroduction to Nonprofit Accounting: The Basics
Introduction to Nonprofit Accounting: The Basics
 
Gardella_PRCampaignConclusion Pitch Letter
Gardella_PRCampaignConclusion Pitch LetterGardella_PRCampaignConclusion Pitch Letter
Gardella_PRCampaignConclusion Pitch Letter
 

Unit 1(stld)

  • 1.
  • 2.  Unit-1 : Boolean Algebra  Unit-2 : Minimization of Switching Functions  Unit-3 : Combinational Logic Design  Unit-4 : Programmable Logic Devices, Threshold Logic  Unit-5 : Sequential Circuits  Unit-6 : Algorithmic State Machines
  • 3.  Digital Design: Morris Mano, PHI,2nd Edition.  Switching & Finite Automata Theory-Zvi Kohavi, TMH, 2nd Edition.
  • 5. Octal : 16 = 8¹ x 2 + 8º x 0 => (16)10 = (20)8 32 = 8¹ x 4 + 8º x 0 => (32)10 = (40)8 20, 21, 22, 23, 24, 25, 26, 27, 30, 31, 32, 33, 34, 35, 36, 37, 40 Hexadecimal : 16 = 16¹ x 1 + 16º x 0 => (16)10 = (10)16 32 = 16¹ x 2 + 16º x 0 => (32)10 = (20)8 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 1A, 1B , 1C, 1D, 1E, 1F, 20
  • 6. 1.2-) What is the exact number of bytes in a system that contains (a) 32K byte, (b)64M bytes, and (c)6.4G byte ? (a) 32K byte: 1K = 2¹º = 1,024 32K = 32 x 2¹º = 32 x 1,024 = 32,768 32K byte = 32,768 byte
  • 7. (b) 64M byte: 1M = 2²º = 1,048,576 64M = 64 x 2²º = 64 x 1,048,576 = 67,108,864 64M byte = 67,108,864 byte (c) 6.4G byte: 1G = 2³º = 1,073,741,824 6.4G = 6.4 x 2³º = 6.4 x 1,073,741,824 = 6,871,747,674 6.4G byte = 6,871,747,674 byte
  • 8. 1.3-) What is the largest binary number that can be expressed with 12 bits? What is the equivalent decimal and hexadecimal ? Binary: (111111111111)2 Decimal: (111111111111)2 = 1x 2º+ 1 x 2¹ + 1 x 2² +…..+ 1 x 2¹¹ + 1 x 2¹² (111111111111)2 = 4,095 Hexadecimal: (1111 1111 1111)2 F F F = (FFF)16
  • 9. 1.4-) Convert the following numbers with the indicated bases to decimal : (4310)5 , and (198)12 . (4310)5 = 0 x 5º + 1 x 5¹ + 3 x 5² + 4 x 5³ = 0 + 5 + 75 + 500 (4310)5 = 580 (198)12 = 8 x 12º + 9 x 12¹ + 1 x 12² = 8 + 108 + 144 (198)12 = 260
  • 10. 1.7-) Express the following numbers in decimal : (10110.0101)2 , (16.5)16 . ( 1 0 1 1 0 . 0 1 0 1 )2 4 3 2 1 0 -1 -2 -3 -4 (10110.0101)2 = 2 + 4 + 16 + (1/4) + (1/16) (10110.0101)2 = 22.3125 ( 1 6 . 5 )16 1 0 -1 (16.5)16 = 6 + 16 + (5/16) (16.5)16 = 22.3125 = 2¹ + 2² + (2^4) +( 2^-2) + (2^-4)
  • 11. 1.8-) Convert the following binary numbers to hexadecimal and to decimal : (a) 1.11010 (a) ( 1 . 1101 0 )2 = ( 1 . D )16 = 1 x 16º + D x (16^-1) 1 D 0 0 -1
  • 12. 1.9-) Convert the hexadecimal number 68BE to binary and then from binary convert it to octal . (68BE)16 Binary form: (0110 1000 1011 1110)2=(0110100010111110)2 6 8 B E Octal form: (0 110 100 010 111 110)2 0 6 4 2 7 6 =(064276)8
  • 13. (a) 1.10-) Convert the decimal number 345 to binary in two ways : Convert directly to binary; Convert first to hexadecimal, then from hexadecimal to binary. Which method is faster ?
  • 14. Method 1: (345)10 Number Divided by 2 Remainder 345 345/2=172 1 172 172/2=86 0 86 86/2=43 0 43 43/2=21 1 21 21/2=10 1 10 10/2=5 0 5 5/2=2 1 2 2/2=1 1
  • 15. Method 2: Number Divided by 16 Remainder 345 345/16=21 9 21 21/16=1 5 (345)10=(159)16 (1 101 1001)2
  • 16. 1.11-) Do the following conversion problems : (a) Convert decimal 34.4375 to binary . (b) Calculate the binary equivalent of 1/3 out to 8 places. Then convert from binary to decimal. How close is the result to 1/3 ? (c) Convert the binary result in (b) into hexadecimal. Then convert the result to decimal . Is the answer the same ?
  • 17. (a) 34.4375 34 0.4375 34:2=17 r=0 17:2=8 r=1 8:2=4 r=0 4:2=2 r=0 2:2=1 r=0 34=(100010)2 0.4375*2=0.875 r=0 0.875*2=1.75 r=1 0.75*2=1.5 r=1 0.5*2=1.0 r=1 0*2=0 r=0 0.4375=(0.01110)2 34.4375=(100010.01110)2
  • 18. (b) 1/3=0.3333… 0.33333*2=0.66666 r=0 0.66666*2=1.33332 r=1 0.33332*2=0.66664 r=0 0.66664*2=1.33328 r=1 . . . 0.3333…=(0.010101….)= 0+ ¼ + 0 + 1/8 + 0 + 1/32 +… =~0.33333…
  • 19. (c) 0.010101010…=0.0101 0101 0101 (0.555..)16=5/16 +5/256 +5/4096 +…=~0.33203
  • 20. 1.12-) Add and multiply the following numbers without converting them to decimal. (a) Binary numbers 1011 and 101 . (a) 1011 (11) 1011(11) 101 (5) 101(5) +__________ x_____ 10000(16) 1011 0000 + 1011 _________ 110111 (55)
  • 21. 1.13-) Perform the following division in binary : 1011111 ÷ 101 . (1011111)2=95 (101)2=5 95/5=19 (10011)2 1011111 101 101 10011 000111 101 0101 101 0000
  • 22. 1.14-) Find the 9’s- and the 10’s-complement of the following decimal numbers : (a) 98127634 (b) 72049900 (c) 10000000 (d) 00000000 . 9’s comlements : (a) 99999999-98127634=01872365 (b) 99999999-72049900=27950099 (c) 99999999-10000000=89999999 (d) 99999999-0000000=99999999
  • 23. 10’s complements (a)100000000- 98127634= 01872366 (b)100000000-72049900=27950100 (c)100000000-10000000=90000000
  • 24. 1.16-) Obtain the 1’s and 2’S complements of the following binary numbers : (a)11101010 (b)01111110 (c)00000001 (d)10000000 1’s complements: (a) 00010101 (b)10000001 (c)11111110 (d)01111111 2’s complement : (a) 00010110 (b)10000010 (c)11111111 (d)10000000
  • 26. 1. Axiomatic definition of Boolean algebra 2. Binary operators 3. Postulates and Theorems 4. Switching functions 5. Canonical forms and standard forms 6. Simplification of switching functions using theorems
  • 27. 1. Axiomatic definition of Boolean algebra 2. Binary operators
  • 28. 3. Postulates and Theorems
  • 29.
  • 30.
  • 31.
  • 32.
  • 33.
  • 34.
  • 35.
  • 36.
  • 37.
  • 38.
  • 39. Postulate 2 (a) x+0 = x (b) x.1 = x Postulate 5 (a) x+x’ = 1 (b) x.x’ = 0 Theorem 1 (a) x+x = x (b) x.x = x Theorem 2 (a) x+1 = 1 (b) x.0 = 0 Theorem3, involution (x’)’ = x Postulate3, commutative (a) x+y = y+x (b) xy = yx Theorem4, associative (a) x+(y+z)=(x+y)+z (b) x(yz) = (xy)z Postulate4, distributive (a) x(y+z)=xy+xz (b) x+yz = (x+y)(x+z) Theorem5, DeMorgan (a) (x+y)’ = x’y’ (b) (xy)’ = x’+y’ Theorem6, absorption (a) x+xy = x (b) x(x+y)=x
  • 40.
  • 42.
  • 43.
  • 44.
  • 45.
  • 46. x y x.y x y x+y x x’ 0 0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 1 1 1 1 1 1 x.(y+z) = (x.y)+(x.z) x y z Y+z x.(y+z) x.y x.z (x.y)+x.z 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 1 1 0 1 1 1 1 0 1 1 1 0 1 1 1 1 1 1 1 1 1
  • 47. Operator Precedence 1.( ) 2.NOT 3.AND 4.OR
  • 48. x y z F1 F2 F3 F4 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 1 0 0 0 0 0 0 1 1 0 0 1 1 1 0 0 0 1 1 1 1 0 1 0 1 1 1 1 1 0 1 1 0 0 1 1 1 0 1 0 0
  • 49. x y z F1 z y F2 x (a) F1 = xyz’ (b) F2 = x+y’z (c) F3 = x’y’z+x’yz+xy’ F3 x y z
  • 50. F4 (c) F4 = xy’+x’z x y z Implementation of Boolean Function with GATES
  • 51. 1. x+x’y = (x+x’)(x+y) = 1.(x+y)=x+y 2. x(x’+y) = xx’+xy = 0+xy=xy 3. x’y’z+x’yz+xy’ = x’z(y’+y)+xy’ = x’z+xy’ 4. xy+x’z+yz (Consensus Theorem) =xy+x’z+yz(x+x’) =xy+x’z+xyz+x’yz =xy(1+z)+x’z(1+y) =xy+x’z 5. (x+y)(x’+z)(y+z)=(x+y)(x’+z) by duality from function 4
  • 52. (A+B+C)’ = (A+X)’ = A’X’ = A’.(B+C)’ = A’.(B’C’) = A’B’C’ (A+B+C+D+…..Z)’ = A’B’C’D’…..Z’ (ABCD….Z)’ = A’+B’+C’+D’+….+Z’ Example using De Morgan’s Theorem (Method-1) F1 = x’yz’+x’y’z F1’ = (x’yz’+x’y’z)’ = (x+y’+z)(x+y+z’) F2 = x(y’z’+yz) F2’= [x(y’z’+yz)]’ = x’+(y+z)(y’+z’)
  • 53. F1 = x’yz’ + x’y’z Dual of F1 = (x’+y+z’)(x’+y’+z) Complement  F1’ = (x+y’+z)(x+y+z’) F2 = x(y’z’+yz) Dual of F2=x+[(y’+z’)(y+z)] Complement =F2’= x’+ (y+z)(y’+z’)
  • 54. Minterm or a Standard Product n variables forming an AND term provide 2n possible combinations, called minterms or standard products (denoted as m1, m2 etc.). Variable primed if a bit is 0 Variable unprimed if a bit is 1 Maxterm or a Standard Sum n variables forming an OR term provide 2n possible combinations, called maxterms or standard sums (denoted as M1,M2 etc.). Variable primed if a bit is 1 Variable unprimed if a bit is 0
  • 55. MINTERMS MAXTERMS x y z Term Designation Term Designation 0 0 0 x’y’z’ m0 x+y+z M0 0 0 1 x’y’z m1 x+y+z’ M1 0 1 0 x’yz’ m2 x+y’+z M2 0 1 1 x’yz m3 x+y’+z’ M3 1 0 0 xy’z’ m4 x’+y+z M4 1 0 1 xy’z m5 x’+y+z’ M5 1 1 0 xyz’ m6 x’+y’+z M6 1 1 1 xyz m7 x’+y’+z’ M7
  • 56. x y z Function f1 Function f2 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 f1 = x’y’z+xy’z’+xyz =m1 + m4 + m7 f2 = x’yz+xy’z+xyz’+xyz = m3 + m5 + m6 + m7
  • 57. f1 = x’y’z+xy’z’+xyz f1’ = x’y’z’+x’yz’+x’yz+xy’z+xyz’ f1 =(x+y+z)(x+y’+z)(x+y’+z’)(x’+y+z’) (x’+y’+z) = M0.M2.M3.M5.M6 = M0M2M3M5M6 f2 = x’yz+xy’z+xyz’+xyz f2’ = x’y’z’+x’y’z+x’yz’+xy’z’ f2 = (x+y+z)(x+y+z’)(x+y’+z)(x’+y+z) = M0 M1 M2 M4
  • 58. Boolean functions expressed as a sum of minterms or product of maxterms are said to be in canonical form. m3+m5+m6+m7 or M0 M1 M2 M4
  • 59. Example: F = A+B’C F = A(B+B’)+B’C(A+A’) = AB+AB’+AB’C+A’B’C = AB(C+C’)+AB’(C+C’)+AB’C+A’B’C = ABC+ABC’+AB’C+AB’C’+AB’C+A’B’C = A’B’C+AB’C’+AB’C+ABC’+ABC = m1+m4+m5+m6+m7 F(A,B,C)=(1,4,5,6,7) ORing of term AND terms of variables A,B &C They are minterms of the function
  • 60. Example: F = xy+x’z F = xy+x’z F = (xy+x’)(xy+z) distr.law (x+yz)=(x+y)(x+z) = (x+x’)(y+x’)(x+z)(y+z) = (x’+y)(x+z)(y+z) = (x’+y+zz’)(x+z+yy’)(y+z+xx’) = (x’+y+z)(x’+y+z’)(x+z+y)(x+z+y’)(y+z+x)(y+z+x’ ) = (x+y+z)(x+y’+z)(x’+y+z)(x’+y+z’) = M0 M2 M4 M5 F(x,y,z) = (0,2,4,5) ANDing of terms Maxterms of the function (4 OR terms of variables x,y&z)
  • 61. F(A,B,C) = (1,4,5,6,7)  sum of minterms F’(A,B,C) = (0,2,3) = m0+m2+m3 F(A,B,C) = (m0+m2+m3)’ = m0’.m2’.m3’ = M0 M2 M3 = (0,2,3)  Product of maxterms Similarly F(x,y,z) = (0,2,4,5) F(x,y,z) = (1,3,6,7)
  • 62. Sum of Products (OR operations) F1 = y’+xy+x’yz’ (AND term/product term) Product of Sums (AND operations) F2=x(y’+z)(x’+y+z’+w) (OR term/sum term) Non-standard form F3=(AB+CD)(A’B’+C’D’) Standard form of F3 F3=ABC’D’ + A’B’CD
  • 63. x y F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Operator symbols + ,  ,  F0 = 0 F1 = xy F2 = xy’ F3 = x F4 = x’y F5 = y F6 = xy’ +x’y F7= x +y F8 = (x+y)’ F9 = xy +x’y’ F10 = y’ F11 = x +y’ F12 = x’ F13 = x’ + y F14 = (xy)’ F15 = 1
  • 64.
  • 65.  Equivalence is also known as equality, coincidence, and exclusive NOR.  16 logic operations are obtained from two variables x & y  Standard gates used in digital design are: complement, transfer, AND, OR , NAND, NOR, XOR & XNOR (equivalence).
  • 66. NAME GRAPHIC SYMBOL ALGEBRIC FUNCTION TRUTH TABLE AND F=XY X Y F 0 0 0 0 1 0 1 0 0 1 1 1 OR F=X+Y X Y F 0 0 0 0 1 1 1 0 1 1 1 1 X Y F X Y F
  • 67. NAME GRAPHIC SYMBOL ALGEBRIC FUNCTION TRUTH TABLE Inverter F=X’ X F 0 1 1 0 Buffer F=X X F 0 0 1 1 NAND F=(XY)’ X Y F 0 0 1 0 1 1 1 0 1 1 1 0 X F X F X F Y
  • 68. NAME GRAPHIC SYMBOL ALGEBRIC FUNCTION TRUTH TABLE X NOR F=(X+Y)’ X Y F 0 0 1 0 1 0 1 0 0 1 1 0 Exclusive-OR (XOR) F=XY’+X’Y = X  Y X Y F 0 0 0 0 1 1 1 0 1 1 1 0 Exclusive-NOR or Equivalence F=XY+X’Y’ =X Y X Y F 0 0 1 0 1 0 1 0 0 1 1 1 Y F X F Y X F Y
  • 69. Y (X Y) Z=(X+Y) Z’ Y x (X+Y)’ =XZ’+YZ ’ [Z+(X+Y)’]’ (Y+Z)’ (X ( Y Z)=X’(Y+ Z) =X’Y+X’ Z [X+(Y+Z)’]’ Z X Z Demonstrating the nonassociativity of the NOR operator (X  Y) Z  X (Y Z)
  • 70. XY Z (X+Y+Z) ’ X Y Z (XYZ)’ (a) There input NOR gate (b) There input NAND gate A B C D E F=[(ABC)’. (DE)’]’=ABC+DE (c) Cascaded NAND gates Multiple-input AND cascaded NOR and NAND gates
  • 71. X Y Z F=X  Y  Z (a) Using two input gates X Y Z (b) Three input gates (b) Three input exclusive OR gates TRUTH TABLE X Y Z F 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 0 XOR XNOR Odd functio n Even functio n F=X  Y  Z
  • 72. Signal amplitude assignment and type of logic 1 H 0 L 0 1 H L LOGIC VALUE SIGNAL VALUE LOGIC VALUE SIGNAL VALUE Negative Logic Positive Logic
  • 73. DEMONSTRATION OF POSITIVE AND X y z 1 1 0 1 0 1 0 1 1 0 0 1 Truth table for negative logic L=1 H=0 NEGATIVE LOGIC x z y Graphic symbol for negative logic NOR gate Same gate can function +ive logic NAND or -ive logic NOR +ive logic NOR or -ive logic NAND
  • 74.  F(A,B,C)=(1,4,5,6,7)  F(A,B,C)=(1,2,3,6,7)  F(x,y,z)=(1,4,5,6,7)  F(x,y,z) = (0,2,4,5)