1. 1
A Ultra Low Power Temperature Sensor in CMOS
130nm Technology
Dr. Mukul Sarkar, Vikas Aggarwal, and Pawan Kumar
Abstract—A fully-integrated ultra low power temperature sen-
sor has been designed. Temperature dependent and independent
currents are being generated to get temperature dependent
frequency. Magnitude of current has been reduced to nW level
by large value of resistor. Many high gain feedback amplifiers
are being used, consuming power just in the range of nW. Full
sensor has been designed in UMC130nm technology. No external
reference circuit is required.
Index Terms—Fully integrated, subthreshold, temperature sen-
sor, ultra-low power, UMC130nm.
I. INTRODUCTION
ULTRA low power wireless systems are need of current
market. These systems are equipped with many sensors.
Among various sensors, temperature sensor is most important
sensor and hence, the design of low power temperature sensor
is very critical. A lot of challenges are faced for design of
temperature sensor of wireless system due to a limited battery
size and correspondingly small energy capacity. The large
internal resistance of the battery also limits the maximum
current that can be drawn from the battery at a time.
Further, the sensor should be fully-integrated and self-
contained since accurate external references are not readily
available in highly integrated systems. Various types of tem-
perature sensors have been designed in CMOS technology.
Most conventional temperature sensors are based on bipolar
junction transistors (BJTs). These sensors measure temperature
by comparing a temperature-depen- dent voltage(PTAT) to a
temperature-insensitive voltage(VREF).The ratio between the
PTAT and reference voltages is fed to an analog-to-digital
converter (ADC) to be digitized. These offer high resolution
but power consumption is in order of uW. For low power
wireless systems, MOSFET-based temperature sensors have
been introduced. For low power operation, time-to-digital
frequency-to-digital conversion is used instead of ADCs.
Temperature can be calculated using a reference clock and
a temperature-dependent frequency or pulse. These sensors
consume less power than BJT-based sensors at the expense
of resolution and accuracy. Power consumption is reduced
to hundreds of nW, but an external clock is needed as a
reference. The performance of these sensors highly depends
on the accuracy of the reference clock, which is not typically
available in a wireless system. Moreover, the reference clock
itself can increase power consumption significantly. Recently,
a temperature sensor based on dynamic threshold MOSTs
(DTMOSTs) is introduced. The sensor achieves high reso-
lution (0.063 C) and accuracy but with sub- uW of power
consumption (excluding clock generation power).
II. DESIGN OF VOLTAGE REFERENCE
There are several approaches to design voltage references
in CMOS technology. The most common method is a bandgap
voltage reference using parasitic BJTs (bipolar junction tran-
sistors). To generate a temperature insensitive output volt-
age, bandgap references linearly combine two voltages with
opposing temperature characteristics: a complementary-to-
absolute-temperature (CTAT) voltage and a proportional-to-
absolute-temperature (PTAT) voltage. [1] PTAT and CTAT
currents can also combined, rather than voltages, to generate a
temperature-independent output voltage. Voltage references is
also designed by employing two devices of different threshold
voltages, which are implemented by distinct gate doping
or selective channel implantation. Another approach uses
subthreshold-biased transistors to lower minimum functional
supply voltage and power consumption.
Voltage reference must consume low power. Very few design
are there which consume nW of power. Here, we are designing
2T volatge reference. 2T voltage reference uses two different
types of devices. M1 is native device with approx. zero
threshold voltage. M2 is thick oxide device as shown in Fig.1
Mathematical calculation shows that VREF is function of both
PTAT(thermal voltage) and CTAT(threshold voltage) so it is
fairly constant with temperature.
Fig. 1. 2T reference unit
III. DESIGN OF TEMPERATURE SENSING UNIT
Temperature sensing unit is also modified version of 2T
reference unit. Here, instead of using two different types of
devices both the devices are of same kind. It removes the
CTAT component due to threshold voltage difference of two
devices. Due to this output voltage is linear function of thermal

2. 2
vout(vd= 0.4) vout(vd= 0.6666667) vout(vd= 0.9333333) vout(vd= 1.2)
(m)
30.0
40.0
50.0
60.0
70.0
80.0
90.0
100
tem p
50.00.0 25.0 75.0 100-25.0
vout
Fig. 3. Sensing unit output voltage
voltage only. Also, Since both the devices are working in
subthreshold region, output voltage is also independent of
supply voltage. Schematic is shown in Fig.2.
Fig. 2. Sensing Unit
We have plotted output voltage with temperature -20 to 100
degree celcius and also with different supply voltage varying
from 0.4 to 1.2 V as shown in Fig.3. Voltage variation is
around 0.5mV across supply voltage variation. Also, output
voltage is linear function of temperature.
IV. CURRENT GENERATING UNIT
For current generation, we start with conventional current
generation unit which we have implemented as shown in Fig.4.
It require one VREF, two sensing unit voltage generator, two
high gain amplifier, one n-mosfet, three p-mosfet and resistor.
The sensing unit voltage is duplicated across resistor. The
higher value of resistor is required to minimize the current(in
order of nA) from voltage source. High gain amplifier is
needed to perfectly match sensing voltage and voltage across
resistor. [2]
−
+
Vdd
+
−
IRVR
Vsense
−
+
+
−
VREF+
−
Vsense
VH
VL
VSS
M2
M3
M4
M1
Dummy
Fig. 4. Current generation unit
A. Design of high gain Amplifier
Two differential to single ended amplifier with open loop
gain of order 90-95 dB are needed in current generation circuit
as shown in Fig.4. Amplifiers will be used as unity gain
buffer to mirror ’Vsense’ voltage onto resistor ’R’. More the
open loop gain better it will work as buffer. We have chosen
the two stage amplifier topology for high gain as shown in
Fig.5. Both the stages are working in subthreshold region
to minimize the required current. First stage is consuming
power of 10 nA whereas second stage is consuming power of
100nA. So, overall power penalty is just 150nW for supply
voltage of 1.2V. Penalty of low power is small Unity Gain
Bandwidth(UGB). But we don’t require much of it. The gain
and phase response is shown in Fig.6. The PM(phase margin)
is around 60 degree. The gain and phase response of designed
opamp is show in Fig.6.

3. 3
M 2:150.6kH z 59.3801deg
Phase(deg)
-200.0
-150.0
-100.0
-50.0
0.0
50.0
100.0
150.0
200.0
phaseD egU nw rapped(VF("/net6")/VF("/net5"))
M 1:150.653kH z 0.0dB
(dB)
-50.0
-25.0
0.0
25.0
50.0
75.0
100
dB20(VF("/net6")/VF("/net5"))
10
-2
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
10
7
freq (H z)
AC R esponse
Fig. 6. Gain and Phase response of opamp
VDD
VSS
ID
+Vin -Vin
VOUT
M1 M2
M3 M4
M5
M6
M7
M8
Fig. 5. Two stage Opamp
B. VREF Voltage
The VREF voltage is set to around VDD/2 i.e. 0.6 V.
C. Resistor
The value is chosen such that current flowing in resistor is
in the range of nA. Since Vsense voltage is varying in from
40-90mV as shown in Fig.3. So we have chosen R=90Kohms
for getting current in range of 0.5-1uA. Further increase in
resistor value decreases the current but VL decreases so low
that ring oscillator doesn’t oscillate.
D. Working of Current generation circuit
Voltage across resistor and Vsense should be prefectly close
to each other. The transient voltage plot for resistor and Vsense
at room temperature is shown in Fig.7. A dummy Vsense has
46.45
46.55
46.6
V(mV) 46.65
46.35
46.5
46.4
Vsense
V_RES
5.02.5
tim e (us)
100.0 7.5
TransientResponse
Fig. 7. Vsense and Voltage across resistor
been connected to avoid current of the main Vsense circuit
to go in direction of resistor. This ensures that current in
transistor M3 and M4 would be same.
There are two voltages ’VH’ and ’VL’ which are being
created by current generating for next stage of ring oscillator.
These two voltages are dependent on current through resistor
which itself is function of temperature. Their variation with
temperature is shown in Fig.8.
V. DESIGN OF RING OSCILLATOR
The voltage-controlled ring oscillator shown in Fig.9. is
used to translate current into frequency. It consist of inverter
followed by transmission gate(TG). We need to have odd num-
ber of stages for oscillation. We have designed three stages.
For first stage, two input NAND Gate is being used in place of
inverter, with one input connected to control signal ’Start’ so
that oscillator can be switched off externally. The transmission

4. 4
(mV)
0.0
200.0
400.0
600.0
800.0
1000
VH
VL
100
tem p
-25.0 25.00.0 50.0 75.0
VH:VL
Fig. 8. VH and VL variation with temperature
gate works as low pass filter. The resistance of TG is function
of VH and VL which are temperature dependent. So, the
frequency generated by oscillator is temperature dependent as
shown in Fig.10. The variation of frequency is from 250KHz to
Vdd
Vdd Vdd
VH
VL
Start
fclk
Fig. 9. Circuit diagram of a voltage controlled ring oscillator.
1MHz. The ring oscillator is also consuming average power of
500nW. The ring oscillator is working in subthreshold region
to save power.
(M)
.75
0.0
.5
.25
1.0
1.25
freq
100
tem p
-25.0 25.00.0 50.0 75.0
freq
Fig. 10. Frequency with temperature
-.75
-1.75
-1.25
-1.0
-1.5
A(uA)
-2.0
-2.25
i/V0/PLUS;tran (I)
2.50.0 5.0 10
tim e (us)
7.5
TransientResponse
Fig. 11. Transient current for whole design
VI. POWER CALCULATION
The average power consumption of whole design is about
1uW including that of two opamps, current generation circuit,
Vsense block and ring oscillator. The plot of power is shown
in Fig.11.
.
VII. CONCLUSION
The design was done to show that very low power tem-
perature sensor design is possible for microsystems which are
working on battery. We have been able to show that tempera-
ture can be encoded as freqquency. The power dissipation was
found to be 1uW for 1.2V supply. Further it can be converted
into digital output which we have not done here.
REFERENCES
[1] D. B. M. Seok, G. Kim and D. Sylvester, “A portable 2-transistor picowatt
temperature-compensated voltage reference operating at 0.5 v,” IEEE
Journal of Solid-State Circuits, vol. 47, no. 10, pp. 2534–2545, August
2012.
[2] S. Jeong, Z. Foo, Y. Lee, and J.-Y. Sim, “A fully-integrated 71 nw cmos
temperature sensor for low power wireless sensor nodes,” IEEE Journal
of Solid-State Circuits, vol. 49, no. 8, pp. 1682–1693, August 2014.