1. Final Report: Power Inverter
EE 452 - Power Electronics Design
Minder, Spencer Burchett
Nguyen, Bryant Dangphong
Yuen, William Charles
December 5, 2008
1
3. List of Figures
1 Block Diagram of the Power Inverter . . . . . . . . . . . . . . . . . . 2
2 Schematic of an Ideal Power Inverter . . . . . . . . . . . . . . . . . . 3
3 Operation of a Boost Converter . . . . . . . . . . . . . . . . . . . . . 4
4 H-Bridge Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5 Schematic of the Full-Bridge with Rise Time delay . . . . . . . . . . . 6
6 Canonical Form of Closed Loop System with No Controller . . . . . . 6
7 Schematic of Wien Bridge Oscillator . . . . . . . . . . . . . . . . . . 7
8 Bode Diagram of Boost Converter Power Stage . . . . . . . . . . . . 10
9 Bode Plot of the Controller . . . . . . . . . . . . . . . . . . . . . . . 11
10 Bode Plot of the Open Loop System . . . . . . . . . . . . . . . . . . 12
11 Oscillator Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12 PWM output of SG3524 . . . . . . . . . . . . . . . . . . . . . . . . . 14
13 AC Output and Switching Waveform of the Inverter . . . . . . . . . . 15
14 Fourier Transform of the full-Bridge . . . . . . . . . . . . . . . . . . . 16
15 LC Lowpass Filter with Cutoff Frequency at 160◦
. . . . . . . . . . . 17
16 Final AC Waveform Output . . . . . . . . . . . . . . . . . . . . . . . 17
17 Fourier Transform of the Final AC Waveform . . . . . . . . . . . . . 18
18 MUR420 Diode Voltage and Current . . . . . . . . . . . . . . . . . . 18
19 MTP3055 MOSFET Voltage and Current Waveforms . . . . . . . . . 19
20 IRF540 MOSFET Voltage and Current Waveforms . . . . . . . . . . 19
21 Percentage of Losses from Each Major Component . . . . . . . . . . . 20
22 Half-load to Full-load Step Response of Boost Converter . . . . . . . 21
ii
4. List of Tables
1 Design Specifications for the PWM Inverter . . . . . . . . . . . . . . 2
2 Calculated vs. Actual Component Values . . . . . . . . . . . . . . . . 12
3 Controller Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Comparison Between Old and New Components . . . . . . . . . . . . 22
iii
5. 1 Introduction
A power inverter is a switch mode power supply that converts a DC signal into an AC
signal to prevent damage to the electronics. There are three main types of power in-
verters available: square wave, modified square wave, and pure sine wave inverters. A
pure sine wave inverter is designed in this project, which uses pulse width modulation
(PWM) to produce rectangular pulses with varying duty cycles. These rectangular
pulses can then be filtered to produce a sine wave with low total harmonic distortion
(THD).
Some loads, such as stereos and motors, require higher quality AC. This is where pure
sine waves are preferred over other types of power inverters. The switching mecha-
nism involved in PWM inverters have low losses so efficiencies can reach between 80
and 90%. However, load variations and other factors may affect the RMS value of
the output of the power inverter; this is where feedback control is used to keep the
output peak-to-peak voltage steady.
2 Circuit Overview
2.1 Overview
The main components of this power inverter are the following:
• Boost Converter with Feedback
• PWM chip
• Full-Bridge
• Wien-Bridge Oscillator
• Low-pass Filter
The input DC voltage is stepped-up to 18 V via a boost converter as shown in Fig-
ure 1. To regulate its output to 18 V, this converter uses a type 2 K-factor controller.
The rest of the circuit is powered by the converter’s output.
The oscillator is inputted into a SG3524 chip, the output of which is a rectangular
signal of varying widths. This signal will be sent into the full-bridge to amplify its
Vpp to 30 V. Finally this 30 Vpp rectangular wave will be filtered to produce a 30 Vpp
1
6. sine wave. Figure 1 shows a block diagram of the PWM inverter while Figure 2 shows
the ideal schematic of the PWM inverter.
Figure 1: Block Diagram of the Power Inverter
In Figure 2 the boost converter is ideal, so no feedback is shown.
2.2 Specifications
For this project, a PWM inverter will be built to produce a true sine wave with the
following specifications:
Table 1: Design Specifications for the PWM Inverter
Parameter Requirements
Input Voltage 8-9 V
Output THD < 8 %
Output Voltage 30 Vpp
Efficiency > 85 %
Power 2-30 W
2
7. Figure 2: Schematic of an Ideal Power Inverter
• The power inverter has been designed for a 9 V battery input, and as the
batterys voltage drops over its lifetime, the power inverter should still be able
to output a voltage close to 30 Vpp. Multiple batteries may be placed in parallel
to increase usage time before the batteries need to be replaced.
• This power inverter can supply loads as high as 30 W continuously. Higher
loads may cause the output voltage to drop.
2.3 Boost Converter
A boost converter is another switch mode power supply that converts DC to DC. It
uses a power pole consisting of a diode and MOSFET to step up a voltage. In the
block diagram in Figure 1, it is represented as the “Power Stage.”
A boost converter operates by using a power pole to first store energy into an inductor
as shown in Stage 1 of Figure 3. When the switch opens, as shown in Stage 2, the
energy from the inductor is released into the load resistor. A capacitor on the load
side is used to resist voltage changes, and if the capacitance is infinite, the voltage
across the resistor will be constant. The boost converter in this project will see a
full-bridge as its main load.
Connecting this Power Stage is a feedback loop, and a K-factor controller. These
other blocks are part of the converter’s output voltage control. The controller will be
3
8. Figure 3: Operation of a Boost Converter
used to regulate the on and off time of the switch in Figure 3. It compensates the
boost converter to regulate the output voltage.
2.4 Pulse Width Modulator
Pulse width modulation is implemented with an SG3524 chip; a sine wave is inputted
into the non-inverting pin of the SG3524. For a power inverter, the input voltage is
a sinusoid. The amplitude of this sinusoid will influence the range of the duty cycles
while the offset should be the same as the offset of the saw-tooth wave to maintain a
50% duty cycle average.
The transfer function of the PWM is the following:
GPWM =
1
∆VPWM
where ∆VPWM is the peak-to-peak value of the saw-tooth waveform.
2.5 Full-Bridge
The full-bridge is fundamentally two digitally controlled inverters with reverse out-
puts, as demonstrated in Figure 4. When the output of inverter 1 is high, the output
of inverter 2 is low and vice versa. The output of the full-bridge is the difference
between the outputs of the inverters, so in Figure 4, the output is a square wave from
VIN to VIN .
Another way to interpret the H-bridge is as an amplifier. In this regard, it is easier
to combine the full-bridge and PWM into one transfer function:
4
9. Figure 4: H-Bridge Operation
GFull-Bridge + PWM(s) = m(t)VIN
where m(t) is defined as a constant, usually between 0.5 and 1, that depends on the
oscillator amplitude.
To prevent shoot-through, which occurs when both MOSFETs on one side are on and
current has a low impedance path to ground, an RC delay is added to the rise time,
shown in Figure 5, of the NMOS. A diode is added in anti-parallel with the resistor
so the fall time is not delayed as much.
2.6 Oscillator
A Wien Bridge is built for the oscillator. This oscillator is able to adjust its offset
and amplitude easily by changing two reference voltages.
The block diagram for a closed loop system with plant, G, and feedback, H is shown in
Figure 61
. This diagram will be useful in explaining the operation of a Wien Bridge.
The transfer function for the system is:
Y
X
=
G
1 + GH
1
http://www.calvin.edu/ pribeiro/courses/engr332/Handouts/oscillators.pdf
5
10. Figure 5: Schematic of the Full-Bridge with Rise Time delay
Figure 6: Canonical Form of Closed Loop System with No Controller
The Wien Bridge Oscillator works by forcing the transfer function’s denominator to
0, where a steady state cannot be reached. Instead, an oscillatory output at one
particular frequency is able to pass through the negative and positive feedback loops
without any gain or attenuation. A schematic for the oscillator is provided in Figure 7.
In this schematic, the negative feedback loop, G, is a non-inverting amplifier while
the positive feedback loop, H can be represented as:
H(s) =
sRC
s2R2C2 + 3sRC + 1
Setting H and G to force the transfer function’s denominator to zero results in having
the oscillation to occur at f = 1
2πRC
.
6
11. Figure 7: Schematic of Wien Bridge Oscillator
2.7 Output Filter
An LC low pass lossless filter is used to remove the high frequency components of
the variable square wave outputted from the full-bridge. Only the frequency of the
reference signal is desired in the output sine wave of the PWM inverter.
3 Results and Discussion
3.1 Boost
The load range of the power inverter, created in hardware, is between 1 and 3 W,
and in this load range, a maximum current of approximately 1 A travels through the
boost converter. Only the components in the power pole of the boost converter have
to be able to withstand this current; the ones used, the MTP3055 and the MUR420,
have high enough ratings of 12 A and 4 A, respectively. In addition, the highest
voltage across these components will be the output voltage of the boost converter,
and again, both components have ratings higher than the output voltage of 18 V.
7
12. The Type 2 K-factor controller is implemented using the SG3524 and its transcon-
ductance amplifier. The SG3524 is chosen because it can output PWM waveforms
and contains a transconductance amplifier. This reduces the number of ICs needed
for the boost converter. However, one more IC, the MC34151, is needed for the boost
converter for the purpose of driving the MTP3055. The SG3524 will be loaded down
when connected directly into the gate of the MTP3055, so the MC34151 is placed in
between the SG3524 and the MTP3055.
3.1.1 Inductor
The inductance value used was calculated by first finding Lcrit:
Lcrit =
DV 2
in
2VoIofs
= 81 µH
To improve controller stability and further ensure DCM would not be entered, an
inductance value of 100 µH was used.
3.1.2 Output Capacitor
A big enough capacitor must be used at the output of the boost converter in order
to reduce the boost converter’s ripple voltage which affects both the full-bridge and
sine wave output. The ripple was chosen to be less than .2%, which corresponded
to 232 µF. A larger capacitor was used of 330 µF , translating to a ripple voltage
of 0.0253 V. This also means that the output voltage ripple depends more strongly
on the settling time of the controller. Thus there is a tradeoff between the output
voltage ripple and the dynamic response of the controller.
C =
IoD
∆vfs
3.1.3 Boost Controller Transfer Function
The transfer function2
for the boost converter is as follows:
˜Vo
˜d
(s) = Gdo ×
1 + s
ωZ1
× 1 − s
ωZ2
1 + s
ωo×Q
+ s2
ω2
o
(1)
2
http://focus.ti.com/lit/an/slva061/slva061.pdf
8
13. where
Gdo ≈
Vin
(1 − D)2
ωZ1 =
1
RC × C
ωZ2 ≈
(1 − D)2
× R − RL
L
ωo ≈
1
√
L × C
×
RL + (1 − D)2
× R
R
Q ≈
ωo
RL
L
+ 1
C×(R×RC )
The constants in equation (1) are defined below.
L = 100 µH rl = ESRL + RSource = 1.4 Ω C = 330 µF Rc = 3 mΩ
RLoad = 32.4 Ω Vin = 9 V D = 0.55
The duty cycle, D, is first calculated with the following equation:
1
1 − D
=
Vout
Vin
= 2 ⇒ D = 0.5
There are additional component losses that result from the source and inductor series
impedances which are unaccounted for in the duty cycle equation. After taking into
account the additional losses, the duty cycle from a PSPICE simulation becomes
D = 0.55 for an output of 18 V.
A Bode plot, Figure 8, is formed from this transfer function. From inspection, the
phase margin is 53◦
when the magnitude of the gain is 0 dB.
3.1.4 K-Factor Controller
Since a boost converter is used a type 2 K-factor controller is needed for controlling
the output voltage. In a type 2 controller, a phase boost less than 90◦
is needed to
bring the phase margin to 60◦
at the chosen crossover frequency, fcr. The Type 2 K-
factor controller is implemented using the SG3524 and its transconductance amplifier.
9
14. Figure 8: Bode Diagram of Boost Converter Power Stage
Two poles and one zero are added to the plant to increase the phase margin to 60◦
.
In this design,
876.12 Hz ≤ fcr ≤ 1.3 kHz
so a value of 1 kHz is chosen. Evaluating the transfer function at 1 kHz shows that
the phase at that point is −113.34◦
, leading to a required phase boost of 83.34◦
.
From the phase boost, K is calculated as follows:
K = tan
83.338
2
+ 45 = 17.18
Next, the compensator coefficients were calculated via (2), (3), and (4):
fz =
fcr
K
(2)
fp = Kfcr (3)
kc = |Gc(s)|fcr
ωz
K
(4)
The results are shown below in Figure 9 along with the controller Bode plot:
10
15. Figure 9: Bode Plot of the Controller
kc = 1601.4; fz = 58.2 Hz; fp = 17.18 kHz.
The overall system with the controller includes the PWM, the power stage, the feed-
back, and the controller. The PWM and feedback are both represented as constants:
GPWM =
1
∆PWM
GFB =
1
∆Feedback
As can be seen in Figure 10, the loop is stable, the fcr of the open loop is 1 kHz, the
phase margin is the desired 60◦
, and the gain margin is 17.2 dB.
Using equations (5), (6), and (7) yields the values for C1, C2, and R1.
C1 =
gm/kc
ωp
1
ωz
=
gmωz
kcωp
(5)
C2 =
gm
kc
− C1 (6)
R1 =
1
ωzC2
(7)
Typical values of the resistors and capacitors similar to the calculated values are used
in place of the calculated values. The calculated and typical component values can
11
16. Figure 10: Bode Plot of the Open Loop System
Table 2: Calculated vs. Actual Component Values
Component Calculated Typical
C1 4.23 nF 5 nF
C2 1.244 µF 1 µF
R1 2.197 kΩ 2.2 kΩ
be seen below in Table 3.
The specifications for the controller can be seen below in Table 3.
3.2 Oscillator
The Wien bridge oscillator was implemented with an LM741 op amp. The frequency
of the oscillation can be used found through the following equation to approximate
the oscillation frequency of the Wien Bridge:
12
17. Table 3: Controller Specifications
Parameter Value
Rise Time < 1 ms
Overshoot < 20 %
f =
1
2πRC
For the circuit, R = 10 kΩ and C = .1 F were chosen because of their convenience as
typical component values. The oscillation frequency equation varies slightly depend-
ing on the circuits parasitic capacitance and resistance, so in this case, 159.15 Hz is
the calculated value, but the Wien Bridge oscillates closer to 142 Hz.
More common frequencies are 50 Hz and 60 Hz and can be achieved through the
Wien Bridge with uncommon resistor and capacitor combinations.
The other oscillation parameters, in particular, the offset and the amplitude, were
restricted to the parameters of the PWM chip, SG3524. In the SG3524, the voltage
corresponding to a 50% duty cycle is 2.5 V, so this voltage must be the offset of the
sine wave. To bias the offset of the sine-wave at 2.5 V, a voltage regulator at 5 V,
inherent in the SG3524, was divided into 2.5 V using two equivalent resistors. This
voltage was fed into the positive feedback end of the oscillator to move the offset up.
Like the necessary offset, the specification for the oscillation amplitude is limited from
the specifications of the SG3524. The amplitude must be between 1.5 V and 3.5 V,
which means that the oscillation amplitude cannot exceed .5 V. The oscillators ampli-
tude is set mainly by the power rails of the LM741, but can slightly be influenced by
negative feedback gain. A potentiometer placed in parallel with the negative feedback
resistor serves to be a fine tuning tool while a non-inverting amplifier or a voltage
divider may be used for larger changes.
The oscillator output before it is divided is shown below in Figure 11.
The waveform of the oscillator shows a lot of distortion, and this occurs when it is
used as a reference sinusoid into the SG3524. This distortion is caused from loading
the output of the LM741. When the output is disconnected from the SG3524, which
is equivalent to a very small load, the oscillator output is much cleaner. Contrary to
13
18. (a) Connected to SG3524 (b) Disconnected from SG3524
Figure 11: Oscillator Waveforms
the readings on the left waveform in Figure 1, from inspection, the frequencies are
nearly equal and the amplitudes are also very similar. The noise in the waveform on
the left leads to inaccurate readings.
3.3 PWM
A switching frequency of 1800 Hz was selected as the switching frequency of the
SG3524. When the oscillator was fed into the non-inverting pin, the varying duty
cycle pulse train was outputted, which can be seen in Figure 12.
Figure 12: PWM output of SG3524
14
19. 3.4 Full Bridge Inverter
The full bridge inverter contains a complimentary set-up of a PMOS and a NMOS
as can be seen in Figure 1. This allowed the same signal to be applied to both gates.
There are two sets of NMOS-PMOS sets. One is powered with a signal straight from
the SG3524 and the other is applied across a driver-inverter chip. The second gate
signal is placed through an inverter because the NMOS-PMOS pairs are inverted from
each other.
No high side switching was observed through the inverter. However, an RC delay was
added to prevent possible shoot-through and provide extra protection to the MOS-
FETS. This delay was added on the rise time of the NMOS. A diode was placed in
anti-parallel with the resistor so no delay would be present during the fall time of the
NMOS.
Results for the inverter are shown in Figure 13. The voltage pulses vary with the
reference sine wave and vary from a maximum of approximately 80% duty cycle to a
minimum of approximately 20%.
Figure 13: AC Output and Switching Waveform of the Inverter
3.5 Output Filter
A LC low pass lossless filter is used to remove the high frequency components of the
variable square wave outputted from the full-bridge. Only the frequency of the refer-
ence signal, or the fundamental frequency of the full-bridge square wave is desired in
the sine wave. The Fourier transform of the full-bridge signal is shown in Figure 14.
The major distortion frequencies occur at the multiples of the PWM frequency. A
15
20. low pass filter can be placed anywhere between the fundamental frequency and the
PWM frequency to present a smooth sine wave output.
Figure 14: Fourier Transform of the full-Bridge
A low pass LC filter can be represented by the following transfer function:
Gfilter(s) =
1
1 + s2LC
The cutoff frequency for this filter is 1
2π
√
LC
, and the transfer function for this filter
is shown in Figure 15.
After filtering, the resulting waveform is shown in Figure 16. The Fourier transform
was found in PSPICE and calculated to be 8.42%, which is shown in Figure 17.
3.6 Losses and Efficiency
The major losses in the boost converter arrive from the switching losses of the power
pole. The switching pole consists of an MTP3055 MOSFET and an MUR420 diode,
and their losses are 1.541 W and 0.228 W, respectively. Figure 18 shows the voltage
and current waveforms through these two components.
*Note that the current waveform is labeled in“V.” This is due to the fact that the
current was calculated as the voltage across a 1 Ω resistor. The remaining current
16
21. Figure 15: LC Lowpass Filter with Cutoff Frequency at 160◦
Figure 16: Final AC Waveform Output
waveforms will also be labeled in “V” but it is actually in Amperes.
The boost converters efficiency is found by isolating the converter from the complete
circuit. In the isolated converter, a load resistance of 50 Ω was used and the output
voltage was set at 18 V. The resulting efficiency was 80.9%.
17
22. Figure 17: Fourier Transform of the Final AC Waveform
(a) Voltage (b) Current
Figure 18: MUR420 Diode Voltage and Current
η =
V 2
out
RVinIin
3.7 The Full-Bridge Losses
The losses were increased from the RC delay added to protect the MOSFETs from
shoot-through. This delay manifests itself as a slightly rounder rising edge of the gate
signal applied to the NMOS. It has higher losses because the NMOS will enter the
18
23. (a) Voltage (b) Current
Figure 19: MTP3055 MOSFET Voltage and Current Waveforms
saturation region for a longer duration.
The losses in the NMOS is calculated by multiplying the current and voltage wave-
forms shown in Figure 6, yielding 0.0301 W. All four MOSFETs in the full-bridge
had very similar losses, so the total losses in the full-bridge is 0.1204 W.
(a) Voltage (b) Current
Figure 20: IRF540 MOSFET Voltage and Current Waveforms
3.8 Circuit Efficiency
Lastly, the overall efficiency of the circuit is calculated by finding the output power
and the input power.
19
24. η =
V 2
out
RVinIin
The circuit efficiency is 36.5% at 2.25 W.
3.9 Improving Efficiency
The percentage of losses from each major component in the circuit can be seen Fig-
ure 21.
Figure 21: Percentage of Losses from Each Major Component
Switching losses through the MOSFETs are unavoidable but it be reduced through
improving the quality of the gate signals or lowering the switching frequency. For the
boost converter, a gate driver, the MC34151 was added to improve the gate signal
to the MOSFET and a gate resistance may later be added if turn-on and turn-off
transients become bothersome in the boost converters output.
Because of the high frequency distortion in the oscillator, the output waveform also
has sharp spikes in its waveform, which can be seen in Figure 3. The basic Wien
Bridge implemented in this circuit is a simple oscillator that is not intended to be
used as voltage reference. Multiply buffer stages can be cascaded to improve the
20
25. stability of the oscillator. Another solution is through the use of oscillator ICs, such
as the XR-2206 Monolithic Function Generator. An oscillator with less voltage spikes
leads to higher THD and efficiency.
Separately, the boost converter had a reasonable efficiency and the full bridge inverter
had a reasonable efficiency, but the combined efficiency of the circuit was very low
at 36.5%. Less losses may be achieved from the use of a step up transformer rather
than converting the input DC voltage into a higher DC voltage.
3.10 Transient
Figure 22: Half-load to Full-load Step Response of Boost Converter
In simulation, the rise was about 0.08 ms and the overshoot was about 0.27%. Note:
we were unable to capture this waveform in hardware.
4 Cost and Circuit Optimization
Ideally, the power inverted that was designed should use optimized components. The
components used in the circuit should minimize cost and operate just above the
desired specification (i.e. using a MOSFET rated for VDS = 50 V when the voltage
across the MOSFET does not go above 20 V). Table 4 displays a comparison between
the old and new parts for the power inverter circuit.
21
26. Table 4: Comparison Between Old and New Components
Present
Component
Optimized
Component
Optimized
Compo-
nent
Quantity
Part
Specifications
Optimized
Component
Cost per
Unit($)
MTP3055
IRF9520
MUR420
Si5515CDC 3
VDS = 20 V
rDS(on) = .036Ω
IDmax = 4 A
PDmax = 3.1 W
VGS(th) = 0.7 V
0.42
2 MC34151 2 VCC=20 V
Io =1.5 A
0.50
SG3524 SG3524 2 VCC=40 V
ICC = 0.84 A
0.84
Resistors Resistors 20 1%, 1/4 Watt 0.05
330 µF
Capacitor
330 µF
Capacitor
2 0.12
1N4148 1N4148 2 Vreverse = 75 V 0.10
1N4007 1N4007 2 VRRM = 1000 V 0.10
Toroid
55414
Toroid
55414
1 µ = 60 N/A2
0.80
Toroid
55439
Toroid
55139
1 µ = 25 N/A2
0.60
LM741 LM741 1 IO, sc = 25 mA 0.35
Total Cost 7.75
4.1 MOSFET selection
The Si5515CDC N and P channel MOSFET chip is used because the two MOS-
FETs in the chip have similar characteristics, which leads to an inverter that has less
power consumption. In the power inverter, this chip can replace the four individual
MOSFETs in the full-bridge and the power pole in the boost converter. The ratings
for voltage and current on the chip exceed the maximum voltage and current of the
circuit.
22
27. 4.2 Magnetic Core Optimization
Two toroids are needed in the circuit: one for filtering the PWM waveform to produce
an AC waveform, and the second for a boost converter. The first toroid, the 55414, is
used to produce a 3 mH inductor while the second toroid, will be used for a 50 muH
inductor. These toroids will not saturate during operation.
4.3 PWM IC
The SG3524 serves as both a PWM IC and a transconductance amplifier, which
makes it an all-in-one IC for DC-to-DC converters. The chip also can accept up to
40 V on its supply voltage and output 100 mA from the two collectors on its output.
This high output current is enough to drive a power MOSFET, but a driver would
be preferred.
4.4 MOSFET Gate Driver
When inverting the SG354 signal, the MC34151 serves as an inverter with a signal
low in distortion. This gate driver has to output a gate voltage as high as VDS of the
MOSFETs, which will be 9 V for the boost converter and 18 V for the full-bridge.
4.5 Other Passive Component Optimization
The other components from the circuit were kept because the part ratings fell well
within the designed circuit specs. The rectifier diode (1N4007) is near ideal because
of low forward voltage drop, high current carrying capacity and high reliability. The
switching diode (1N4148) is also optimal because of high switching speed capability
and high reliability. A subtle change to the circuit includes replacing the resistors in
the oscillator to 1% 1/4 watt resistors for better oscillation control.
5 Conclusion
The discussed power inverter design has a very low output voltage that would be
only suitable for lower power electronics such as small motors or a fluorescent light.
A more useful power inverter may be built from this design by changing the frequency
of the AC output to 60 Hz and transforming the voltage to 115 Vrms.
Efficiency was much lower than expected since the simulation efficiency reached over
80% while the circuit in hardware was under 40%. The main methods to improve
the efficiency are to reduce circuit components with lower power ICs and decrease
23
28. switching frequency.
A new control scheme must also be deployed on the AC output rather than just keep-
ing the boosts output constant. If not, the boost converters control system has to be
much more robust to be able to adjust quickly to load changes. Hardware implemen-
tation showed signs that the controller was not able to effectively regulate the voltage
of the full-bridge.
A control technique that would be appropriate for the present circuit would be through
the use of peak sensors and analog multipliers to adjust the oscillators amplitude. This
will be a more direct approach in controlling the AC output than through controlling
the boosts output voltage.
References
[1] http://focus.ti.com/lit/an/slva061/slva061.pdf.
[2] www.calvin.edu/~pribeiro/courses/engr332/Handouts/Wein%20Bridge%
20Oscillators%20Presentation-Darren.ppt
[3] http://www.calvin.edu/~pribeiro/courses/engr332/Handouts/
oscillators.pdf
24
