2. Our Topics name:
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NAND and NOR gates are “Universal” because they can
used to produce any of the other logic functions.
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Universal Gates: NAND and NOR
AND/OR/NOT gates are sufficient for building any
Boolean functions.
We call the set {AND, OR, NOT} a complete set of logic.
However, other gates are also used because:
(i) usefulness
(ii) economical on transistors
(iii) self-sufficient
NAND/NOR: economical, self-sufficient
XOR: useful (e.g. parity bit generation)
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Universal Property of NAND Gates
NAND gate is self-sufficient (can build any logic circuit
with it).
Therefore, {NAND} is also a complete set of logic.
Can be used to implement AND/OR/NOT.
1. Implementing an inverter using NAND gate:
(x.x)' = x' (T1: idempotency)
x x'
6. Universal Property of NAND Gates
• NAND Gate as an Inverter
• Two NAND Gates as an AND Gate
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7. Universal Property of NAND Gates
• Three NAND Gates as an OR Gate
• Four NAND Gates as OR Gate
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8. Universal Property of NAND Gates
((x.y)'(x.y)')' = ((x.y)')' idempotency
= (xy) involution
((x.x)'(y.y)')' = (x'.y')' idempotency
= x''+y'' DeMorgan
= x+y involution
Implementing AND using NAND gates:
Implementing OR using NAND gates:
x
x.y
y
(x.y)'
x
x+y
y
x'
y'
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9. Universal Property of NOR Gates
NOR gate is also self-sufficient.
Therefore, {NOR} is also a complete set of logic
Can be used to implement AND/OR/NOT.
Implementing an inverter using NOR gate:
(x+x)' = x' (T1: idempotency)
x x'
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10. Universal Property of NOR Gates
• NOR Gate as an Inverter
• Two NOR Gates as an OR Gate
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11. Universal Property of NOR Gates
• Three NOR Gates as an AND Gate
• Four NOR Gates as an AND Gate
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12. Universal Property of NOR Gates
((x+x)'+(y+y)')'=(x'+y')' idempotency
= x''.y'' DeMorgan
= x.y involution
((x+y)'+(x+y)')' = ((x+y)')' idempotency
= (x+y) involution
Implementing AND using NOR gates:
Implementing OR using NOR gates:
x
x+y
y
(x+y)'
x
x.y
y
x'
y'
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13. Implementation using NAND gates (1/2)
Possible to implement any Boolean expression using
NAND gates.
Procedure:
(i) Obtain sum-of-products Boolean expression:
e.g. F3 = x.y'+x'.z
(ii) Use DeMorgan theorem to obtain expression
using 2-level NAND gates
e.g. F3 = x.y'+x'.z
= (x.y'+x'.z)' ' involution
= ((x.y')' . (x'.z)')' DeMorgan
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14. Implementation using NAND gates (2/2)
F3 = ((x.y')'.(x'.z)') ' = x.y' + x'.z
x'
z
F3
(x'.z)'
(x.y')'x
y'
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15. Implementation using NOR gates (1/2)
Possible to implement any Boolean expression using NOR
gates.
Procedure:
(i) Obtain product-of-sums Boolean expression:
e.g. F6 = (x+y').(x'+z)
(ii) Use DeMorgan theorem to obtain expression
using 2-level NOR gates.
e.g. F6 = (x+y').(x'+z)
= ((x+y').(x'+z))' ' involution
= ((x+y')'+(x'+z)')' DeMorgan
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16. Implementation using NOR gates (2/2)
F6 = ((x+y')'+(x'+z)')' = (x+y').(x'+z)
x'
z
F6
(x'+z)'
(x+y')'x
y'
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Mano, M. Morris (October 1992). Computer System Architecture (3rd ed. ed.).
Prentice-Hall. ISBN 0-13-175563-3
Universal Gates
John A. Camara (2010). Electrical and Electronics Reference Manual for the Electrical
and Computer PE Exam. www.ppi2pass.com. p. 41. ISBN 978-1-59126-166-7.