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MATRUSRI ENGINEERING COLLEGE
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
SUBJECT NAME: PULSE & LINEAR INTEGRATED CIRCUITS (PC233EC)
FACULTY NAME: 1. Mrs. P.Sravani
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PULSE & LINEAR INTEGRATED CIRCUITS
COURSE OBJECTIVES:
 Analyze the behavior of linear and non linear wave shaping circuits.
 Analyze and design of Multivobrators.
 Understand the operation of OP-AMP and its internal circuits.
 Analyze the applications of OP-AMP and 555 Timer.
 5.Explain the operation of various data converter circuits and PLL.
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COURSE OUTCOMES:
 Construct different linear and non linear networks and analyse their response
to different input signals.
 Understand, analyse and design multivibrators and sweep circuits using
transistors.
 Analyse DC characteristics and AC characteristics for single/Dual input
Balanced/Unbalanced output configurations using BJTs and OP-AMP.
 Distinguish various linear and nonlinear applications of OP-AMP.
 Demonstrate the various applications of 555 Timer and analyse the operation
of the D/A and A/D converters.
UNIT-I:Linear & Non linear wave shaping
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INTRODUCTION:
 A linear network is a network made up of linear elements only. A linear
network can be described by linear differential equations. The principle of
superposition and the principle of homogeneity hold good for linear networks.
 In pulse circuitry, there are a number of waveforms, which appear very
frequently. The most important of these are sinusoidal, step, pulse, square
wave, ramp, and exponential waveforms. The response of RC circuits to these
signals is described in this chapter.
 The process whereby the form of a non-sinusoidal signal is altered by
transmission through a linear network is called linear wave shaping.
 The process where by the form of a signal is changed by transmission through a
non-linear network is called Non-linear Wave Shaping.
OUTCOMES:
 To derive the response of high-pass and low-pass RC circuits to
different types of inputs like Sinusoidal, pulse, step, square, ramp
signals.
 To describe the application of high pass and low pass circuit as
Differentiator and integrator respectively.
 To understand the principles of working of uncompensated and
compensated attenuators and the operation of the attenuator circuit in
CRO probe.
 To study the principle of operation of various series and shunt clipping
circuits.
 To study the principle of operation of various clamping circuits and
verify the clamping circuit theorem.
MODULE-I: Linear wave shaping
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CONTENTS:
 High pass RC circuits with Step, Pulse, Square wave and Ramp inputs
 Low pass RC circuits with Step, Pulse, Square wave and Ramp inputs
 High pass RC circuit as Differentiator
 Low pass RC circuit as Integrator
OUTCOMES:
 To derive the response of high-pass and low-pass RC circuits to different
types of inputs like Sinusoidal, pulse, step, square, ramp signals.
 To describe the application of high pass and low pass circuit as Differentiator
and integrator respectively.
DEFINITION: It is the process of changing the shape of input signal
with linear / non-linear circuits.
Wave Shaping
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Types
 Linear Wave Shaping
 Non-linear Wave Shaping
DEFINITION: The process where by the form of a non-
sinusoidal signal is changed by transmission through a linear
network is called linear wave shaping.
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Linear Wave Shaping
Types
 High Pass RC Circuit.
 Low Pass RC Circuit.
Non-sinusoidal wave forms
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1. Step Waveform: A step voltage is one which
maintains the value zero for all times t<0 and
maintains the value V for all times t>0.
2. Pulse Waveform: The pulse amplitude is V
and the pulse duration is tp.
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3. Square Wave: A wave form which maintains
itself at one constant level V1 for a time T1 and
at other constant Level V11 for a time T2 and
which is repetitive with a period T=T1+T2 is
called a square-wave.
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4.Ramp: A waveform which is zero for t < 0 and
which increases linearly with time for t > 0.
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High Pass RC Circuit
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 At zero frequency the reactance of the capacitor is infinity and so it
blocks the input and hence the output is zero. Hence, this capacitor is
called the blocking capacitor and this circuit, also called the capacitive
coupling circuit, is used to provide dc isolation between the input and
the output.
 Since this circuit attenuates low-frequency signals and allows
transmission of high-frequency signals with little or no attenuation, it is
called a high-pass circuit.
Sinusoidal Input
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Step Input
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The instantaneous change in voltage across the capacitor is given by
Pulse Input
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 The pulse input is the same as that for a step input and is given by
Vo(t) = V e-t/ RC.
At t = tp, Vo(t) = V = V e-t/RC .
 At t = tp, since the input falls by V volts suddenly and since the voltage
across the capacitor cannot change instantaneously, the output also falls
suddenly by V volts to Vp - V.
 Hence at t = t + , va(t) = Ve-tp /RC - V . Since Vp< V, Vp- V is negative. So
there is an undershoot at t = tp and hence for t > tp, the output is negative. For
t > tp, the output rises exponentially towards zero with a time constant RC
according to the expression (Ve-tp/RC - V)e-(t-tp)/RC- The output waveforms
for RC » tp, RC comparable to tp and RC « tp.
Square-Wave Input
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Expression for the percentage tilt
Ramp Input
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THE HIGH-PASS RC CIRCUIT AS A DIFFERENTIATOR
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THE LOW-PASS RC CIRCUIT
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 At zero frequency, the reactance of the capacitor is infinity (i.e. the
capacitor acts as an open circuit) so the entire input appears at the output,
i.e. the input is transmitted to the output with zero attenuation. So the
output is the same as the input, i.e. the gain is unity.
 As the frequency increases the capacitive reactance decreases and so
the output decreases. At very high frequencies the capacitor virtually acts
as a short-circuit and the output falls to zero.
Sinusoidal Input
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Step-Voltage Input
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Expression for rise time: When a step signal is applied, the rise time tr
is defined as the time taken by the output voltage waveform to rise
from 10% to 90% of its final value: It gives an indication of how fast
the circuit can respond to a discontinuity in voltage.
Relation between rise time and upper 3-dB frequency
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 Thus, the rise time is inversely proportional to the upper 3-dB
frequency. The time constant (Τ= RC) of a circuit is defined as the
time taken by the output to rise to 63.2% of the amplitude of the input
step. It is same as the time taken by the output to rise to 100% of the
amplitude of the input step, if the initial slope of rise is maintained
Pulse Input
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If the time constant RC of the circuit is very large, at the end of the
pulse, the output voltage will be Vp(t) = V(1 – e-tp/RC), and the output
will decrease to zero from this value with a time constant RC
Square-Wave Input
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 A square wave is a periodic waveform which maintains itself at one constant
level V’ with respect to ground for a time T1 and then changes abruptly to
another level V", and remains constant at that level for a time T2, and repeats
itself at regular intervals of T = T1 + T2.
 A square wave may be treated as a series of positive and negative steps. The
shape of the output waveform for a square wave input depends on the time
constant of the circuit. If the time constant is very small, the rise time will also
be small and a reasonable reproduction of the input may be obtained.
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Ramp Input
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THE LOW-PASS RC CIRCUIT AS AN INTEGRATOR
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As time increases, the voltage drop across C does not remain negligible
compared with that across R and the output will not remain the integral
of the input. The output will change from a quadratic to a linear
function of time.
If the time constant of an RC low-pass circuit is very large in comparison with the. time
required for the input signal to make an appreciable change, the circuit acts as an
integrator.
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1. It is easier to stabilize an integrator than a differentiator because the gain of an integrator
decreases with frequency whereas the gain of a differentiator increases with frequency.
2. An integrator is less sensitive to noise voltages than a differentiator because of its limited
bandwidth.
3. The amplifier of a differentiator may overload if the input waveform changes very rapidly.
4. It is more convenient to introduce initial conditions in an integrator.
 A criterion for good integration in terms of steady-state analysis is as
follows: The low-pass circuit acts as an integrator provided the time
constant of the circuit RC > 15T, where T is the period of the input sine
wave. When RC > 15T, the input sinusoid will be shifted at least by 89.4°
(instead of the ideal 90° shift required for integration) when it is
transmitted through the network.
 An RC integrator converts a square wave into a triangular wave.
Integrators are almost invariably preferred over differentiators in analog
computer applications for the following reasons:
Module 2: Attenuators
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Attenuators are resistive networks, which are used to reduce the amplitude of
the input signal. The simple resistor combination of Figure 1.61 (a) would
multiply the input signal by the ratio a = R2/(R1 + R2) independently of the
frequency. If the output of the attenuator is feeding a stage of amplification,
the input capacitance C2 of the amplifier will be the stray capacitance
shunting the resistor R2 of the attenuator and the attenuator will be as shown
in Figure 1.61(b), and the attenuation now is not independent of frequency
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Module 3: Non linear wave shaping
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Nonlinear wave shaping circuits may be classified as clipping circuits and
clamping circuits.
 A clipping circuit is a circuit which removes the undesired part of the
waveform and transmits only the desired part of the signal which is above
or below some particular reference level, i.e. it is used to select for
transmission that part of an arbitrary waveform which lies above or below
some particular reference.
 Clipping circuits are also called voltage (or current) limiters, amplitude
selectors or slicers.
 Clipping circuits may be single level clippers or two level clippers.
Single level clippers may be series diode clippers with and without
reference or shunt diode clippers with and without reference. Clipping
circuits may use diodes or transistors.
 Clamping circuits may be negative clampers (positive peak clampers)
with and without reference or positive clampers (negative peak clampers)
with and without reference.
Diode Characteristics
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The V-I characteristic of a practical diode and idealized diode
approximated by a curve which is shown below. The break point occurs at
Vr, where Vr = 0.2 V for Ge and Vr = 0.6 V for Si. Usually Vr is very small
compared to the reference voltage VR and can be neglected.
Clippers
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Typical projects of electronics operate at different electrical signal ranges and
therefore, for these electronic circuits, it is intended to maintain the signals in a
particular range in order to obtain the desired outputs.
Clipper and Clamper are widely used in analog television receivers and FM
transmitters. The variable frequency interference can be removed by using the
clamping method in television receivers, and in FM transmitters, the noise
peaks are limited to a specific value, above which the excessive peaks can be
removed by using the clipping method.
An electronic device that is used to evade the output of a circuit to go
beyond the preset value (voltage level) without varying the remaining
part of the input waveform is called as Clipper circuit.
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1. Series Clippers
Series clippers are again classified into series negative clippers and series
positive clippers which are as follows:
a. Series Negative Clipper
Series Negative Clipper
 The above figure shows a series negative clipper with its output waveforms.
During the positive half cycle the diode (considered as ideal diode) appears in
the forward biased and conducts such that the entire positive half half cycle of
input appears across the resistor connected in parallel as output waveform.
 During the negative half cycle the diode is in reverse biased. No output
appears across the resistor. Thus, it clips the negative half cycle of the input
waveform, and therefore, it is called as a series negative clipper.
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Series Negative Clipper With reference voltage Vr:
Series Negative Clipper With Positive Vr
 During the positive half cycle, the diode start conducting only after its anode voltage
value exceeds the cathode voltage value. Since cathode voltage becomes equal to the
reference voltage, the output that appears across the resistor
Series Negative Clipper With Negative Vr
 During the positive half cycle, the entire input appears as output across the resistor,
and during the negative half cycle, the input appears as output until the input value
will be less than the negative reference voltage, as shown in the figure.
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b. Series Positive Clipper
Series Positive Clipper
During the positive half cycle, diode becomes reverse biased, and no output is
generated across the resistor, and during the negative half cycle, the diode conducts
and the entire input appears as output across the resistor.
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Series Positive Clipper with reference voltage Vr:
Series Positive Clipper with Negative Vr
 During the positive half cycle, the output appears across the resistor as a negative
reference voltage. During the negative half cycle, the output is generated after
reaching a value greater than the negative reference voltage.
Series Positive Clipper with Positive Vr
 During the positive half cycle, the reference voltage appears as an output across
the resistor, and during the negative half cycle, the entire input appears as output
across the resistor.
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2. Shunt Clippers
Shunt clippers are classified into two types: shunt negative clippers and shunt positive
clippers.
a. Shunt Negative Clipper
Shunt Negative Clipper
 Shunt negative clipper is connected as shown in the above figure. During the
positive half cycle, the entire input is the output, and during the negative half cycle, the
diode conducts causing no output to be generated from the input.
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Shunt Negative Clipper with Positive Vr
Shunt Negative Clipper with Positive Vr
 During the positive half cycle, the input is generated as output, and during the
negative half cycle, a positive reference voltage will be the output voltage as shown
above.
Shunt Negative Clipper with Negative Vr
Shunt Negative Clipper with Negative Vr
 During the positive half cycle, the entire input appears as output, and during the
negative half cycle, a reference voltage appears as output as shown in the above
figure.
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b. Shunt Positive Clipper
Shunt Positive Clipper
During the positive half cycle the diode is in conduction mode and no output is
generated; and during the negative half cycle; entire input appears as output as the
diode is in reverse bias as shown in the above figure.
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Shunt Positive Clipper with Negative Vr
Shunt Positive Clipper with Negative Vr
During the positive half cycle, the negative reference voltage connected in series with
the diode appears as output; and during the negative half cycle, the diode conducts until
the input voltage value becomes greater than the negative reference voltage and output
will be generated
Shunt Positive Clipper with Positive Vr
Shunt Positive Clipper with Positive Vr
During the positive half cycle the diode conducts causing the positive reference voltage
appear as output voltage; and, during the negative half cycle, the entire input is
generated as the output as the diode is in reverse biased.
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Positive-Negative Clipper with Reference Voltage Vr
Positive-Negative Clipper with Reference Voltage Vr
 The circuit is connected as shown in the figure with a reference voltage Vr, diodes D1
& D2. During the positive half cycle, the diode the diode D1 conducts causing the
reference voltage connected in series with D1 to appear across the output.
 During the negative cycle, the diode D2 conducts causing the negative reference
voltage connected across the D2 appear as output, as shown in the above figure.
Applications of Clippers
Clippers find several applications, such as
They are frequently used for the separation of synchronizing signals from the
composite picture signals.
The excessive noise spikes above a certain level can be limited or clipped in FM
transmitters by using the series clippers.
For the generation of new waveforms or shaping the existing waveform,
clippers are used.
The typical application of diode clipper is for the protection of transistor from
transients, as a freewheeling diode connected in parallel across the inductive
load.
Frequently used half wave rectifier in power supply kits is a typical example of
a clipper. It clips either positive or negative half wave of the input.
Clippers can be used as voltage limiters and amplitude selectors.
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Clampers
Working of Clamper Circuit
 The positive or negative peak of a signal can be positioned at the
desired level by using the clamping circuits. As we can shift the
levels of peaks of the signal by using a clamper, hence, it is also
called as level shifter.
 The clamper circuit consists of a capacitor and diode connected in
parallel across the load. The clamper circuit depends on the change
in the time constant of the capacitor.
 The capacitor must be chosen such that, during the conduction of
the diode, the capacitor must be sufficient to charge quickly and
during the non conducting period of diode, the capacitor should not
discharge drastically. The clampers are classified as positive and
negative clampers based on the clamping method.
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1. Negative Clamper
Negative Clamper
During the positive half cycle, the input diode is in forward bias- and as the diode
conducts-capacitor gets charged (up to peak value of input supply). During the
negative half cycle, reverse does not conduct and the output voltage become equal to
the sum of the input voltage and the voltage stored across the capacitor.
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a. Negative Clamper with Positive Vr
Negative Clamper with Positive Vr
 As the positive reference voltage is connected in series with the diode, during the
positive half cycle, even though the diode conducts, the output voltage becomes
equal to the reference voltage; hence, the output is clamped towards the positive
direction.
b. Negative Clamper with Negative Vr
Negative Clamper with Negative Vr
 By inverting the reference voltage directions, the negative reference voltage is
connected in series with the diode as shown in the above figure. During the positive
half cycle, the diode starts conduction before zero, as the cathode has a negative
reference voltage, which is less than that of zero and the anode voltage, and thus,
the waveform is clamped towards the negative direction by the reference voltage
value.
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2. Positive Clamper
Positive Clamper
 It is almost similar to the negative clamper circuit, but the diode is connected in
the opposite direction. During the positive half cycle, the voltage across the output
terminals becomes equal to the sum of the input voltage and capacitor voltage
(considering the capacitor as initially fully charged). During the negative half cycle
of the input, the diode starts conducting and charges the capacitor rapidly to its peak
input value. Thus the waveforms are clamped towards the positive direction as
shown above.
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a. Positive Clamper with Positive Vr
Positive Clamper with Positive Vr
 During the positive half cycle of the input, the diode conducts as initially the supply
voltage is less than the anode positive reference voltage. If once the cathode voltage
is greater than anode voltage then the diode stops conduction. During the negative
half cycle, the diode conducts and charges the capacitor.
b. Positive Clamper with Negative Vr
Positive Clamper with Negative Vr
 During the positive half cycle the diode will be non conducting, such that the
output is equal to capacitor voltage and input voltage. During the negative half
cycle, the diode starts conduction only after the cathode voltage value becomes less
than the anode voltage.
Clamping Circuit Theorem
The clamping circuit theorem states that under steady-state
conditions, for any input waveform, the ratio of the area under the
output voltage curve in the forward direction to that in the reverse
direction is equal to the ratio Rf/R. To prove the clamping circuit
theorem, consider a typical steady-state output for the clamping
circuit. The expression for the clamping circuit theorem is:
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Applications of Clampers
Clampers can be used in applications:
 The complex transmitter and receiver circuitry of television clamper is
used as a base line stabilizer to define sections of the luminance signals to
preset levels.
 Clampers are also called as direct current restorers as they clamp the wave
forms to a fixed DC potential.
 These are frequently used in test equipment, sonar and radar systems.
 For the protection of the amplifiers from large errant signals clampers are
used.
 Clampers can be used for removing the distortions.
 For improving the overdrive recovery time clampers are used.
 Clampers can be used as voltage doublers or voltage multipliers.
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UNIT-II: Multivibrators
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INTRODUCTION:
A multivibrator is used to implement simple two-state systems such as
oscillators, timers and flip-flops.
 Three types:
Astable – neither state is stable.
Applications: oscillator, etc.
Monostable - one of the states is stable, but the other is not;
Applications: timer, etc.
Bistable – it remains in either state indefinitely.
Applications: flip-flop, etc.
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OUTCOMES:
To study the principle of operation of the multivibrators.
To study the applications of multivibrators.
To realize the need for a commutating condenser in a monostable
multivibrator and bistable multivibrator.
To study the principle of operation of Time base generators
To study the features of the Time base signal.
To study the principle of operation of Miller Time base
To study the principle of operation of Bootstrap Time base generator
To study the principle of operation of UJT saw tooth generator.
To study the principle of operation of time base generators using Op-
Amps.
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MODULE-I: Multivibrators
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CONTENTS:
 Bistable multivibrator
 Monostable multivibrator
 Astable multivibrator
 Schmitt Trigger
OUTCOMES:
To study the principle of operation of the multivibrators.
To study the applications of multivibrators.
To realize the need for a commutating condenser in a monostable
multivibrator and bistable multivibrator.
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Astable Multivibrator
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Basic mode of operation
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Multivibrator Frequency
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Monostable Multivibrator
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Bistable Multivibrator
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Schmitt Trigger
Circuit Output Waveforms
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 Advantages
The advantages of Schmitt trigger circuit are
•Perfect logic levels are maintained.
•It helps avoiding Meta-stability.
•Preferred over normal comparators for its pulse conditioning.
 Disadvantages
The main disadvantages of a Schmitt trigger are
•If the input is slow, the output will be slower.
•If the input is noisy, the output will be noisier.
 Applications of Schmitt trigger
Schmitt trigger circuits are used as Amplitude Comparator and Squaring
Circuit. They are also used in Pulse conditioning and sharpening circuits.
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Module 2: Time Base Generators
A time-base generator is an electronic circuit which generates an output
voltage or current waveform, a portion of which varies linearly with time.
Ideally the output waveform should be a ramp.
Time-base generators may be voltage time-base generators or current
time-base generators.
A voltage time-base generator is one that provides an output voltage
waveform, a portion of which exhibits a linear variation with respect to
time. A current time-base generator is one that provides an output current
waveform, a portion of which exhibits a linear variation with respect to
time.
There are many important applications of time-base generators, such as in
CROs, television and radar displays, in precise time measurements, and in
time modulation.
 Since this waveform is used to sweep the electron beam horizontally
across the screen it is called the sweep voltage and the time-base
generators are called the sweep circuits.
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GENERAL FEATURES OF A TIME-BASE SIGNAL
Precisely linear sweep signals are difficult to generate by time-base
generators and moreover nominally linear sweep signals may be
distorted when transmitted through a coupling network.
The deviation from linearity is expressed in three most important ways:
1 . The slope or sweep speed error, es
2. The displacement error, ed
3. The transmission error, et
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1. The Slope or Sweep Speed Error (es):
A Sweep voltage must increase linearly with time. The rate of change of
sweep voltage with time must be constant. This deviation from linearity
is defined as Slope Speed Error or Sweep Speed Error.
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2. The Transmission Error (et):
When a sweep signal passes through a high pass circuit, the output
gets deviated from the input as shown below.
This deviation is expressed as transmission error.
Where V’s is the input and Vs is the output at the end of the
sweep i.e. at t = Ts.
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3. The Displacement Error (ed)
An important criterion of linearity is the maximum difference between the
actual sweep voltage and the linear sweep which passes through the
beginning and end points of the actual sweep.
This can be understood from the following figure.
The displacement error ed is defined as
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Relation between three errors:
If the deviation from linearity is very small and the sweep voltage may
be approximated by the sum of linear and quadratic terms in t, then the
above three errors are related as
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METHODS OF GENERATING A TIME-BASE WAVEFORM
 Exponential charging. In this method a capacitor is charged from a supply
voltage through a resistor to a voltage which is small compared with the supply
voltage.
 Constant current charging. In this method a capacitor is charged linearly from a
constant current source. Since the charging current is constant the voltage across
the capacitor increases linearly.
 The Miller circuit. In this method an operational integrator is used to convert
an input step voltage into a ramp waveform.
 The Phantastron circuit. In this method a pulse input is converted into a ramp.
This is a version of the Miller circuit.
 The bootstrap circuit. In this method a capacitor is charged linearly by a
constant current which is obtained by maintaining a constant voltage across a
fixed resistor in series with the capacitor.
 Compensating networks. In this method a compensating circuit is introduced to
improve the linearity of the basic Miller and bootstrap time-base generators.
 An inductor circuit. In this method an RLC series circuit is used. Since an
inductor does not allow the current passing through it to change instantaneously,
the current through the capacitor more or less remains constant and hence a more
linear sweep is obtained.
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Bootstrap Time Base Generator
A bootstrap sweep generator is a time base generator circuit whose output
is fed back to the input through the feedback. This will increase or decrease
the input impedance of the circuit. This process of bootstrapping is used to
achieve constant charging current.
Advantage
The main advantage of this boot strap ramp generator is that the
output voltage ramp is very linear and the ramp amplitude reaches
the supply voltage level.
MATRUSRI
ENGINEERING COLLEGE
Miller Sweep Generator
The transistor Miller time base generator circuit is the popular Miller
integrator circuit that produces a sweep waveform. This is mostly used
in horizontal deflection circuits.
Applications:
Miller sweep circuits are the most commonly used integrator circuit in
many devices. It is a widely used saw tooth generator.
MATRUSRI
ENGINEERING COLLEGE
Unijunction Transistor
Unijunction Transistor is such a transistor that has a single PN
junction, but still not a diode. Unijunction Transistor, or
simply UJT has an emitter and two bases, unlike a normal transistor.
This component is especially famous for its negative resistance
property and also for its application as a relaxation oscillator.
MATRUSRI
ENGINEERING COLLEGE
Circuit diagram Output Waveform
Applications of UJT
UJTs are most prominently used as relaxation oscillators. They are also used in Phase
Control Circuits. In addition, UJTs are widely used to provide clock for digital
circuits, timing control for various devices, controlled firing in thyristors, and sync
pulsed for horizontal deflection circuits in CRO.
INTRODUCTION:DIFFERENTIAL AMPLIFIERS: CLASSIFICATION, DC AND AC
ANALYSIS OF SINGLE/DUAL INPUT BALANCED AND UNBALANCED OUTPUT
CONFIGURATIONS USING BJTS. LEVEL TRANSLATOR.
OPERATIONAL AMPLIFIER: OP AMP BLOCK DIAGRAM, IDEAL OPAMP
CHARACTERISTICS, OPAMP AND ITS FEATURES, OPAMP PARAMETERS AND
MEASUREMENTS, INPUT AND OUTPUT OFFSET VOLTAGES AND CURRENTS, SLEW
RATE, CMRR, PSRR. FREQUENCY RESPONSE AND COMPENSATION TECHNIQUES.
UNIT-III Operational Amplifiers
OUTCOMES:Analyse DC and AC characteristics for single/Dual input
Balanced/Unbalanced output configurations using BJTs and OP-AMP.
MATRUSRI
ENGINEERING COLLEGE
CONTENTS: DIFFERENTIAL AMPLIFIERS: CLASSIFICATION, DC AND AC
ANALYSIS OF SINGLE/DUAL INPUT BALANCED AND UNBALANCED
OUTPUT CONFIGURATIONS USING BJTS. LEVEL TRANSLATOR.
OUTCOMES: Analyse DC and AC characteristics for single/Dual input
Balanced/Unbalanced output configurations using BJTs.
MODULE-I
MATRUSRI
ENGINEERING COLLEGE
Differential amplifier:
• Differential amplifier is a basic building block of an op-amp.
• Amplifies the difference between two input signals.
• The two transistors Q1 and Q2 have identical characteristics.
• The resistances of the circuits are equal, i.e. RE1 = RE2, RC1 = RC2.
• The magnitude of +VCC is equal to the magnitude of -VEE.
Differential amplifier configurations:
1. Dual input, balanced output differential amplifier.
2. Dual input, unbalanced output differential amplifier.
3. Single input balanced output differential amplifier.
4. Single input unbalanced output differential amplifier.
AC & DC Analysis of Dual Input, Balanced Output Differential Amplifier:
D.C. Analysis:
To obtain the operating point (ICQ and VCEQ) for differential amplifier dc equivalent circuit is
drawn by reducing the input voltages V1 and V2 to zero
Applying KVL to the base emitter loop of the transistor Q1.
VBE = 0.6V for Si and 0.2V for Ge. Generally,
Knowing the value of IC the voltage at the collector VC is given by
A.C. Analysis
AC equivalent circuit using r-parameters:
Thus a differential amplifier amplifies the difference between two input signals. Defining the difference of input signals as
Vd = V1 – V2, the voltage gain of the dual input balanced output differential amplifier can be given by
Differential Input Resistance:
Output Resistance (Ro):
Inverting & Non – inverting Inputs:
V1 is called the non-inventing input
V2 is called inverting input.
Level Translator:
• The direct coupling the dc level at the emitter rises from stages to stage.
• This increase in dc level tends to shift the operating point of the succeeding
stages and therefore limits the output voltage swing and may even distort
the output signal.
• To shift the output dc level to zero, level translator circuits are used.
emitter follower with voltage divider emitter follower either with diode current
bias or current mirror bias
emitter follower either with diode current bias or current mirror bias
Complete Op-Amp circuit
CONTENTS: OPERATIONAL AMPLIFIER: OP AMP BLOCK DIAGRAM, IDEAL
OPAMP CHARACTERISTICS, OPAMP AND ITS FEATURES, OPAMP PARAMETERS
AND MEASUREMENTS, INPUT AND OUTPUT OFFSET VOLTAGES AND CURRENTS,
SLEW RATE, CMRR, PSRR. FREQUENCY RESPONSE AND COMPENSATION
TECHNIQUES.
OUTCOMES:Analyse DC and AC characteristics for single/Dual input
Balanced/Unbalanced output configurations using BJTs and OP-AMP.
MODULE-II
MATRUSRI
ENGINEERING COLLEGE
Operational Amplifier:
• What is an Integrated Circuit?
• Where do you use an Integrated Circuit?
• Why do you prefer an Integrated Circuit to the circuits made by
interconnecting discrete components?
Def: The “Integrated Circuit “ or IC is a miniature, low
cost electronic circuit consisting of active and passive
components that are irreparably joined together on a
single crystal chip of silicon.
In 1958 Jack Kilby of Texas Instruments invented first IC
• Communication
• Control
• Instrumentation
• Computer
• Electronics
Applications of an Integrated Circuit
• Small size
• Low cost
• Less weight
• Low supply voltages
• Low power consumption
• Highly reliable
• Matched devices
• Fast speed
Advantages:
Classification
• Digital ICs
• Linear ICs
Pn junction
isolation
Hybrid circuits
Integrated circuits
Dielectric
isolation
Monolithic circuits
Bipolar Uni polar
MOSFET JFET
Classification of ICs
Thick
&Thin film
Chip size and Complexity
• Invention of Transistor (Ge) - 1947
• Development of Silicon - 1955-1959
• Silicon Planar Technology - 1959
• First ICs, SSI (3- 30gates/chip) - 1960
• MSI ( 30-300 gates/chip) - 1965-1970
• LSI ( 300-3000 gates/chip) -1970-1975
• VLSI (More than 3k gates/chip) - 1975
• ULSI (more than one million active devices are integrated on single chip)
SSI MSI LSI VLSI ULSI
< 100 active
devices
100-1000
active
devices
1000-
100000
active
devices
>100000
active
devices
Over 1
million
active
devices
Integrated
resistors,
diodes &
BJT’s
BJT’s and
Enhanced
MOSFETS
MOSFETS 8bit, 16bit
Microproces
sors
Pentium
Microproces
sors
IC Package types
• Metal can Package
• Dual-in-line
• Flat Pack
Metal can Packages:
• The metal sealing plane is at the bottom over which the chip is bounded
• It is also called transistor pack
Dual-in-line Package
The chip is mounted inside a plastic or ceramic case
The 8 pin Dip is called MiniDIP and also available with 12, 14, 16, 20pins
Flat pack
The chip is enclosed in a rectangular ceramic case
Selection of IC Package
Type Criteria
Metal can
package
1. Heat dissipation is important
2. For high power applications like
power amplifiers, voltage regulators
etc.
DIP 1. For experimental or bread boarding
purposes as easy to mount
2. If bending or soldering of the leads is
not required
3. Suitable for printed circuit boards as
lead spacing is more
Flat pack 1. More reliability is required
2. Light in weight
3. Suited for airborne applications
Factors affecting selection of IC package
Temperature Ranges
1. Military temperature range : -55o C to +125o C (-55o C to +85o C)
2. Industrial temperature range : -20o C to +85o C (-40o C to +85o C )
3. Commercial temperature range: 0o C to +70o C (0o C to +75o C )
• Relative cost
• Reliability
• Weight of the package
• Ease of fabrication
• Power to be dissipated
• Need of external heat sink
Manufacturer’s Designation for Linear ICs
Fairchild - µA, µAF
National Semiconductor - LM,LH,LF,TBA
Motorola - MC,MFC
RCA - CA,CD
Texas Instruments - SN
Signetics - N/S,NE/SE
Burr- Brown - BB
Operational Amplifier
An “Operational amplifier” is a direct coupled high-gain amplifier usually
consisting of one or more differential amplifiers and usually followed by a
level translator and output stage.
The operational amplifier is a versatile device that can be used to amplify dc
as well as ac input signals and was originally designed for computing such
mathematical functions as addition, subtraction, multiplication and
integration.
Op Amp
The Op-Amp Chip
Single-Ended Input
Differential Amplifier
Characteristics and performance parameters of Op-amp (cotd..)
• Input offset Voltage
• Input offset current
• Input bias current
• Differential input resistance
• Input capacitance
• Open loop voltage gain
• CMRR
• Output voltage swing
• Output resistance
• Offset adjustment range
• Input Voltage range
• Power supply rejection ratio
• Power consumption
• Slew rate
• Gain – Bandwidth product
• Equivalent input noise voltage and current
• Average temperature coefficient of offset parameters
• Output offset voltage
• Supply current
Characteristics and performance parameters of Op-amp
1. Input Offset Voltage
The differential voltage that must be applied between the two input
terminals of an op-amp, to make the output voltage zero.
It is denoted as Vios
For op-amp 741C the input offset voltage is 6mV
2. Input offset current
The algebraic difference between the currents flowing into the two
input terminals of the op-amp
It is denoted as Iios = | Ib1 – Ib2|
For op-amp 741C the input offset current is 200nA
3. Input bias current
The average value of the two currents flowing into the op-amp input
terminals
It is expressed mathematically as
2
2
1 b
b I
I 
For 741C the maximum value of Ib is 500nA
4. Differential Input Resistance
It is the equivalent resistance measured at either the inverting or non-
inverting input terminal with the other input terminal grounded
5. Input capacitance
It is the equivalent capacitance measured at either the inverting or non-
inverting input terminal with the other input terminal grounded.
It is denoted as Ci
For 741C it is of the 1-4 pF
6. Open loop Voltage gain
It is the ratio of output voltage to the differential input voltage, when op-amp
is in open loop configuration, without any feedback. It is also called as large
signal voltage gain.
It is denoted as AOL AOL=Vo / Vd
For 741C it is typically 200,000
7. CMRR
It is the ratio of differential voltage gain Ad to common mode voltage gain Ac
CMRR = Ad / Ac
Ad is open loop voltage gain AOL and Ac = VOC / Vc
For op-amp 741C CMRR is 90 dB
8. Output Voltage swing
The op-amp output voltage gets saturated at +Vcc and –VEE and it cannot
produce output voltage more than +Vcc and –VEE. Practically voltages +Vsat
and –Vsat are slightly less than +Vcc and –VEE .
For op-amp 741C the saturation voltages are + 13V for supply voltages +
15V
9. Output Resistance
It is the equivalent resistance measured between the output terminal of the
op-amp and ground
It is denoted as Ro
For op-amp 741 it is 75Ω
10. Offset voltage adjustment range
The range for which input offset voltage can be adjusted using the
potentiometer so as to reduce output to zero
For op-amp 741C it is + 15mV
11. Input Voltage range
It is the range of common mode voltages which can be applied for which
op-amp functions properly and given offset specifications apply for the op-
amp
For + 15V supply voltages, the input voltage range is + 13V
12. Power supply rejection ratio
PSRR is defined as the ratio of the change in input offset voltage due to the
change in supply voltage producing it, keeping the other power supply voltage
constant. It is also called as power supply sensitivity (PSV)
PSRR= (Δvios / ΔVcc)|constant VEE
PSRR= (Δvios / ΔVEE)|constant Vcc
The typical value of PSRR for op-amp 741C is 30µV/V
13. Power Consumption
It is the amount of quiescent power to be consumed by op-amp with zero
input voltage, for its proper functioning
It is denoted as Pc
For 741C it is 85mW
14. Slew rate
Slew rate = S = dVo / dt |max
It is specified by the op-amp in unity gain condition. The slew rate is caused
due to limited charging rate of the compensation capacitor and current limiting
and saturation of the internal stages of op-amp, when a high frequency large
amplitude signal is applied.
It is given by dVc /dt = I/C
For large charging rate, the capacitor should be small or the current should be
large. S = Imax / C
For 741 IC the charging current is 15 µA and the internal capacitor is 30 pF.
S= 0.5V/ µsec
Slew rate equation
15. Gain – Bandwidth product
It is the bandwidth of op-amp when voltage gain is unity (1). It is denoted as
GB.
The GB is also called unity gain bandwidth (UGB) or closed loop bandwidth
It is about 1MHz for op-amp 741C
16. Equivalent Input Noise Voltage and Current
The noise is expressed as a power density
Thus equivalent noise voltage is expressed as V2 /Hz while the equivalent
noise current is expressed as A2 /Hz
17. Average temperature coefficient of offset parameters
The average rate of change of input offset voltage per unit change in
temperature is called average temperature coefficient of input offset
voltage or input offset voltage drift
It is measured in µV/oC. For 741 C it is 0.5 µV/oC
The average rate of change of input offset current per unit change in
temperature is called average temperature coefficient of input offset
current or input offset current drift
It is measured in nA/oC or pA/oC . For 741 C it is 12 pA/oC
18. Output offset voltage ( Voos )
The output offset voltage is the dc voltage present at the output
terminals when both the input terminals are grounded.
It is denoted as Voos
19. Supply current
It is drawn by the op-amp from the power supply
For op-amp 741C it is 2.8mA
Op amp equivalent circuit
Block diagram of op amp
The Ideal Operational Amplifier
• Open loop voltage gain AOL = ∞
• Input Impedance Ri = ∞
• Output Impedance Ro = 0
• Bandwidth BW = ∞
• Zero offset (Vo = 0 when V1 = V2 = 0) Vios = 0
• CMRR ρ = ∞
• Slew rate S = ∞
• No effect of temperature
• Power supply rejection ratio PSRR = 0
Ideal Op-amp
1.An ideal op-amp draws no current at both the input terminals I.e. I1
= I2 = 0. Thus its input impedance is infinite. Any source can drive it
and there is no loading on the driver stage
2.The gain of an ideal op-amp is infinite, hence the differential input
Vd = V1 – V2 is essentially zero for the finite output voltage Vo
3. The output voltage Vo is independent of the current drawn from the
output terminals. Thus its output impedance is zero and hence
output can drive an infinite number of other circuits
Op-amp Characteristics
DC Characteristics
• Input bias current
• Input offset current
• Input offset voltage
• Thermal drift
Ideal Voltage transfer curve
AC Characteristics
• Slew rate
• Frequency response
Practical voltage transfer curve
1. If Vd is greater than corresponding to b, the output attains +Vsat
2. If Vd is less than corresponding to a, the output attains –Vsat
3. Thus range a-b is input range for which output varies linearily
with the input. But AOL is very high, practically this range is very
small
Transient Response Rise time
When the output of the op-amp is suddenly changing like pulse type,
then the rise time of the response depends on the cut-off frequency fH
of the op-amp. Such a rise time is called cut-off frequency limited rise
time or transient response rise time ( tr )
H
r
f
t
35
.
0

Op-amp Characteristics
DC Characteristics
Input bias current
Input offset current
Input offset voltage
Thermal drift
AC Characteristics
Slew rate
Frequency response
Thermal Drift
The op-amp parameters input offset voltage Vios and input offset current Iios are
not constants but vary with the factors
1. Temperature
2. Supply Voltage changes
3. Time
Thermal Voltage Drift
It is defined as the average rate of change of input offset voltage per unit
change in temperature. It is also called as input offset voltage drift
Input offset voltage drift =
T
Vios


∆Vios = change in input offset voltage
∆T = Change in temperature
It is expressed in μV/0 c. The drift is not constant and it is not uniform over
specified operating temperature range
Input bias current drift
It is defined as the average rate of change of input bias current per unit
change in temperature
Thermal drift in input bias current =
T
Ib


It is measured in nA/oC or pA/oc. These parameters vary randomly
with temperature. i.e. they may be positive in one temperature range
and negative in another
Input Offset current drift
It is defined as the average rate of change of input offset current per unit
change in temperature
Thermal drift in input offset current =
T
Iios


AC Characteristics
Frequency Response
• Ideally, an op-amp should have an infinite bandwidth but practically
op-amp gain decreases at higher frequencies. Such a gain reduction
with respect to frequency is called as roll off.
• The plot showing the variations in magnitude and phase angle of the
gain due to the change in frequency is called frequency response of
the op-amp
• When the gain in decibels, phase angle in degrees are plotted against
logarithmic scale of frequency, the plot is called Bode Plot The
manner in which the gain of the op-amp changes with variation in
frequency is known as the magnitude plot. The manner in which the
phase shift changes with variation in frequency is known as the phase-
angle plot.
INTRODUCTION: OPAMP Applications: inverting And Non-inverting
Amplifiers, Integrator And Differentiator, Summing Amplifier, Precision
Rectifier, Schmitt Trigger And Its Applications. Active Filters: Low Pass,
High Pass, Band Pass And Band Stop. Log And Anti Log Amplifiers.
UNIT-IV: OP-AMP Applications
OUTCOMES:Distinguish various linear and nonlinear applications of OP-
AMP.
MATRUSRI
ENGINEERING COLLEGE
CONTENTS: INVERTING AND NON-INVERTING AMPLIFIERS,
INTEGRATOR AND DIFFERENTIATOR, SUMMING AMPLIFIER
OUTCOMES:design and analyse Distinguish various applications of OP-
AMP like Inverting and Non-Inverting Amplifiers, Integrator and
differentiator, summing amplifier
MODULE-I
MATRUSRI
ENGINEERING COLLEGE
The Differential Amplifier:
V1 = Vin1 and V2 = Vin2.
Vo = Ad (Vin1- Vin2 ) , where, Ad is
the open loop gain.
The Inverting Amplifier:
V1 = 0 and V2 = Vin
Vo = - Ad Vin
Open Loop mode:
The non-inverting amplifier
V1 = +Vin , V2 = 0 Vo = +Ad Vin
Closed Loop mode:
Inverting Amplifier Configuration
Non-inverting Amplifier Configuration
Equivalent Potential Divider
Network
Voltage Follower (Unity Gain Buffer)
Differential Amplifier:
Integrator
output of integrator for square and sinusoidal inputs
Differentiator
Ideal Differentiator:
Practical Differentiator:
Summing Amplifier
Inverting summer:
Non-inverting summer:
Precision Rectifiers
Half Wave Rectifiers
CONTENTS: Precision Rectifier, Schmitt Trigger And Its Applications.
Active Filters: Low Pass, High Pass, Band Pass And Band Stop. Log And Anti
Log Amplifiers.
OUTCOMES:design and analyse Distinguish various applications of OP-
AMP like Precision Rectifier, Schmitt Trigger And Its Applications. Active
Filters: Low Pass, High Pass, Band Pass And Band Stop. Log And Anti Log
Amplifiers.
MODULE-II
MATRUSRI
ENGINEERING COLLEGE
modified Half Wave Rectifier
Full Wave Rectifier:
Op-Amp Comparator
Voltage comparator circuit:
Schmitt Trigger:
Active Filters:
The most commonly used filters are:
Low pass filters
High pass filter
Band pass filter
Band reject filter.
All pass filter
First Order Low Pass Filter
frequency response
First Order High Pass Butterworth filter:
frequency response
Second Order Low-Pass Butterworth Filter
Band Pass Filter
Band Stop Filter:
Narrow Band Reject Filter or Notch Filter
All pass filters
Log Amplifier
Basic Log amplifier using transistor
Basic Log amplifier Diode
Antilog Amplifier
Basic Anti Log amplifier using transistor
INTRODUCTION: 555 TIMER: FUNCTIONAL DIAGRAM, MONOSTABLE, ASTABLE
AND SCHMITT TRIGGER APPLICATIONS. FIXED AND VARIABLE VOLTAGE
REGULATORS, PLL AND ITS APPLICATIONS.
DATA CONVERTERS: DIGITAL-TO-ANALOG CONVERTERS (DAC): WEIGHTED
RESISTOR, INVERTED R-2R LADDER, ANALOG-TO- DIGITAL CONVERTERS (ADC):
DUAL SLOPE, SUCCESSIVE APPROXIMATION, FLASH, SPECIFICATIONS.
UNIT-V
OUTCOMES:Demonstrate the various applications of 555 Timer and
analyse the operation of the D/A and A/D converters.
MATRUSRI
ENGINEERING COLLEGE
CONTENTS: 555 TIMER: FUNCTIONAL DIAGRAM, MONOSTABLE, ASTABLE
AND SCHMITT TRIGGER APPLICATIONS
OUTCOMES: Demonstrate the various applications of 555 Timer
MODULE-I
MATRUSRI
ENGINEERING COLLEGE
Introduction to 555 Timer:
• One of the most versatile linear integrated circuits is the 555 timer.
• The 555 is a monolithic timing circuit that can produce accurate and highly
stable time delays or oscillation.
• The timer basically operates in one of the two modes: either as monostable
(one-shot) multivibrator or as an astable (free running) multivibrator.
• The device is available as an 8-pin metal can, an 8-pin mini DIP, or a 14-pin
DIP.
• The SE555 is designed for the operating temperature range from -55°Cto +
125°C, while the NE555 operates over a temperature range of 0° to +70°C.
Features:
• It operates on +5 to + 18 V supply voltage in both free-running (astable) and
one- shot (monostable) modes.
• It has an adjustable duty cycle; timing is from microseconds through hours.
• It has a high current output.
• It can source or sink 200 mA.
• The output can drive TTL and has a temperature stability of 50 parts per
million (ppm) per degree Celsius change in temperature, or equivalently
0.005%/°C.
• Reliable, easy to use, and low cost.
Introduction to 555 Timer:
Block Diagram of 555Timer
The 555 Timer as A Monostable Multivibrator:
• A monostable multivibrator, the duration of
the pulse is determined by the RC network
connected externally to the 555 timer.
• In a stable or stand by state the output of the
circuit is approximately zero or at logic-low
level.
• When an external trigger pulse is applied, the
output is forced to go high.
• The time the output remains high is
determined by the external RC network
connected to the timer.
• At the end of the timing interval, the output
automatically reverts back to its logic-low
stable state.
• The output stays low until the trigger pulse is
again applied. Then the cycle repeats.
Monostable Multivibrator Applications
1. Frequency divider
2. Pulse stretcher
• Here the output pulse width (timing interval)
of the monostable multivibrator is of longer
duration than the negative pulse width of
the input trigger.
• As such, the output pulse width of the
monostable multivibrator can be viewed as
a stretched version of the narrow input
pulse, hence the name pulse stretcher.
• The monostable multivibrator can be
used as a frequency divider by adjusting
the length of the timing cycle tp, with
respect to the tine period T of the trigger
input signal applied to pin 2.
• The frequency-divider application is
possible because the monostable
multivibrator cannot be triggered during
the timing cycle.
The 555 As An Astable Multivibrator:
Astable Multivibrator Applications:
Square-wave oscillator:
Free-running ramp generator:
• Without reducing RA = 0 , the astable
multivibrator can be used to produce a
square wave output simply by
connecting diode D across resistor RB.
• The capacitor C charges through RA
and diode D to approximately 2/3 Vcc
anddischarges through RB and terminal
7 until the capacitor voltage equals
approximately 1/3Vcc
Schmitt Trigger: • The input is given to the pin 2 and pin 6
which are tied together. Pins 4 and 8 are
connected to supply voltage +Vcc.
• The common point of two pins 2 and 6
are externally biased at Vcc/2 through
the resistance network R1 and
R2.Generally R1=R2 to the gate biasing
of Vcc/2.
• The upper comparator will trip at
2/3Vccwhile lower comparator at
1/3Vcc.
• The bias provided by R1 and R2 is centered within these two
thresholds.
• Thus when sine wave of sufficient amplitude, greater than Vcc/6 is
applied to the circuit as input, it causes the internal flip flop to alternately
set and reset. Due to this, the circuit produces the square wave at the
output.
CONTENTS: FIXED AND VARIABLE VOLTAGE REGULATORS, PLL AND ITS
APPLICATIONS.
OUTCOMES: Demonstrate the various applications of PLL, voltage
regulators.
MODULE-II
MATRUSRI
ENGINEERING COLLEGE
Phase-Locked Loops
Block Diagram of Phase Locked Loop
phase-locked loop, may be assembled by combining a
• phase detector
• low-pass filter
• voltage-controlled oscillator.
The frequency of the output wave forms is approximated by
Introduction to Voltage Regulators:
Block Diagram of voltage regulator
Zener Voltage Regulator:
• The regulated power supply may use zener diode as the voltage
controlling device.
• The output voltage is determined by the reverse breakdown voltage of
the zener diode.
• This is nearly constant for a wide range of currents.
• The load voltage can be maintained constant by controlling the current
through zener.
• The load current range for which regulation is maintained, is the
difference between maximum allowable zener current and minimum
current required for the zener to operate in breakdown region.
Limitation:
Features of IC 723:
• Input and output short circuit protection
provided.
• Positive or negative supply operation.
• Good line and load regulation.
• Low temperature drift and high ripple
rejection.
• Output voltage can be varied from 2V to 37.
• Small in size and hence economic
IC Regulators:
• 78XX series of regulators. The last two
digits of the IC par number denote the
output voltage of the device.
• These packages, although internally
complex, are inexpensive and easy to use.
• There are a number of different voltages
that can be obtained from the 78XX series
1C; they are 5, 6, 8, 8.5, 10, 12, 15, 18, and
24 V.
voltage regulators
voltage regulators
CONTENTS: DATA CONVERTERS: DIGITAL-TO-ANALOG CONVERTERS (DAC):
WEIGHTED RESISTOR, INVERTED R-2R LADDER, ANALOG-TO- DIGITAL CONVERTERS
(ADC): DUAL SLOPE, SUCCESSIVE APPROXIMATION, FLASH, SPECIFICATIONS.
OUTCOMES: Demonstrate and analyse the operation of the D/A and A/D
converters.
MODULE-III
MATRUSRI
ENGINEERING COLLEGE
Data Converter Integrated Circuits
• The transducer circuit will gives an analog signal.
• This signal is transmitted through the LPF circuit to avoid higher components, and
then the signal is sampled at twice the frequency of the signal to avoid the
overlapping.
• The output of the sampling circuit is applied to A/D converter where the samples are
converted into binary data i.e. 0’s and 1’s.
• Like this the analog data converted into digital data.
• The digital data is again reconverted back into analog by doing exact opposite
operation of first half of the diagram.
• Then the output of the D/A convertor is transmitted through the smoothing filter to
avoid the ripples
What is a DAC?
A digital to analog converter (DAC) converts a digital signal to an analog
voltage or current output.
Types of DACs
• Binary Weighted Resistor
• R-2R Ladder
Binary Weighted Resistor
• Utilizes a summing op-amp circuit.
• Weighted resistors are used to
distinguish each bit from the most
significant to the least significant.
• Transistors are used to switch
between Vref and ground (bit high or
low).
-
+
R
2R
4R
2nR
Rf
Vout
I
Vref
Voltages V1 through Vn are either Vref if corresponding bit is high or ground if
corresponding bit is low
V1 is most significant bit
Vn is least significant bit













R
V
R
V
R
V
R
V
R
IR
V 1
-
n
n
3
2
1
f
f
out
2
4
2

Advantages
• Simple Construction/Analysis
• Fast Conversion
Disadvantages
• Requires large range of resistors (2000:1 for 12-bit DAC) with
necessary high precision for low resistors
• Requires low switch resistances in transistors Can be
expensive.Therefore, usually limited to 8-bit resolution.
R-2R Ladder
Vref V2
V1 V3
Vout
2
2
3
2
1
V
V
R
R
R
V 








1
2
2
1
V
V 
ref
1
2
1
V
V 
IR
V 

out











R
V
b
R
V
b
R
V
b
R
V
b
R
V
16
8
4
2
ref
0
ref
1
ref
2
ref
3
out
i
n
i
i
n
b
V
V
2
1
1
ref
out 




Advantages
Only two resistor values (R and 2R)
Does not require high precision resistors
Disadvantage
Lower conversion speed than binary weighted DAC
Specifications of DACs
•Resolution
•Speed
•Linearity
•Settling Time
•Reference Voltages
•Errors
Different Types Of ADC’s
• It provides the function just opposite to that of a DAC. It accepts an
analog input voltage Va and produces an output binary word d1, d2,
d3….dn. Where d1 is the most significant bit and dn is the least
significant bit.
• ADCs are broadly classified into two groups according to their
conversion techniques
 Direct type
 Integrating type
Direct type ADCs compares a given analog signal with the internally
generated equivalent signal. This group includes
 Flash (Comparator) type converter
 Successive approximation type convertor
 Counter type
 Servo or Tracking type
Integrated type ADCs perform conversion in an indirect manner by first
changing the analog input signal to linear function of time or frequency and
then to a digital code.
Flash (Comparator) Type Converter:
• R is a stable reference voltage provided
by a precision voltage regulator as part
of the converter circuit.
• As the analog input voltage exceeds
the reference voltage at each
comparator, the comparator outputs will
sequentially saturate to a high state.
• The priority encoder generates a binary
number based on the highest-order
active input, ignoring all other active
inputs.
Counter Type A/D Converter
• counter is reset to zero count by reset
pulse.
• After releasing the reset pulse the clock
pulses are counted by the binary
counter.
• These pulses go through the AND gate
which is enabled by the voltage
comparator high output.
• The number of pulses counted increase
with time.
• The analog output Vd of DAC is
compared to the analog input inputVa by
the comparator.
• If Va>Vd the output of the comparator
becomes high and the AND gate is
enabled to allow the transmission of the
clock pulses to the counter.
• When Va<Vd the output of the
comparator becomes low and the AND
gate is disabled. This stops the counting
we can get the digital data.
Servo Tracking A/D Converter :
• An improved version of counting ADC is the
tracking or servo converter.
• The circuit consists of an up/down counter
with the comparator controlling the direction
of the count.
• The analog output of the DAC is Vd and is
compared with the analog input Va.
• If the input Va is greater than the DAC
output signal, the output of the comparator
goes high and the counter is caused to
count up.
• The DAC output increases with each
incoming clock pulse when it becomes more
than Va the counter reverses the direction
and counts down.
Successive-Approximation ADC:
The successive approximation analog to
digital converter circuit typically consists of
• A sample and hold circuit to acquire the
input voltage (Vin).
• An analog voltage comparator that
compares Vin to the output of the
internal DAC and outputs the result of
the comparison to the successive
approximation register (SAR).
• A successive approximation register sub
circuit designed to supply an
approximate digital code of Vin to the
internal DAC.
• An internal reference DAC that supplies
the comparator with an analog voltage
equivalent of the digital code output of
the SAR for comparison with Vin.
• The successive approximation register is initialized so that the most
significant bit (MSB) is equal to a digital 1.
• This code is fed into the DAC, which then supplies the analog
equivalent of this digital code (Vref/2) into the comparator circuit for
comparison with the sampled input voltage.
• If this analog voltage exceeds Vin the comparator causes the SAR to
reset this bit; otherwise, the bit is left a 1.
• Then the next bit is set to 1 and the same test is done, continuing
this binary search until every bit in the SAR has been tested.
• The resulting code is the digital approximation of the sampled input
voltage and is finally output by the DAC at the end of the conversion
(EOC).
Dual-Slope ADC
• An integrating ADC (also dual-slope
ADC) applies the unknown input voltage
to the input of an integrator and allows
the voltage to ramp for a fixed time
period (the run-up period).
• Then a known reference voltage of
opposite polarity is applied to the
integrator and is allowed to ramp until
the integrator output returns to zero (the
run-down period).
• The input voltage is computed as a
function of the reference voltage, the
constant run-up time period, and the
measured run-down time period.
• The run-down time measurement is usually made in units of the
converter's clock, so longer integration times allow for higher resolutions.
• Converters of this type (or variations on the concept) are used in most
digital voltmeters for their linearity and flexibility.
Specifications For DAC/ADC
• Resolution
• Linearity
• Glitches (Particularly DAC)
• Accuracy
• Monotonic
• Settling Time
• Stability

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Pulse & Linear Integrated Circuits

  • 1. MATRUSRI ENGINEERING COLLEGE DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING SUBJECT NAME: PULSE & LINEAR INTEGRATED CIRCUITS (PC233EC) FACULTY NAME: 1. Mrs. P.Sravani MATRUSRI ENGINEERING COLLEGE
  • 2. PULSE & LINEAR INTEGRATED CIRCUITS COURSE OBJECTIVES:  Analyze the behavior of linear and non linear wave shaping circuits.  Analyze and design of Multivobrators.  Understand the operation of OP-AMP and its internal circuits.  Analyze the applications of OP-AMP and 555 Timer.  5.Explain the operation of various data converter circuits and PLL. MATRUSRI ENGINEERING COLLEGE COURSE OUTCOMES:  Construct different linear and non linear networks and analyse their response to different input signals.  Understand, analyse and design multivibrators and sweep circuits using transistors.  Analyse DC characteristics and AC characteristics for single/Dual input Balanced/Unbalanced output configurations using BJTs and OP-AMP.  Distinguish various linear and nonlinear applications of OP-AMP.  Demonstrate the various applications of 555 Timer and analyse the operation of the D/A and A/D converters.
  • 3. UNIT-I:Linear & Non linear wave shaping MATRUSRI ENGINEERING COLLEGE INTRODUCTION:  A linear network is a network made up of linear elements only. A linear network can be described by linear differential equations. The principle of superposition and the principle of homogeneity hold good for linear networks.  In pulse circuitry, there are a number of waveforms, which appear very frequently. The most important of these are sinusoidal, step, pulse, square wave, ramp, and exponential waveforms. The response of RC circuits to these signals is described in this chapter.  The process whereby the form of a non-sinusoidal signal is altered by transmission through a linear network is called linear wave shaping.  The process where by the form of a signal is changed by transmission through a non-linear network is called Non-linear Wave Shaping.
  • 4. OUTCOMES:  To derive the response of high-pass and low-pass RC circuits to different types of inputs like Sinusoidal, pulse, step, square, ramp signals.  To describe the application of high pass and low pass circuit as Differentiator and integrator respectively.  To understand the principles of working of uncompensated and compensated attenuators and the operation of the attenuator circuit in CRO probe.  To study the principle of operation of various series and shunt clipping circuits.  To study the principle of operation of various clamping circuits and verify the clamping circuit theorem.
  • 5. MODULE-I: Linear wave shaping MATRUSRI ENGINEERING COLLEGE CONTENTS:  High pass RC circuits with Step, Pulse, Square wave and Ramp inputs  Low pass RC circuits with Step, Pulse, Square wave and Ramp inputs  High pass RC circuit as Differentiator  Low pass RC circuit as Integrator OUTCOMES:  To derive the response of high-pass and low-pass RC circuits to different types of inputs like Sinusoidal, pulse, step, square, ramp signals.  To describe the application of high pass and low pass circuit as Differentiator and integrator respectively.
  • 6. DEFINITION: It is the process of changing the shape of input signal with linear / non-linear circuits. Wave Shaping MATRUSRI ENGINEERING COLLEGE Types  Linear Wave Shaping  Non-linear Wave Shaping
  • 7. DEFINITION: The process where by the form of a non- sinusoidal signal is changed by transmission through a linear network is called linear wave shaping. MATRUSRI ENGINEERING COLLEGE Linear Wave Shaping Types  High Pass RC Circuit.  Low Pass RC Circuit.
  • 8. Non-sinusoidal wave forms MATRUSRI ENGINEERING COLLEGE 1. Step Waveform: A step voltage is one which maintains the value zero for all times t<0 and maintains the value V for all times t>0.
  • 9. 2. Pulse Waveform: The pulse amplitude is V and the pulse duration is tp. MATRUSRI ENGINEERING COLLEGE
  • 10. 3. Square Wave: A wave form which maintains itself at one constant level V1 for a time T1 and at other constant Level V11 for a time T2 and which is repetitive with a period T=T1+T2 is called a square-wave. MATRUSRI ENGINEERING COLLEGE
  • 11. 4.Ramp: A waveform which is zero for t < 0 and which increases linearly with time for t > 0. MATRUSRI ENGINEERING COLLEGE
  • 12. High Pass RC Circuit MATRUSRI ENGINEERING COLLEGE  At zero frequency the reactance of the capacitor is infinity and so it blocks the input and hence the output is zero. Hence, this capacitor is called the blocking capacitor and this circuit, also called the capacitive coupling circuit, is used to provide dc isolation between the input and the output.  Since this circuit attenuates low-frequency signals and allows transmission of high-frequency signals with little or no attenuation, it is called a high-pass circuit.
  • 14. Step Input MATRUSRI ENGINEERING COLLEGE The instantaneous change in voltage across the capacitor is given by
  • 15. Pulse Input MATRUSRI ENGINEERING COLLEGE  The pulse input is the same as that for a step input and is given by Vo(t) = V e-t/ RC. At t = tp, Vo(t) = V = V e-t/RC .  At t = tp, since the input falls by V volts suddenly and since the voltage across the capacitor cannot change instantaneously, the output also falls suddenly by V volts to Vp - V.  Hence at t = t + , va(t) = Ve-tp /RC - V . Since Vp< V, Vp- V is negative. So there is an undershoot at t = tp and hence for t > tp, the output is negative. For t > tp, the output rises exponentially towards zero with a time constant RC according to the expression (Ve-tp/RC - V)e-(t-tp)/RC- The output waveforms for RC » tp, RC comparable to tp and RC « tp.
  • 21. THE HIGH-PASS RC CIRCUIT AS A DIFFERENTIATOR MATRUSRI ENGINEERING COLLEGE
  • 22. THE LOW-PASS RC CIRCUIT MATRUSRI ENGINEERING COLLEGE  At zero frequency, the reactance of the capacitor is infinity (i.e. the capacitor acts as an open circuit) so the entire input appears at the output, i.e. the input is transmitted to the output with zero attenuation. So the output is the same as the input, i.e. the gain is unity.  As the frequency increases the capacitive reactance decreases and so the output decreases. At very high frequencies the capacitor virtually acts as a short-circuit and the output falls to zero.
  • 24. Step-Voltage Input MATRUSRI ENGINEERING COLLEGE Expression for rise time: When a step signal is applied, the rise time tr is defined as the time taken by the output voltage waveform to rise from 10% to 90% of its final value: It gives an indication of how fast the circuit can respond to a discontinuity in voltage.
  • 25. Relation between rise time and upper 3-dB frequency MATRUSRI ENGINEERING COLLEGE  Thus, the rise time is inversely proportional to the upper 3-dB frequency. The time constant (Τ= RC) of a circuit is defined as the time taken by the output to rise to 63.2% of the amplitude of the input step. It is same as the time taken by the output to rise to 100% of the amplitude of the input step, if the initial slope of rise is maintained
  • 26. Pulse Input MATRUSRI ENGINEERING COLLEGE If the time constant RC of the circuit is very large, at the end of the pulse, the output voltage will be Vp(t) = V(1 – e-tp/RC), and the output will decrease to zero from this value with a time constant RC
  • 27. Square-Wave Input MATRUSRI ENGINEERING COLLEGE  A square wave is a periodic waveform which maintains itself at one constant level V’ with respect to ground for a time T1 and then changes abruptly to another level V", and remains constant at that level for a time T2, and repeats itself at regular intervals of T = T1 + T2.  A square wave may be treated as a series of positive and negative steps. The shape of the output waveform for a square wave input depends on the time constant of the circuit. If the time constant is very small, the rise time will also be small and a reasonable reproduction of the input may be obtained.
  • 30. THE LOW-PASS RC CIRCUIT AS AN INTEGRATOR MATRUSRI ENGINEERING COLLEGE As time increases, the voltage drop across C does not remain negligible compared with that across R and the output will not remain the integral of the input. The output will change from a quadratic to a linear function of time.
  • 31. If the time constant of an RC low-pass circuit is very large in comparison with the. time required for the input signal to make an appreciable change, the circuit acts as an integrator. MATRUSRI ENGINEERING COLLEGE 1. It is easier to stabilize an integrator than a differentiator because the gain of an integrator decreases with frequency whereas the gain of a differentiator increases with frequency. 2. An integrator is less sensitive to noise voltages than a differentiator because of its limited bandwidth. 3. The amplifier of a differentiator may overload if the input waveform changes very rapidly. 4. It is more convenient to introduce initial conditions in an integrator.  A criterion for good integration in terms of steady-state analysis is as follows: The low-pass circuit acts as an integrator provided the time constant of the circuit RC > 15T, where T is the period of the input sine wave. When RC > 15T, the input sinusoid will be shifted at least by 89.4° (instead of the ideal 90° shift required for integration) when it is transmitted through the network.  An RC integrator converts a square wave into a triangular wave. Integrators are almost invariably preferred over differentiators in analog computer applications for the following reasons:
  • 32. Module 2: Attenuators MATRUSRI ENGINEERING COLLEGE Attenuators are resistive networks, which are used to reduce the amplitude of the input signal. The simple resistor combination of Figure 1.61 (a) would multiply the input signal by the ratio a = R2/(R1 + R2) independently of the frequency. If the output of the attenuator is feeding a stage of amplification, the input capacitance C2 of the amplifier will be the stray capacitance shunting the resistor R2 of the attenuator and the attenuator will be as shown in Figure 1.61(b), and the attenuation now is not independent of frequency
  • 36. Module 3: Non linear wave shaping MATRUSRI ENGINEERING COLLEGE Nonlinear wave shaping circuits may be classified as clipping circuits and clamping circuits.  A clipping circuit is a circuit which removes the undesired part of the waveform and transmits only the desired part of the signal which is above or below some particular reference level, i.e. it is used to select for transmission that part of an arbitrary waveform which lies above or below some particular reference.  Clipping circuits are also called voltage (or current) limiters, amplitude selectors or slicers.  Clipping circuits may be single level clippers or two level clippers. Single level clippers may be series diode clippers with and without reference or shunt diode clippers with and without reference. Clipping circuits may use diodes or transistors.  Clamping circuits may be negative clampers (positive peak clampers) with and without reference or positive clampers (negative peak clampers) with and without reference.
  • 37. Diode Characteristics MATRUSRI ENGINEERING COLLEGE The V-I characteristic of a practical diode and idealized diode approximated by a curve which is shown below. The break point occurs at Vr, where Vr = 0.2 V for Ge and Vr = 0.6 V for Si. Usually Vr is very small compared to the reference voltage VR and can be neglected.
  • 38. Clippers MATRUSRI ENGINEERING COLLEGE Typical projects of electronics operate at different electrical signal ranges and therefore, for these electronic circuits, it is intended to maintain the signals in a particular range in order to obtain the desired outputs. Clipper and Clamper are widely used in analog television receivers and FM transmitters. The variable frequency interference can be removed by using the clamping method in television receivers, and in FM transmitters, the noise peaks are limited to a specific value, above which the excessive peaks can be removed by using the clipping method. An electronic device that is used to evade the output of a circuit to go beyond the preset value (voltage level) without varying the remaining part of the input waveform is called as Clipper circuit.
  • 39. MATRUSRI ENGINEERING COLLEGE 1. Series Clippers Series clippers are again classified into series negative clippers and series positive clippers which are as follows: a. Series Negative Clipper Series Negative Clipper  The above figure shows a series negative clipper with its output waveforms. During the positive half cycle the diode (considered as ideal diode) appears in the forward biased and conducts such that the entire positive half half cycle of input appears across the resistor connected in parallel as output waveform.  During the negative half cycle the diode is in reverse biased. No output appears across the resistor. Thus, it clips the negative half cycle of the input waveform, and therefore, it is called as a series negative clipper.
  • 40. MATRUSRI ENGINEERING COLLEGE Series Negative Clipper With reference voltage Vr: Series Negative Clipper With Positive Vr  During the positive half cycle, the diode start conducting only after its anode voltage value exceeds the cathode voltage value. Since cathode voltage becomes equal to the reference voltage, the output that appears across the resistor Series Negative Clipper With Negative Vr  During the positive half cycle, the entire input appears as output across the resistor, and during the negative half cycle, the input appears as output until the input value will be less than the negative reference voltage, as shown in the figure.
  • 41. MATRUSRI ENGINEERING COLLEGE b. Series Positive Clipper Series Positive Clipper During the positive half cycle, diode becomes reverse biased, and no output is generated across the resistor, and during the negative half cycle, the diode conducts and the entire input appears as output across the resistor.
  • 42. MATRUSRI ENGINEERING COLLEGE Series Positive Clipper with reference voltage Vr: Series Positive Clipper with Negative Vr  During the positive half cycle, the output appears across the resistor as a negative reference voltage. During the negative half cycle, the output is generated after reaching a value greater than the negative reference voltage. Series Positive Clipper with Positive Vr  During the positive half cycle, the reference voltage appears as an output across the resistor, and during the negative half cycle, the entire input appears as output across the resistor.
  • 43. MATRUSRI ENGINEERING COLLEGE 2. Shunt Clippers Shunt clippers are classified into two types: shunt negative clippers and shunt positive clippers. a. Shunt Negative Clipper Shunt Negative Clipper  Shunt negative clipper is connected as shown in the above figure. During the positive half cycle, the entire input is the output, and during the negative half cycle, the diode conducts causing no output to be generated from the input.
  • 44. MATRUSRI ENGINEERING COLLEGE Shunt Negative Clipper with Positive Vr Shunt Negative Clipper with Positive Vr  During the positive half cycle, the input is generated as output, and during the negative half cycle, a positive reference voltage will be the output voltage as shown above. Shunt Negative Clipper with Negative Vr Shunt Negative Clipper with Negative Vr  During the positive half cycle, the entire input appears as output, and during the negative half cycle, a reference voltage appears as output as shown in the above figure.
  • 45. MATRUSRI ENGINEERING COLLEGE b. Shunt Positive Clipper Shunt Positive Clipper During the positive half cycle the diode is in conduction mode and no output is generated; and during the negative half cycle; entire input appears as output as the diode is in reverse bias as shown in the above figure.
  • 46. MATRUSRI ENGINEERING COLLEGE Shunt Positive Clipper with Negative Vr Shunt Positive Clipper with Negative Vr During the positive half cycle, the negative reference voltage connected in series with the diode appears as output; and during the negative half cycle, the diode conducts until the input voltage value becomes greater than the negative reference voltage and output will be generated Shunt Positive Clipper with Positive Vr Shunt Positive Clipper with Positive Vr During the positive half cycle the diode conducts causing the positive reference voltage appear as output voltage; and, during the negative half cycle, the entire input is generated as the output as the diode is in reverse biased.
  • 47. MATRUSRI ENGINEERING COLLEGE Positive-Negative Clipper with Reference Voltage Vr Positive-Negative Clipper with Reference Voltage Vr  The circuit is connected as shown in the figure with a reference voltage Vr, diodes D1 & D2. During the positive half cycle, the diode the diode D1 conducts causing the reference voltage connected in series with D1 to appear across the output.  During the negative cycle, the diode D2 conducts causing the negative reference voltage connected across the D2 appear as output, as shown in the above figure.
  • 48. Applications of Clippers Clippers find several applications, such as They are frequently used for the separation of synchronizing signals from the composite picture signals. The excessive noise spikes above a certain level can be limited or clipped in FM transmitters by using the series clippers. For the generation of new waveforms or shaping the existing waveform, clippers are used. The typical application of diode clipper is for the protection of transistor from transients, as a freewheeling diode connected in parallel across the inductive load. Frequently used half wave rectifier in power supply kits is a typical example of a clipper. It clips either positive or negative half wave of the input. Clippers can be used as voltage limiters and amplitude selectors. MATRUSRI ENGINEERING COLLEGE
  • 49. MATRUSRI ENGINEERING COLLEGE Clampers Working of Clamper Circuit  The positive or negative peak of a signal can be positioned at the desired level by using the clamping circuits. As we can shift the levels of peaks of the signal by using a clamper, hence, it is also called as level shifter.  The clamper circuit consists of a capacitor and diode connected in parallel across the load. The clamper circuit depends on the change in the time constant of the capacitor.  The capacitor must be chosen such that, during the conduction of the diode, the capacitor must be sufficient to charge quickly and during the non conducting period of diode, the capacitor should not discharge drastically. The clampers are classified as positive and negative clampers based on the clamping method.
  • 50. MATRUSRI ENGINEERING COLLEGE 1. Negative Clamper Negative Clamper During the positive half cycle, the input diode is in forward bias- and as the diode conducts-capacitor gets charged (up to peak value of input supply). During the negative half cycle, reverse does not conduct and the output voltage become equal to the sum of the input voltage and the voltage stored across the capacitor.
  • 51. MATRUSRI ENGINEERING COLLEGE a. Negative Clamper with Positive Vr Negative Clamper with Positive Vr  As the positive reference voltage is connected in series with the diode, during the positive half cycle, even though the diode conducts, the output voltage becomes equal to the reference voltage; hence, the output is clamped towards the positive direction. b. Negative Clamper with Negative Vr Negative Clamper with Negative Vr  By inverting the reference voltage directions, the negative reference voltage is connected in series with the diode as shown in the above figure. During the positive half cycle, the diode starts conduction before zero, as the cathode has a negative reference voltage, which is less than that of zero and the anode voltage, and thus, the waveform is clamped towards the negative direction by the reference voltage value.
  • 52. MATRUSRI ENGINEERING COLLEGE 2. Positive Clamper Positive Clamper  It is almost similar to the negative clamper circuit, but the diode is connected in the opposite direction. During the positive half cycle, the voltage across the output terminals becomes equal to the sum of the input voltage and capacitor voltage (considering the capacitor as initially fully charged). During the negative half cycle of the input, the diode starts conducting and charges the capacitor rapidly to its peak input value. Thus the waveforms are clamped towards the positive direction as shown above.
  • 53. MATRUSRI ENGINEERING COLLEGE a. Positive Clamper with Positive Vr Positive Clamper with Positive Vr  During the positive half cycle of the input, the diode conducts as initially the supply voltage is less than the anode positive reference voltage. If once the cathode voltage is greater than anode voltage then the diode stops conduction. During the negative half cycle, the diode conducts and charges the capacitor. b. Positive Clamper with Negative Vr Positive Clamper with Negative Vr  During the positive half cycle the diode will be non conducting, such that the output is equal to capacitor voltage and input voltage. During the negative half cycle, the diode starts conduction only after the cathode voltage value becomes less than the anode voltage.
  • 54. Clamping Circuit Theorem The clamping circuit theorem states that under steady-state conditions, for any input waveform, the ratio of the area under the output voltage curve in the forward direction to that in the reverse direction is equal to the ratio Rf/R. To prove the clamping circuit theorem, consider a typical steady-state output for the clamping circuit. The expression for the clamping circuit theorem is: MATRUSRI ENGINEERING COLLEGE
  • 55. MATRUSRI ENGINEERING COLLEGE Applications of Clampers Clampers can be used in applications:  The complex transmitter and receiver circuitry of television clamper is used as a base line stabilizer to define sections of the luminance signals to preset levels.  Clampers are also called as direct current restorers as they clamp the wave forms to a fixed DC potential.  These are frequently used in test equipment, sonar and radar systems.  For the protection of the amplifiers from large errant signals clampers are used.  Clampers can be used for removing the distortions.  For improving the overdrive recovery time clampers are used.  Clampers can be used as voltage doublers or voltage multipliers.
  • 56. MATRUSRI ENGINEERING COLLEGE UNIT-II: Multivibrators MATRUSRI ENGINEERING COLLEGE INTRODUCTION: A multivibrator is used to implement simple two-state systems such as oscillators, timers and flip-flops.  Three types: Astable – neither state is stable. Applications: oscillator, etc. Monostable - one of the states is stable, but the other is not; Applications: timer, etc. Bistable – it remains in either state indefinitely. Applications: flip-flop, etc.
  • 57. MATRUSRI ENGINEERING COLLEGE OUTCOMES: To study the principle of operation of the multivibrators. To study the applications of multivibrators. To realize the need for a commutating condenser in a monostable multivibrator and bistable multivibrator. To study the principle of operation of Time base generators To study the features of the Time base signal. To study the principle of operation of Miller Time base To study the principle of operation of Bootstrap Time base generator To study the principle of operation of UJT saw tooth generator. To study the principle of operation of time base generators using Op- Amps.
  • 58. MATRUSRI ENGINEERING COLLEGE MODULE-I: Multivibrators MATRUSRI ENGINEERING COLLEGE CONTENTS:  Bistable multivibrator  Monostable multivibrator  Astable multivibrator  Schmitt Trigger OUTCOMES: To study the principle of operation of the multivibrators. To study the applications of multivibrators. To realize the need for a commutating condenser in a monostable multivibrator and bistable multivibrator.
  • 68. MATRUSRI ENGINEERING COLLEGE  Advantages The advantages of Schmitt trigger circuit are •Perfect logic levels are maintained. •It helps avoiding Meta-stability. •Preferred over normal comparators for its pulse conditioning.  Disadvantages The main disadvantages of a Schmitt trigger are •If the input is slow, the output will be slower. •If the input is noisy, the output will be noisier.  Applications of Schmitt trigger Schmitt trigger circuits are used as Amplitude Comparator and Squaring Circuit. They are also used in Pulse conditioning and sharpening circuits.
  • 69. MATRUSRI ENGINEERING COLLEGE Module 2: Time Base Generators A time-base generator is an electronic circuit which generates an output voltage or current waveform, a portion of which varies linearly with time. Ideally the output waveform should be a ramp. Time-base generators may be voltage time-base generators or current time-base generators. A voltage time-base generator is one that provides an output voltage waveform, a portion of which exhibits a linear variation with respect to time. A current time-base generator is one that provides an output current waveform, a portion of which exhibits a linear variation with respect to time. There are many important applications of time-base generators, such as in CROs, television and radar displays, in precise time measurements, and in time modulation.  Since this waveform is used to sweep the electron beam horizontally across the screen it is called the sweep voltage and the time-base generators are called the sweep circuits.
  • 70. MATRUSRI ENGINEERING COLLEGE GENERAL FEATURES OF A TIME-BASE SIGNAL Precisely linear sweep signals are difficult to generate by time-base generators and moreover nominally linear sweep signals may be distorted when transmitted through a coupling network. The deviation from linearity is expressed in three most important ways: 1 . The slope or sweep speed error, es 2. The displacement error, ed 3. The transmission error, et
  • 71. MATRUSRI ENGINEERING COLLEGE 1. The Slope or Sweep Speed Error (es): A Sweep voltage must increase linearly with time. The rate of change of sweep voltage with time must be constant. This deviation from linearity is defined as Slope Speed Error or Sweep Speed Error.
  • 72. MATRUSRI ENGINEERING COLLEGE 2. The Transmission Error (et): When a sweep signal passes through a high pass circuit, the output gets deviated from the input as shown below. This deviation is expressed as transmission error. Where V’s is the input and Vs is the output at the end of the sweep i.e. at t = Ts.
  • 73. MATRUSRI ENGINEERING COLLEGE 3. The Displacement Error (ed) An important criterion of linearity is the maximum difference between the actual sweep voltage and the linear sweep which passes through the beginning and end points of the actual sweep. This can be understood from the following figure. The displacement error ed is defined as
  • 74. MATRUSRI ENGINEERING COLLEGE Relation between three errors: If the deviation from linearity is very small and the sweep voltage may be approximated by the sum of linear and quadratic terms in t, then the above three errors are related as
  • 75. MATRUSRI ENGINEERING COLLEGE METHODS OF GENERATING A TIME-BASE WAVEFORM  Exponential charging. In this method a capacitor is charged from a supply voltage through a resistor to a voltage which is small compared with the supply voltage.  Constant current charging. In this method a capacitor is charged linearly from a constant current source. Since the charging current is constant the voltage across the capacitor increases linearly.  The Miller circuit. In this method an operational integrator is used to convert an input step voltage into a ramp waveform.  The Phantastron circuit. In this method a pulse input is converted into a ramp. This is a version of the Miller circuit.  The bootstrap circuit. In this method a capacitor is charged linearly by a constant current which is obtained by maintaining a constant voltage across a fixed resistor in series with the capacitor.  Compensating networks. In this method a compensating circuit is introduced to improve the linearity of the basic Miller and bootstrap time-base generators.  An inductor circuit. In this method an RLC series circuit is used. Since an inductor does not allow the current passing through it to change instantaneously, the current through the capacitor more or less remains constant and hence a more linear sweep is obtained.
  • 76. MATRUSRI ENGINEERING COLLEGE Bootstrap Time Base Generator A bootstrap sweep generator is a time base generator circuit whose output is fed back to the input through the feedback. This will increase or decrease the input impedance of the circuit. This process of bootstrapping is used to achieve constant charging current. Advantage The main advantage of this boot strap ramp generator is that the output voltage ramp is very linear and the ramp amplitude reaches the supply voltage level.
  • 77. MATRUSRI ENGINEERING COLLEGE Miller Sweep Generator The transistor Miller time base generator circuit is the popular Miller integrator circuit that produces a sweep waveform. This is mostly used in horizontal deflection circuits. Applications: Miller sweep circuits are the most commonly used integrator circuit in many devices. It is a widely used saw tooth generator.
  • 78. MATRUSRI ENGINEERING COLLEGE Unijunction Transistor Unijunction Transistor is such a transistor that has a single PN junction, but still not a diode. Unijunction Transistor, or simply UJT has an emitter and two bases, unlike a normal transistor. This component is especially famous for its negative resistance property and also for its application as a relaxation oscillator.
  • 79. MATRUSRI ENGINEERING COLLEGE Circuit diagram Output Waveform Applications of UJT UJTs are most prominently used as relaxation oscillators. They are also used in Phase Control Circuits. In addition, UJTs are widely used to provide clock for digital circuits, timing control for various devices, controlled firing in thyristors, and sync pulsed for horizontal deflection circuits in CRO.
  • 80. INTRODUCTION:DIFFERENTIAL AMPLIFIERS: CLASSIFICATION, DC AND AC ANALYSIS OF SINGLE/DUAL INPUT BALANCED AND UNBALANCED OUTPUT CONFIGURATIONS USING BJTS. LEVEL TRANSLATOR. OPERATIONAL AMPLIFIER: OP AMP BLOCK DIAGRAM, IDEAL OPAMP CHARACTERISTICS, OPAMP AND ITS FEATURES, OPAMP PARAMETERS AND MEASUREMENTS, INPUT AND OUTPUT OFFSET VOLTAGES AND CURRENTS, SLEW RATE, CMRR, PSRR. FREQUENCY RESPONSE AND COMPENSATION TECHNIQUES. UNIT-III Operational Amplifiers OUTCOMES:Analyse DC and AC characteristics for single/Dual input Balanced/Unbalanced output configurations using BJTs and OP-AMP. MATRUSRI ENGINEERING COLLEGE
  • 81. CONTENTS: DIFFERENTIAL AMPLIFIERS: CLASSIFICATION, DC AND AC ANALYSIS OF SINGLE/DUAL INPUT BALANCED AND UNBALANCED OUTPUT CONFIGURATIONS USING BJTS. LEVEL TRANSLATOR. OUTCOMES: Analyse DC and AC characteristics for single/Dual input Balanced/Unbalanced output configurations using BJTs. MODULE-I MATRUSRI ENGINEERING COLLEGE
  • 82. Differential amplifier: • Differential amplifier is a basic building block of an op-amp. • Amplifies the difference between two input signals. • The two transistors Q1 and Q2 have identical characteristics. • The resistances of the circuits are equal, i.e. RE1 = RE2, RC1 = RC2. • The magnitude of +VCC is equal to the magnitude of -VEE.
  • 83. Differential amplifier configurations: 1. Dual input, balanced output differential amplifier. 2. Dual input, unbalanced output differential amplifier.
  • 84. 3. Single input balanced output differential amplifier. 4. Single input unbalanced output differential amplifier.
  • 85. AC & DC Analysis of Dual Input, Balanced Output Differential Amplifier: D.C. Analysis: To obtain the operating point (ICQ and VCEQ) for differential amplifier dc equivalent circuit is drawn by reducing the input voltages V1 and V2 to zero
  • 86. Applying KVL to the base emitter loop of the transistor Q1. VBE = 0.6V for Si and 0.2V for Ge. Generally, Knowing the value of IC the voltage at the collector VC is given by
  • 87. A.C. Analysis AC equivalent circuit using r-parameters:
  • 88.
  • 89. Thus a differential amplifier amplifies the difference between two input signals. Defining the difference of input signals as Vd = V1 – V2, the voltage gain of the dual input balanced output differential amplifier can be given by Differential Input Resistance:
  • 90. Output Resistance (Ro): Inverting & Non – inverting Inputs: V1 is called the non-inventing input V2 is called inverting input. Level Translator: • The direct coupling the dc level at the emitter rises from stages to stage. • This increase in dc level tends to shift the operating point of the succeeding stages and therefore limits the output voltage swing and may even distort the output signal. • To shift the output dc level to zero, level translator circuits are used.
  • 91. emitter follower with voltage divider emitter follower either with diode current bias or current mirror bias emitter follower either with diode current bias or current mirror bias
  • 93. CONTENTS: OPERATIONAL AMPLIFIER: OP AMP BLOCK DIAGRAM, IDEAL OPAMP CHARACTERISTICS, OPAMP AND ITS FEATURES, OPAMP PARAMETERS AND MEASUREMENTS, INPUT AND OUTPUT OFFSET VOLTAGES AND CURRENTS, SLEW RATE, CMRR, PSRR. FREQUENCY RESPONSE AND COMPENSATION TECHNIQUES. OUTCOMES:Analyse DC and AC characteristics for single/Dual input Balanced/Unbalanced output configurations using BJTs and OP-AMP. MODULE-II MATRUSRI ENGINEERING COLLEGE
  • 94. Operational Amplifier: • What is an Integrated Circuit? • Where do you use an Integrated Circuit? • Why do you prefer an Integrated Circuit to the circuits made by interconnecting discrete components?
  • 95. Def: The “Integrated Circuit “ or IC is a miniature, low cost electronic circuit consisting of active and passive components that are irreparably joined together on a single crystal chip of silicon. In 1958 Jack Kilby of Texas Instruments invented first IC
  • 96. • Communication • Control • Instrumentation • Computer • Electronics Applications of an Integrated Circuit
  • 97. • Small size • Low cost • Less weight • Low supply voltages • Low power consumption • Highly reliable • Matched devices • Fast speed Advantages:
  • 98. Classification • Digital ICs • Linear ICs Pn junction isolation Hybrid circuits Integrated circuits Dielectric isolation Monolithic circuits Bipolar Uni polar MOSFET JFET Classification of ICs Thick &Thin film
  • 99. Chip size and Complexity • Invention of Transistor (Ge) - 1947 • Development of Silicon - 1955-1959 • Silicon Planar Technology - 1959 • First ICs, SSI (3- 30gates/chip) - 1960 • MSI ( 30-300 gates/chip) - 1965-1970 • LSI ( 300-3000 gates/chip) -1970-1975 • VLSI (More than 3k gates/chip) - 1975 • ULSI (more than one million active devices are integrated on single chip)
  • 100. SSI MSI LSI VLSI ULSI < 100 active devices 100-1000 active devices 1000- 100000 active devices >100000 active devices Over 1 million active devices Integrated resistors, diodes & BJT’s BJT’s and Enhanced MOSFETS MOSFETS 8bit, 16bit Microproces sors Pentium Microproces sors
  • 101. IC Package types • Metal can Package • Dual-in-line • Flat Pack Metal can Packages: • The metal sealing plane is at the bottom over which the chip is bounded • It is also called transistor pack
  • 102. Dual-in-line Package The chip is mounted inside a plastic or ceramic case The 8 pin Dip is called MiniDIP and also available with 12, 14, 16, 20pins Flat pack The chip is enclosed in a rectangular ceramic case
  • 103. Selection of IC Package Type Criteria Metal can package 1. Heat dissipation is important 2. For high power applications like power amplifiers, voltage regulators etc. DIP 1. For experimental or bread boarding purposes as easy to mount 2. If bending or soldering of the leads is not required 3. Suitable for printed circuit boards as lead spacing is more Flat pack 1. More reliability is required 2. Light in weight 3. Suited for airborne applications
  • 104. Factors affecting selection of IC package Temperature Ranges 1. Military temperature range : -55o C to +125o C (-55o C to +85o C) 2. Industrial temperature range : -20o C to +85o C (-40o C to +85o C ) 3. Commercial temperature range: 0o C to +70o C (0o C to +75o C ) • Relative cost • Reliability • Weight of the package • Ease of fabrication • Power to be dissipated • Need of external heat sink
  • 105. Manufacturer’s Designation for Linear ICs Fairchild - µA, µAF National Semiconductor - LM,LH,LF,TBA Motorola - MC,MFC RCA - CA,CD Texas Instruments - SN Signetics - N/S,NE/SE Burr- Brown - BB Operational Amplifier An “Operational amplifier” is a direct coupled high-gain amplifier usually consisting of one or more differential amplifiers and usually followed by a level translator and output stage. The operational amplifier is a versatile device that can be used to amplify dc as well as ac input signals and was originally designed for computing such mathematical functions as addition, subtraction, multiplication and integration.
  • 109. Characteristics and performance parameters of Op-amp (cotd..) • Input offset Voltage • Input offset current • Input bias current • Differential input resistance • Input capacitance • Open loop voltage gain • CMRR • Output voltage swing • Output resistance
  • 110. • Offset adjustment range • Input Voltage range • Power supply rejection ratio • Power consumption • Slew rate • Gain – Bandwidth product • Equivalent input noise voltage and current • Average temperature coefficient of offset parameters • Output offset voltage • Supply current Characteristics and performance parameters of Op-amp
  • 111. 1. Input Offset Voltage The differential voltage that must be applied between the two input terminals of an op-amp, to make the output voltage zero. It is denoted as Vios For op-amp 741C the input offset voltage is 6mV 2. Input offset current The algebraic difference between the currents flowing into the two input terminals of the op-amp It is denoted as Iios = | Ib1 – Ib2| For op-amp 741C the input offset current is 200nA
  • 112. 3. Input bias current The average value of the two currents flowing into the op-amp input terminals It is expressed mathematically as 2 2 1 b b I I  For 741C the maximum value of Ib is 500nA 4. Differential Input Resistance It is the equivalent resistance measured at either the inverting or non- inverting input terminal with the other input terminal grounded
  • 113. 5. Input capacitance It is the equivalent capacitance measured at either the inverting or non- inverting input terminal with the other input terminal grounded. It is denoted as Ci For 741C it is of the 1-4 pF 6. Open loop Voltage gain It is the ratio of output voltage to the differential input voltage, when op-amp is in open loop configuration, without any feedback. It is also called as large signal voltage gain. It is denoted as AOL AOL=Vo / Vd For 741C it is typically 200,000
  • 114. 7. CMRR It is the ratio of differential voltage gain Ad to common mode voltage gain Ac CMRR = Ad / Ac Ad is open loop voltage gain AOL and Ac = VOC / Vc For op-amp 741C CMRR is 90 dB 8. Output Voltage swing The op-amp output voltage gets saturated at +Vcc and –VEE and it cannot produce output voltage more than +Vcc and –VEE. Practically voltages +Vsat and –Vsat are slightly less than +Vcc and –VEE . For op-amp 741C the saturation voltages are + 13V for supply voltages + 15V
  • 115. 9. Output Resistance It is the equivalent resistance measured between the output terminal of the op-amp and ground It is denoted as Ro For op-amp 741 it is 75Ω 10. Offset voltage adjustment range The range for which input offset voltage can be adjusted using the potentiometer so as to reduce output to zero For op-amp 741C it is + 15mV
  • 116. 11. Input Voltage range It is the range of common mode voltages which can be applied for which op-amp functions properly and given offset specifications apply for the op- amp For + 15V supply voltages, the input voltage range is + 13V 12. Power supply rejection ratio PSRR is defined as the ratio of the change in input offset voltage due to the change in supply voltage producing it, keeping the other power supply voltage constant. It is also called as power supply sensitivity (PSV) PSRR= (Δvios / ΔVcc)|constant VEE PSRR= (Δvios / ΔVEE)|constant Vcc The typical value of PSRR for op-amp 741C is 30µV/V
  • 117. 13. Power Consumption It is the amount of quiescent power to be consumed by op-amp with zero input voltage, for its proper functioning It is denoted as Pc For 741C it is 85mW 14. Slew rate Slew rate = S = dVo / dt |max It is specified by the op-amp in unity gain condition. The slew rate is caused due to limited charging rate of the compensation capacitor and current limiting and saturation of the internal stages of op-amp, when a high frequency large amplitude signal is applied. It is given by dVc /dt = I/C For large charging rate, the capacitor should be small or the current should be large. S = Imax / C For 741 IC the charging current is 15 µA and the internal capacitor is 30 pF. S= 0.5V/ µsec
  • 119. 15. Gain – Bandwidth product It is the bandwidth of op-amp when voltage gain is unity (1). It is denoted as GB. The GB is also called unity gain bandwidth (UGB) or closed loop bandwidth It is about 1MHz for op-amp 741C 16. Equivalent Input Noise Voltage and Current The noise is expressed as a power density Thus equivalent noise voltage is expressed as V2 /Hz while the equivalent noise current is expressed as A2 /Hz
  • 120. 17. Average temperature coefficient of offset parameters The average rate of change of input offset voltage per unit change in temperature is called average temperature coefficient of input offset voltage or input offset voltage drift It is measured in µV/oC. For 741 C it is 0.5 µV/oC The average rate of change of input offset current per unit change in temperature is called average temperature coefficient of input offset current or input offset current drift It is measured in nA/oC or pA/oC . For 741 C it is 12 pA/oC
  • 121. 18. Output offset voltage ( Voos ) The output offset voltage is the dc voltage present at the output terminals when both the input terminals are grounded. It is denoted as Voos 19. Supply current It is drawn by the op-amp from the power supply For op-amp 741C it is 2.8mA Op amp equivalent circuit
  • 122. Block diagram of op amp
  • 123. The Ideal Operational Amplifier • Open loop voltage gain AOL = ∞ • Input Impedance Ri = ∞ • Output Impedance Ro = 0 • Bandwidth BW = ∞ • Zero offset (Vo = 0 when V1 = V2 = 0) Vios = 0 • CMRR ρ = ∞ • Slew rate S = ∞ • No effect of temperature • Power supply rejection ratio PSRR = 0
  • 124. Ideal Op-amp 1.An ideal op-amp draws no current at both the input terminals I.e. I1 = I2 = 0. Thus its input impedance is infinite. Any source can drive it and there is no loading on the driver stage 2.The gain of an ideal op-amp is infinite, hence the differential input Vd = V1 – V2 is essentially zero for the finite output voltage Vo 3. The output voltage Vo is independent of the current drawn from the output terminals. Thus its output impedance is zero and hence output can drive an infinite number of other circuits
  • 125. Op-amp Characteristics DC Characteristics • Input bias current • Input offset current • Input offset voltage • Thermal drift Ideal Voltage transfer curve AC Characteristics • Slew rate • Frequency response
  • 126. Practical voltage transfer curve 1. If Vd is greater than corresponding to b, the output attains +Vsat 2. If Vd is less than corresponding to a, the output attains –Vsat 3. Thus range a-b is input range for which output varies linearily with the input. But AOL is very high, practically this range is very small Transient Response Rise time When the output of the op-amp is suddenly changing like pulse type, then the rise time of the response depends on the cut-off frequency fH of the op-amp. Such a rise time is called cut-off frequency limited rise time or transient response rise time ( tr ) H r f t 35 . 0 
  • 127. Op-amp Characteristics DC Characteristics Input bias current Input offset current Input offset voltage Thermal drift AC Characteristics Slew rate Frequency response
  • 128. Thermal Drift The op-amp parameters input offset voltage Vios and input offset current Iios are not constants but vary with the factors 1. Temperature 2. Supply Voltage changes 3. Time Thermal Voltage Drift It is defined as the average rate of change of input offset voltage per unit change in temperature. It is also called as input offset voltage drift Input offset voltage drift = T Vios   ∆Vios = change in input offset voltage ∆T = Change in temperature It is expressed in μV/0 c. The drift is not constant and it is not uniform over specified operating temperature range
  • 129. Input bias current drift It is defined as the average rate of change of input bias current per unit change in temperature Thermal drift in input bias current = T Ib   It is measured in nA/oC or pA/oc. These parameters vary randomly with temperature. i.e. they may be positive in one temperature range and negative in another Input Offset current drift It is defined as the average rate of change of input offset current per unit change in temperature Thermal drift in input offset current = T Iios  
  • 130. AC Characteristics Frequency Response • Ideally, an op-amp should have an infinite bandwidth but practically op-amp gain decreases at higher frequencies. Such a gain reduction with respect to frequency is called as roll off. • The plot showing the variations in magnitude and phase angle of the gain due to the change in frequency is called frequency response of the op-amp • When the gain in decibels, phase angle in degrees are plotted against logarithmic scale of frequency, the plot is called Bode Plot The manner in which the gain of the op-amp changes with variation in frequency is known as the magnitude plot. The manner in which the phase shift changes with variation in frequency is known as the phase- angle plot.
  • 131. INTRODUCTION: OPAMP Applications: inverting And Non-inverting Amplifiers, Integrator And Differentiator, Summing Amplifier, Precision Rectifier, Schmitt Trigger And Its Applications. Active Filters: Low Pass, High Pass, Band Pass And Band Stop. Log And Anti Log Amplifiers. UNIT-IV: OP-AMP Applications OUTCOMES:Distinguish various linear and nonlinear applications of OP- AMP. MATRUSRI ENGINEERING COLLEGE
  • 132. CONTENTS: INVERTING AND NON-INVERTING AMPLIFIERS, INTEGRATOR AND DIFFERENTIATOR, SUMMING AMPLIFIER OUTCOMES:design and analyse Distinguish various applications of OP- AMP like Inverting and Non-Inverting Amplifiers, Integrator and differentiator, summing amplifier MODULE-I MATRUSRI ENGINEERING COLLEGE
  • 133. The Differential Amplifier: V1 = Vin1 and V2 = Vin2. Vo = Ad (Vin1- Vin2 ) , where, Ad is the open loop gain. The Inverting Amplifier: V1 = 0 and V2 = Vin Vo = - Ad Vin Open Loop mode:
  • 134. The non-inverting amplifier V1 = +Vin , V2 = 0 Vo = +Ad Vin Closed Loop mode: Inverting Amplifier Configuration
  • 135.
  • 137. Voltage Follower (Unity Gain Buffer) Differential Amplifier:
  • 138.
  • 139. Integrator output of integrator for square and sinusoidal inputs
  • 143. CONTENTS: Precision Rectifier, Schmitt Trigger And Its Applications. Active Filters: Low Pass, High Pass, Band Pass And Band Stop. Log And Anti Log Amplifiers. OUTCOMES:design and analyse Distinguish various applications of OP- AMP like Precision Rectifier, Schmitt Trigger And Its Applications. Active Filters: Low Pass, High Pass, Band Pass And Band Stop. Log And Anti Log Amplifiers. MODULE-II MATRUSRI ENGINEERING COLLEGE
  • 144. modified Half Wave Rectifier Full Wave Rectifier:
  • 145. Op-Amp Comparator Voltage comparator circuit: Schmitt Trigger:
  • 146. Active Filters: The most commonly used filters are: Low pass filters High pass filter Band pass filter Band reject filter. All pass filter
  • 147. First Order Low Pass Filter frequency response
  • 148. First Order High Pass Butterworth filter: frequency response
  • 149. Second Order Low-Pass Butterworth Filter Band Pass Filter
  • 150. Band Stop Filter: Narrow Band Reject Filter or Notch Filter
  • 152. Log Amplifier Basic Log amplifier using transistor Basic Log amplifier Diode
  • 153. Antilog Amplifier Basic Anti Log amplifier using transistor
  • 154. INTRODUCTION: 555 TIMER: FUNCTIONAL DIAGRAM, MONOSTABLE, ASTABLE AND SCHMITT TRIGGER APPLICATIONS. FIXED AND VARIABLE VOLTAGE REGULATORS, PLL AND ITS APPLICATIONS. DATA CONVERTERS: DIGITAL-TO-ANALOG CONVERTERS (DAC): WEIGHTED RESISTOR, INVERTED R-2R LADDER, ANALOG-TO- DIGITAL CONVERTERS (ADC): DUAL SLOPE, SUCCESSIVE APPROXIMATION, FLASH, SPECIFICATIONS. UNIT-V OUTCOMES:Demonstrate the various applications of 555 Timer and analyse the operation of the D/A and A/D converters. MATRUSRI ENGINEERING COLLEGE
  • 155. CONTENTS: 555 TIMER: FUNCTIONAL DIAGRAM, MONOSTABLE, ASTABLE AND SCHMITT TRIGGER APPLICATIONS OUTCOMES: Demonstrate the various applications of 555 Timer MODULE-I MATRUSRI ENGINEERING COLLEGE
  • 156. Introduction to 555 Timer: • One of the most versatile linear integrated circuits is the 555 timer. • The 555 is a monolithic timing circuit that can produce accurate and highly stable time delays or oscillation. • The timer basically operates in one of the two modes: either as monostable (one-shot) multivibrator or as an astable (free running) multivibrator. • The device is available as an 8-pin metal can, an 8-pin mini DIP, or a 14-pin DIP. • The SE555 is designed for the operating temperature range from -55°Cto + 125°C, while the NE555 operates over a temperature range of 0° to +70°C. Features: • It operates on +5 to + 18 V supply voltage in both free-running (astable) and one- shot (monostable) modes. • It has an adjustable duty cycle; timing is from microseconds through hours. • It has a high current output. • It can source or sink 200 mA. • The output can drive TTL and has a temperature stability of 50 parts per million (ppm) per degree Celsius change in temperature, or equivalently 0.005%/°C. • Reliable, easy to use, and low cost.
  • 157. Introduction to 555 Timer: Block Diagram of 555Timer
  • 158. The 555 Timer as A Monostable Multivibrator: • A monostable multivibrator, the duration of the pulse is determined by the RC network connected externally to the 555 timer. • In a stable or stand by state the output of the circuit is approximately zero or at logic-low level. • When an external trigger pulse is applied, the output is forced to go high. • The time the output remains high is determined by the external RC network connected to the timer. • At the end of the timing interval, the output automatically reverts back to its logic-low stable state. • The output stays low until the trigger pulse is again applied. Then the cycle repeats.
  • 159. Monostable Multivibrator Applications 1. Frequency divider 2. Pulse stretcher • Here the output pulse width (timing interval) of the monostable multivibrator is of longer duration than the negative pulse width of the input trigger. • As such, the output pulse width of the monostable multivibrator can be viewed as a stretched version of the narrow input pulse, hence the name pulse stretcher. • The monostable multivibrator can be used as a frequency divider by adjusting the length of the timing cycle tp, with respect to the tine period T of the trigger input signal applied to pin 2. • The frequency-divider application is possible because the monostable multivibrator cannot be triggered during the timing cycle.
  • 160. The 555 As An Astable Multivibrator:
  • 161. Astable Multivibrator Applications: Square-wave oscillator: Free-running ramp generator: • Without reducing RA = 0 , the astable multivibrator can be used to produce a square wave output simply by connecting diode D across resistor RB. • The capacitor C charges through RA and diode D to approximately 2/3 Vcc anddischarges through RB and terminal 7 until the capacitor voltage equals approximately 1/3Vcc
  • 162. Schmitt Trigger: • The input is given to the pin 2 and pin 6 which are tied together. Pins 4 and 8 are connected to supply voltage +Vcc. • The common point of two pins 2 and 6 are externally biased at Vcc/2 through the resistance network R1 and R2.Generally R1=R2 to the gate biasing of Vcc/2. • The upper comparator will trip at 2/3Vccwhile lower comparator at 1/3Vcc. • The bias provided by R1 and R2 is centered within these two thresholds. • Thus when sine wave of sufficient amplitude, greater than Vcc/6 is applied to the circuit as input, it causes the internal flip flop to alternately set and reset. Due to this, the circuit produces the square wave at the output.
  • 163. CONTENTS: FIXED AND VARIABLE VOLTAGE REGULATORS, PLL AND ITS APPLICATIONS. OUTCOMES: Demonstrate the various applications of PLL, voltage regulators. MODULE-II MATRUSRI ENGINEERING COLLEGE
  • 164. Phase-Locked Loops Block Diagram of Phase Locked Loop phase-locked loop, may be assembled by combining a • phase detector • low-pass filter • voltage-controlled oscillator. The frequency of the output wave forms is approximated by
  • 165. Introduction to Voltage Regulators: Block Diagram of voltage regulator
  • 166. Zener Voltage Regulator: • The regulated power supply may use zener diode as the voltage controlling device. • The output voltage is determined by the reverse breakdown voltage of the zener diode. • This is nearly constant for a wide range of currents. • The load voltage can be maintained constant by controlling the current through zener. • The load current range for which regulation is maintained, is the difference between maximum allowable zener current and minimum current required for the zener to operate in breakdown region. Limitation:
  • 167. Features of IC 723: • Input and output short circuit protection provided. • Positive or negative supply operation. • Good line and load regulation. • Low temperature drift and high ripple rejection. • Output voltage can be varied from 2V to 37. • Small in size and hence economic IC Regulators: • 78XX series of regulators. The last two digits of the IC par number denote the output voltage of the device. • These packages, although internally complex, are inexpensive and easy to use. • There are a number of different voltages that can be obtained from the 78XX series 1C; they are 5, 6, 8, 8.5, 10, 12, 15, 18, and 24 V. voltage regulators voltage regulators
  • 168. CONTENTS: DATA CONVERTERS: DIGITAL-TO-ANALOG CONVERTERS (DAC): WEIGHTED RESISTOR, INVERTED R-2R LADDER, ANALOG-TO- DIGITAL CONVERTERS (ADC): DUAL SLOPE, SUCCESSIVE APPROXIMATION, FLASH, SPECIFICATIONS. OUTCOMES: Demonstrate and analyse the operation of the D/A and A/D converters. MODULE-III MATRUSRI ENGINEERING COLLEGE
  • 169. Data Converter Integrated Circuits • The transducer circuit will gives an analog signal. • This signal is transmitted through the LPF circuit to avoid higher components, and then the signal is sampled at twice the frequency of the signal to avoid the overlapping. • The output of the sampling circuit is applied to A/D converter where the samples are converted into binary data i.e. 0’s and 1’s. • Like this the analog data converted into digital data. • The digital data is again reconverted back into analog by doing exact opposite operation of first half of the diagram. • Then the output of the D/A convertor is transmitted through the smoothing filter to avoid the ripples
  • 170. What is a DAC? A digital to analog converter (DAC) converts a digital signal to an analog voltage or current output. Types of DACs • Binary Weighted Resistor • R-2R Ladder Binary Weighted Resistor • Utilizes a summing op-amp circuit. • Weighted resistors are used to distinguish each bit from the most significant to the least significant. • Transistors are used to switch between Vref and ground (bit high or low). - + R 2R 4R 2nR Rf Vout I Vref
  • 171. Voltages V1 through Vn are either Vref if corresponding bit is high or ground if corresponding bit is low V1 is most significant bit Vn is least significant bit              R V R V R V R V R IR V 1 - n n 3 2 1 f f out 2 4 2  Advantages • Simple Construction/Analysis • Fast Conversion Disadvantages • Requires large range of resistors (2000:1 for 12-bit DAC) with necessary high precision for low resistors • Requires low switch resistances in transistors Can be expensive.Therefore, usually limited to 8-bit resolution.
  • 172. R-2R Ladder Vref V2 V1 V3 Vout 2 2 3 2 1 V V R R R V          1 2 2 1 V V  ref 1 2 1 V V  IR V   out            R V b R V b R V b R V b R V 16 8 4 2 ref 0 ref 1 ref 2 ref 3 out i n i i n b V V 2 1 1 ref out     
  • 173. Advantages Only two resistor values (R and 2R) Does not require high precision resistors Disadvantage Lower conversion speed than binary weighted DAC Specifications of DACs •Resolution •Speed •Linearity •Settling Time •Reference Voltages •Errors
  • 174. Different Types Of ADC’s • It provides the function just opposite to that of a DAC. It accepts an analog input voltage Va and produces an output binary word d1, d2, d3….dn. Where d1 is the most significant bit and dn is the least significant bit. • ADCs are broadly classified into two groups according to their conversion techniques  Direct type  Integrating type Direct type ADCs compares a given analog signal with the internally generated equivalent signal. This group includes  Flash (Comparator) type converter  Successive approximation type convertor  Counter type  Servo or Tracking type Integrated type ADCs perform conversion in an indirect manner by first changing the analog input signal to linear function of time or frequency and then to a digital code.
  • 175. Flash (Comparator) Type Converter: • R is a stable reference voltage provided by a precision voltage regulator as part of the converter circuit. • As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state. • The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs.
  • 176. Counter Type A/D Converter • counter is reset to zero count by reset pulse. • After releasing the reset pulse the clock pulses are counted by the binary counter. • These pulses go through the AND gate which is enabled by the voltage comparator high output. • The number of pulses counted increase with time. • The analog output Vd of DAC is compared to the analog input inputVa by the comparator. • If Va>Vd the output of the comparator becomes high and the AND gate is enabled to allow the transmission of the clock pulses to the counter. • When Va<Vd the output of the comparator becomes low and the AND gate is disabled. This stops the counting we can get the digital data.
  • 177. Servo Tracking A/D Converter : • An improved version of counting ADC is the tracking or servo converter. • The circuit consists of an up/down counter with the comparator controlling the direction of the count. • The analog output of the DAC is Vd and is compared with the analog input Va. • If the input Va is greater than the DAC output signal, the output of the comparator goes high and the counter is caused to count up. • The DAC output increases with each incoming clock pulse when it becomes more than Va the counter reverses the direction and counts down.
  • 178. Successive-Approximation ADC: The successive approximation analog to digital converter circuit typically consists of • A sample and hold circuit to acquire the input voltage (Vin). • An analog voltage comparator that compares Vin to the output of the internal DAC and outputs the result of the comparison to the successive approximation register (SAR). • A successive approximation register sub circuit designed to supply an approximate digital code of Vin to the internal DAC. • An internal reference DAC that supplies the comparator with an analog voltage equivalent of the digital code output of the SAR for comparison with Vin.
  • 179. • The successive approximation register is initialized so that the most significant bit (MSB) is equal to a digital 1. • This code is fed into the DAC, which then supplies the analog equivalent of this digital code (Vref/2) into the comparator circuit for comparison with the sampled input voltage. • If this analog voltage exceeds Vin the comparator causes the SAR to reset this bit; otherwise, the bit is left a 1. • Then the next bit is set to 1 and the same test is done, continuing this binary search until every bit in the SAR has been tested. • The resulting code is the digital approximation of the sampled input voltage and is finally output by the DAC at the end of the conversion (EOC).
  • 180. Dual-Slope ADC • An integrating ADC (also dual-slope ADC) applies the unknown input voltage to the input of an integrator and allows the voltage to ramp for a fixed time period (the run-up period). • Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). • The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. • The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. • Converters of this type (or variations on the concept) are used in most digital voltmeters for their linearity and flexibility.
  • 181. Specifications For DAC/ADC • Resolution • Linearity • Glitches (Particularly DAC) • Accuracy • Monotonic • Settling Time • Stability