The document describes the design and simulation of a CMOS fabrication process using TCAD (Technology Computer-Aided Design). It involves dimensioning the design using MOSIS design rules, creating masks, and defining 44 steps for the process in Synopsys TCAD. This includes doping wells, growing oxides, depositing polysilicon, implanting sources and drains, and depositing metals. The process aims to fabricate n-well and p-well CMOS on a silicon substrate using a minimum number of masks. Characterization and optimization of the modeled device can be done using additional TCAD tools.
4. Introduction
• CMOS Design has basically Three Types
• pwell CMOS
• nwell CMOS
• Twin well/ Twin Tub CMOS
Technology CAD is
Numeric simulation of Semiconductor Process and Device
Basic subprogram used in TCAD
i. Sentaurus Structure Editor
ii. Sentaurus Process
iii. Sentaurus Device
iv. Sentaurus Workbench
v. Svisual
.
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6. Problem Statements
• Using TCAD, Design a process sequence to fabricate the following CMOS structure
This Design Involves the
following unit steps
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9. Dimensioning using Mosis Design Rule
6
4
2
4
6
2
1 1
3
3
2
2
2
24
n-mos/ p-mos Design Rule
o Only in Y-direction(horizontal) dimension
o All dimensions are in Lambda
o 1Lambda = 100nm (for this particular
Design, since channel length = 200nm)
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12. Mask Designing
Mask-1: For nwell doping
Mask-2: For pwell doping
42 24
4224
Mask-3: Active area (negative)
Nitride etching
Mask-4: Gate area (negative)
Polysilicon etching
6 12 30 12 6
11 2 40 2 11
Mask-5: Sorce – Drain Region
(negative) Gate-oxide etching
Mask-6: for Titanium etching
(negative)
Mask-7: for contact cut in thick
oxide (negative)
6 5 2 5 30 5 2 5 6
6 4 1214 30 41214 6
7 2 6 2 32 2 6 2 76/23/2014 12itm University, Gurgaon
13. Mask Designing
Mask-8: Aluminum etching 6 3 6 3 30 3 63 6
For a good design steps,
The number of mask
required should be
minimum
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37. Conclusion and future scope
• Taken a substrate first as per our required dimension
and lightly doped with Boron
• nwell and pwell creation
• Channel stop implantation and grown Field Oxide
• Gate Oxide and Polysilicon layer deposition
• LDD implantation
• Spacer formation
• Source – Drain Implantation
• Silicide formation
• Thick Oxide layer deposition for passivation
• Selected etching of Thick oxide and deposition of
Aluminum and patterning
Further characterization of the modeled device can be done using
Sdevice.
Complete optimization of device can only be done after creating a device
file (.des) correcponding to device characterization6/23/2014 37itm University, Gurgaon
39. Refrences
[1] Michael Duane, “The Role of TCAD in Compact Modelling ” , 3320 Scott
Blvd.,MS 1148,Santa Clara,CA.
[2] Sentaurus tool User Guide https://solvnet.synopsys.com..
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