This document discusses biasing of bipolar junction transistors (BJTs) including different biasing configurations such as fixed bias, emitter bias, voltage divider bias, and collector feedback. It explains how setting the operating or quiescent point on the transistor characteristics curve is important for proper amplification. The concepts of cutoff, saturation and active regions are covered. Equations for analyzing common emitter, common base and common collector configurations are provided. An example calculation of the collector current and voltage at the operating point is shown. Finally, bias stability and factors affecting it are briefly discussed.
1. BJT Biasing & re model
Unit II :
Bipolar Junction Transistor: Transistor Construction, Operation, Amplification action.
Common Base, Common Emitter, Common Collector Configuration DC Biasing BJTs:
Operating Point, Fixed-Bias, Emitter Bias, Voltage-Divider Bias Configuration. Collector
Feedback, Emitter-Follower Configuration. Bias Stabilization. CE, CB, CC amplifiers and AC
analysis of single stage CE amplifier (re Model ). Field Effect Transistor: Construction and
Characteristic of JFETs. AC analysis of CS amplifier, MOSFET (Depletion and
Enhancement)Type, Transfer Characteristic
11/10/2017 1
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
2. BJT: DC Biasing BJTs: Operating Point
11/10/2017 2
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
Transistor operates in three regions. Junctions biasing in different
regions of operation as below
• Active (Linear)-region :
▪ BE junction forward-biased
▪ CB junction reverse-biased
• Cutoff-region : Both BE & CB junction reverse-biased
• Saturation-region : Both BE & CB junction forward-biased
Biasing: dc biasing establish a fixed level of output current and
voltage that sets a operating or quiescent point (Q-point) on the
characteristics. Quiescent means quiet, still or inactive.
If not properly biased a transistor amplifier may go into cutoff /
saturation when ac input is applied
3. BJT: DC Biasing BJTs: Operating Point
11/10/2017 3
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
Point B: allows variation of output,
but limited by VCE=0 V & IC=0 mA
Point C: allows output variation in
response to, +ve/-ve swing of input
Point D: D is near maximum power
level. Output swing in the +ve
direction is limited
Point E & F: device in cut-off region
& saturation region respectively
VCE(V)
IB =0 A
10 A
20 A
40 A
50 A
IC (mA) 60 A
Saturationregion
VCE Saturation
0 5 10 15 20
6
5
4
3
2
1
30 A
Cutoff region
VCE max
Pmax
A
B
C
D
E
F
Operating point is fixed point on output characteristics (by VCE & IC)
Point A: the device is fully off ie. VCE=0 V & IC=0 mA (no bias)
Point C is suitable Q point for amplification
4. BJT: DC Biasing BJTs: Operating Point
•increase in ac power (amplification) occurs due to transfer of energy
from dc supplies.
•So analysis/design of a transistor amplifier requires knowing both the
dc and the ac response of the system.
•To find Q point, output voltage & output current due to dc biasing has
to be known. (for CE configuration, IC , VCE and IB )
•To do dc bias analysis first remove ac input/output and open circuit
blocking/ bypass capacitor.
•Each configuration is analysed by recurring use of following equations
11/10/2017 4
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
BC
CBE
BE
II
III
V
and
)1(
7.0
5. BJT: Fixed-Bias
11/10/2017 5
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
Fixed bias DC equivalent of Fixed bias
B
BECC
C
R
VV
I
E
C
B
VCC
IC
Q
VBE
RCRB
+
-
IB
Input ac
signal
Output
ac signal
C1
C2
VCE
E
C
B
VCC
IC
Q
VBE
RCRB
+
-
IB
VCC
VCE
VVII BEBC 7.0and
CCCCCE RIVV
• VCC bias collector and base through RC and
RB respectively while emitter is grounded.
• Fixed bias is common in switching circuits.
• Disadvantage is its dependency ( varies
with temperature)
B
BECC
B
R
VV
I
6. BJT: Emitter Bias
11/10/2017 6
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
• Emitter bias provides improved bias stability with
respect to ( or temperature).
• It uses a emitter resistance RE. which acts as a feedback
B
EBBECC
B
EBEEE
B
EBECC
B
R
RIVV
I
RIRIV
R
VVV
I
)1(
so
)1(as,
,as
7.0and
CE
EECCCCECCCCCE
BEBC
II
RIRIVVRIVV
VVII
EB
BECC
C
)R(βR
VVβ
I
1
ECCCCCE RRIVV
E
C
B
VCC
IC
Q
VBE
RCRB
+
-
IB
Input ac
signal
Output
ac signal
C1
C2
VCE
IE
RE
Emitter bias
EB
BECC
B
)R(βR
VV
I
1
7. BJT: Voltage-Divider Bias Configuration
11/10/2017 7
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
getwesolvingandVngsubstituti
1again
where,
B
21
21
121
21
EBBEEEBEB
BCCBBCC
B
RIVRIVV
RR
RR
R
R
V
R
V
R
V
R
VV
III
ECCCCCE RRIVV
E
BECC
B
RR
V
R
R
V
I
1
1
CEEECCCCCE
BEBC
IIRIRIVV
VVII
as,again
7.0and
Voltage divider bias
E
C
B
VCC
IC
Q
VBE
RCR1
+
-
IBInput ac
signal
Output
ac signal
C1
C2
VCE
IE
RE
R2
I1
I2
• Voltage divider bias provides excellent bias stability with
respect to or temperature changes
• Base bias is provided using a voltage divider circuit while
feedback resistance RE is used
E
BECC
C
RR
V
R
R
V
I
1
1
8. BJT: Collector Feedback
11/10/2017 8
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
Collector feedback bias
E
C
B
VCC
IC
Q
VBE
RC
RF
+
-
IBInput ac
signal
Output
ac signal
C1
C2
VCE
IE
RE
VVII
R
RRI
R
VV
I
R
RIVRIV
I
BEBC
F
ECC
F
BECC
B
F
EEBECECC
B
7.0and
ECCCCCE RRIVV
ECF
BECC
C
RRR
VV
I
CEEECCCCCE IIRIRIVV as,again
• Maintain relative bias stability with respect to or temperature changes
• base resistor RB is connected to the collector rather than to VCC
ECF
BECC
B
RRR
VV
I
9. BJT: Emitter-Follower Configuration
11/10/2017 9
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
E
C
B
-VEE
Q
VBE
RB
+
-
IBInput ac
signal
Output
ac signal
C1
C2
VCE
IE
RE
B
EBBEEE
B
B
EEBEEE
B
R
RIVV
I
R
RIVV
I
1
EEEECE RIVV
EB
BEEE
B
RR
VV
I
1
• Collector is grounded, base is connected to collector through RB and emitter is baised
• Biasing stability similar to emitter bias
EB
BEEE
E
RR
VV
I
1
1
10. BJT: Common base Configuration bias
11/10/2017 10
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
E
BEEE
E
R
VV
I
CCCCCB RIVV
CE
EEEECCCCECCE
II
VRIRIVVVV
as
RE
E C
B
VEE VCC
IE IC
IB
Q
VBE VCB
Output
ac signal
C2
Input ac
signal
C1
RC
VCE
ECCEECCCE RRIVVV
E
BEEE
C
R
VV
I
11. BJT: Biasing Example
11/10/2017 11
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
For the circuit in figure, Find out ICQ and VCEQ
E
C
B
20 V
I
C
=90
20 K
IBac
i/p
ac
o/p
10 F
5 K
2 K
1 K
10 F
20 F
E
C
B
VCC =20 V
IC
=90
20 K
IB
5 K
2 K
1 K
K
x
RR
RR
R 4
520
520
21
21
Vx
RRIVV ECCCCCEQ
61.10313.320
mAII BCQ 13.3
mAmAA
xx
x
RR
V
R
R
xV
I
E
BECC
E 0347.0
95
3.3
101914
7.0
20
4
20
1 3
1
12. BJT: biasing summary
11/10/2017 12
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
B
BECC
B
R
VV
I
CCCCCE RIVV
EB
BECC
B
)R(βR
VV
I
1
ECCCCCE RRIVV ECCCCCE RRIVV
E
BECC
B
RR
V
R
R
V
I
1
1
13. BJT: biasing summary
11/10/2017 13
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
ECF
BECC
B
RRR
VV
I
ECCCCCE RRIVV
EB
BEEE
B
RR
VV
I
1
EEEECE RIVV
E
BEEE
E
R
VV
I
CCCCCB RIVV
ECCEECCCE RRIVVV
14. BJT: Bias Stabilization.
Bias stability is a measure of the sensitivity of network to parameter
variations. In BJT amplifier circuits, collector current IC is sensitive to
each of the following parameters:
• : increases with increase in temperature
• VBE: decreases about 2.5 mV /°C with increase in temperature
• ICO : doubles in value for every 10°C increase in temperature
Any or all factors can cause the designed Q-point to drift
Stability factor S is defined for each parameter affecting bias stability
11/10/2017 14
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
CO
C
CO
I
I
IS
)(
BE
C
BE
V
I
VS
)(
CI
S )(
)()()(currentcollectorinchangeTotal SVVSIISI BEBECOCOC
15. BJT: bias stability summary
11/10/2017 15
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
Fixed bias Emitter bias Voltage divider bias Collector feedback bias
)( COIS
E
B
E
B
CO
R
R
R
R
IS
1
)(
E
E
CO
R
R
R
R
IS
1
)(
C
F
C
F
CO
R
R
R
R
IS
1
)(
1
1
)(
CI
S
E
B
E
B
C
R
R
R
R
I
S
21
1 1
)(
E
E
C
R
R
R
R
I
S
21
1 1
)(
CF
CFC
RR
RRI
S
21
1
)(
C
F
C
BE
R
R
R
VS
)(
E
E
BE
R
R
R
VS
)(
B
BE
R
VS
)(
E
B
E
BE
R
R
R
VS
)(
The ratio RB/RE or R /RE or RF /RC should be small for better bias stability
16. BJT: Transistor modelling
The key to small-signal analysis is use of equivalent circuits (models)
A model is a equivalent circuit, that best approximates ac behaviour
of the transistor
There are two models commonly used in small signal AC analysis of a
transistor: re model Hybrid equivalent model
11/10/2017 16
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
SystemZi ZO
Ii
IO+
Vi
-
+
VO
-
To make ac equivalent model
• replace dc supplies by zero (short circuit)
• Replace Coupling and bypass capacitor
by short circuit
• Remove elements bypassed by short
circuit
• define the parameters Zi, ZO, Ii, and IO
17. BJT: re Model for CE
11/10/2017 17
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
E
IE
IC
IB
VBE
C
B
E
IE
IC
IB
IB
+
VBE
-
C
B
+
VCE
-
CE configuration CE Equivalent circuit
B
C
i
O
i
e
L
eB
LB
ii
LC
i
O
V
O
CQA
CQ
A
C
CE
OO
E
BE
e
e
E
BE
B
BE
i
BCOBi
I
I
I
I
A
r
R
rI
RI
ZI
RI
V
V
A
r
IV
I
V
I
V
rZ
I
V
r
r
I
V
I
V
Z
IIIII
gainCurrent
gainVoltage
regionactiveincurveoutputofslopeis/1
currentcollectorpointQage,Early volt
diode)ofresistance(forwardas
1
and,
Ii=IB
IO=IC+
Vi
-
+
VO
-
B
E
C
E
re rO
re model for CE configuration including rO
IB
RL
18. BJT: re Model for CB
11/10/2017 18
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
re model for CB configuration
B
IE
ICIE
IE
-
VBE
+
CE
+
VCB
-
CB configuration CB Equivalent circuit
1gainCurrent
gainVoltage
highor very
regionactiveincurveoutputofslopeis/1
and,
E
C
i
O
i
e
L
eE
LC
i
O
V
O
O
C
CB
OO
e
E
BE
i
ECOEi
I
I
I
I
A
r
R
rI
RI
V
V
A
r
r
I
V
rZ
r
I
V
Z
IIIII
EIE
IC
VBE
C
B
Ii=-IE
IO=IC
+
Vi
-
+
VO
-
E
B
C
B
re rOIE RL
19. BJT: re Model for CC
11/10/2017 19
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
B
E
i
O
i
eL
L
eLB
LE
i
O
V
O
CQ
A
C
CE
E
E
OO
E
BE
e
eL
E
BEE
B
BEE
B
B
i
BEOBi
I
I
I
I
A
rR
R
rRI
RI
V
V
A
r
I
V
I
V
I
V
rZ
I
V
r
rR
I
VV
I
VV
I
V
Z
IIIII
gainCurrent
gainVoltage
regionactiveincurveoutputofslopeis/1
diode)ofresistance(forwardas
and,
CC configuration
C
E
B
IC
IE
IB
VBE
CC configuration
E
C
B
IC
IEIB
VBE
RL
Ii=IB
IO=-IE+
Vi
-
+
VO
-
B
C
E
(RL+re) rO
re model for CC configuration including rO
IB
RL
RL
20. BJT: ac modelling Example
11/10/2017 20
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
For the circuit in figure, Find out re , Zi , ZO , AV , Ai
E
C
B
20 V
IC
=90
20 K
IBac
i/p
ac
o/p
10 F
5 K
2 K
1 K
10 F
20 F
E
C
B
IC
=90
20 K
IBac i/p
ac o/p
5 K
2 K
re model for voltage divider CE configuration including rO
IB
IO=IC
+
Vi
-
+
VO
-
B
E
C
re rO
IB
RCR2R1
Ii
21. BJT: ac modelling Example
11/10/2017 21
REC 101 Unit II by Dr Naim R Kidwai,
Professor & Dean, JIT Jahangirabad
re computation
23.8
16.3
26
16.3
95
3.300
101914
7.0
20
4
20
91
1
1
4
520
520
3
1
21
21
e
E
T
e
E
BECC
E
r
mA
mV
I
V
r
mAmA
A
xx
x
x
RR
V
R
R
xV
I
K
x
RR
RR
R
Zi computation
624
7.7404000
7.7404000x
rR
I
V
Z e
i
i
i
ZO computation (assume ro=)
2 KrR
I
V
Z OC
O
O
O
AV computation
243
23.8
2000
e
C
eB
CC
i
O
V
r
R
rI
RI
V
V
A
Ai computation
82.75
2000
624
243
x
Z
Z
A
Z
V
Z
V
I
I
A
O
i
V
i
i
O
O
i
O
i