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UNIVERSAL PROPERTY.pptx

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UNIVERSAL PROPERTY.pptx

  1. 1. UNIVERSAL PROPERTY LOGIC GATES
  2. 2. UNIVERSAL GATE • A universal gate is a logic gate which can implement any Boolean function without the need to use any other type of logic gate. The NOR gate and NAND gate are universal gates. This means that you can create any logical Boolean expression using only NOR gates or only NAND gates. • In practice, this is advantageous since NOR and NAND gates are economical and easier to fabricate than other logic gates. So much so that an AND gate is typically implemented as a NAND gate followed by an inverter (not the other way around)! Similarly, an OR gate is typically realised as a NOR gate followed by an inverter.
  3. 3. NAND Gate As NOT Gate • The below diagram is of a two-input NAND gate. The first part is an AND gate and the second part is a dot after it represents a NOT gate. • During the operation of the NAND gate, the inputs are first going through AND gate and after that, the output gets reversed, and we get the final output. Now we will look at the truth table of NAND gate. • We will consider the truth table of the above NAND gate i.e. a two- input NAND gate. The two inputs are A and B.
  4. 4. Now we will see how this gate can be used to make other gates. DESIRED GATE NAND CONSTRUCTION
  5. 5. NAND GATE AS AND GATE • An AND gate is made by following a NAND gate with NOT gate as shown below. This is given a NOT NAND i.e, AND DESIRED GATE NAND CONSTRUCTION
  6. 6. NAND GATE AS OR GATE • The truth of nand gate is examined , it can be seen that if any of the inputs are 0 the output is 1. however to be an OR gate , if any input is 1, the output should be 1. therefore, if the inputs are inverted, any high input will trigger a high output. DESIRED GATE NAND CONSTRUCTION
  7. 7. NAND AS NOR GATE • A NOR Gate is simply an OR gate with an converted input. DESIRED GATE NAND CONSTRUCTION
  8. 8. NAND AS X-OR GATE • An XOR gate is made by connecting four NAND gates as shown below. This construction entails a propagation delay three times that of a single NAND gate. , noting from de Morgan's Law that a NAND gate is an inverted-input OR gate. This construction uses five gates instead of four. • Boolean Expression Y = A.B' + 'A.B = (A ⊕ B) • "If inputs having an odd number of ones, then Y is true" DESIRED GATE NAND CONSTRUCTION
  9. 9. NAND AS X-NOR GATE • NAND gate operation is same as that of AND gate followed by an inverter. That's why the NAND gate symbol is represented like that. Ex-NOR GATE - ​ The Exclusive-NOR Gate, also written as “Ex-NOR” or “XNOR”, function is achieved by combining standard gates together to form more complex gate functions. DESIRED GATE NAND CONSTRUCTION
  10. 10. UNIVERSAL PROPERTY OF NOR GATE NOR AS NOT GATE • As a NOR gate is equivalent to an OR gate leading to NOT gate, joining the inputs makes the output of the "OR" part of the NOR gate the same as the input, eliminating it from consideration and leaving only the NOT part. Desired NOT Gate. NOR Construction. Q = NOT( A ) = A NOR A. DESIRED GATE NOR CONSTRUCTION
  11. 11. NOR GATE AS OR GATE • The OR gate is simply a NOR Gate followed by NOT gate
  12. 12. DEFN.. • The combinational logic circuits are the circuits that contain different types of logic gates. Simply, a circuit in which different types of logic gates are combined is known as a combinational logic circuit. • The output of the combinational circuit is determined from the present combination of inputs, regardless of the previous input. The input variables, logic gates, and output variables are the basic components of the combinational logic circuit. There are different types of combinational logic circuits, such as Adder, Subtractor, Decoder, Encoder, Multiplexer, and De-multiplexer.
  13. 13. There are the following characteristics of the combinational logic circuit: At any instant of time, the output of the combinational circuits depends only on the present input terminals. The combinational circuit doesn't have any backup or previous memory. The present state of the circuit is not affected by the previous state of the input. The n number of inputs and m number of outputs are possible in combinational logic circuits. The 'n' input variable comes from the external source while the 'm' output variable goes to the external destination. In many applications, the source or destinations are storage registers.
  14. 14. COMBINATIONAL CIRCUITS • HALF ADDER The half adder is a basic building block having two inputs and two outputs. The adder is used to perform OR operation of two single bit binary numbers. The carry and sum are two output states of the half adder. • Full Adder The half adder is used to add only two numbers. To overcome this problem, the full adder was developed. The full adder is used to add three 1-bit binary numbers A, B, and carry C. The full adder has three input states and two output states i.e., sum and carry.
  15. 15. COMBINATIONAL CIRCUITS • Half Subtractors The half subtractor is also a building block of subtracting two binary numbers. It has two inputs and two outputs. This circuit is used to subtract two single bit binary numbers A and B. The 'diff' and 'borrow' are the two output state of the half adder. • Full Subtractors The Half Subtractor is used to subtract only two numbers. To overcome this problem, full subtractor was designed. The full subtractor is used to subtract three 1-bit numbers A, B, and C, which are minuend, subtrahend, and borrow, respectively. The full subtractor has three input states and two output states i.e., diff and borrow.
  16. 16. COMBINATIONAL CIRCUITS • Multiplexers The multiplexer is a combinational circuit that has n-data inputs and a single output. It is also known as the data selector which selects one input from the inputs and routes it to the output. With the help of the selected inputs, one input line from the n-input lines is selected. The enable input is denoted by E, which is used in cascade. • De-multiplexers A De-multiplexer performs the reverse operation of a multiplexer. The de- multiplexer has only one input, which is distributed over several outputs. One output line is selected at a time by selecting lines. The input is transmitted to the selected output line.
  17. 17. COMBINATIONAL CIRCUITS • Decoder • A decoder is a combinational circuit having n inputs and to a maximum of m = 2n outputs. The decoder is the same as the de-multiplexer. The only difference between de-multiplexer and decoder is that in the decoder, there is no data input. The decoder performs an operation that is completely opposite of an encoder. • Encoder • The encoder is used to perform the reverse operation of the decoder. An encoder having n number of inputs and m number of outputs is used to produce m-bit binary code which is related to the digital input number. The encoder takes the digital word and converts it into another digital word.
  18. 18. HALF-ADDER • The Half-Adder is a basic building block of adding two numbers as two inputs and produce out two outputs. The adder is used to perform OR operation of two single bit binary numbers. The augent and addent bits are two input states, and 'carry' and 'sum 'are two output states of the half adder
  19. 19. In the above table, 'A' and' B' are the input states, and 'sum' and 'carry' are the output states. The carry output is 0 in case where both the inputs are not 1. The least significant bit of the sum is defined by the 'sum' bit. The SOP form of the sum and carry are as follows: Sum = x'y+xy' Carry = xy
  20. 20. Sum = x'y+xy' Carry = xy
  21. 21. FULL ADDER • The half adder is used to add only two numbers. To overcome this problem, the full adder was developed. The full adder is used to add three 1-bit binary numbers A, B, and carry C. The full adder has three input states and two output states i.e., sum and carry.
  22. 22. In the above table, 'A' and' B' are the input variables. These variables represent the two significant bits which are going to be added 'Cin' is the third input which represents the carry. From the previous lower significant position, the carry bit is fetched. The 'Sum' and 'Carry' are the output variables that define the output values. The eight rows under the input variable designate all possible combinations of 0 and 1 that can occur in these variables. Sum = x' y' z+x' yz+xy' z'+xyz Carry = xy+xz+yz
  23. 23. Sum = x' y' z+x' yz+xy' z'+xyz Carry = xy+xz+yz
  24. 24. THANK YOU

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