Modern Operating System

1. Multiple Processor System Prepared by: Arth B. Ramada Cristy R. Peralta Free Powerpoint Templates

8. UMA Bus-Based SMP Architecture

9. UMA Multiprocessors using Crossbar Switches

10. UMA Multiprocessors using Multistage Switching Networks

16. Module  It tell which memory to use.

17. Address  It specifies an address within a module

18. Opcode  Gives the operation, READ or WRITE

20. MULTIPROCESSORS: NUMA Multiprocessors NUMA Machines 3 Key Characteristics: There is a single address visible to all CPUs Access to remote memory is via LOAD and STORE instructions Access to REMOTE MEMORY is slower than access to LOCAL MEMORY NC-NUMA (No Caching) - access time to remote memory is not hidden CC-NUMA (Cache-Coherent) – caches are present.

21. MULTIPROCESSORS: NUMA Multiprocessors Directory-Based Multiprocessor - It Maintain a database telling where each cache is and what its status is.

22. MULTIPROCESSORS: Multiprocessor Operating System Types Each CPU Has Its Own Operation System The memory divide into as many partition as there are CPUs and give each CPU its own private memory and its own private copy of Operating System

23. MULTIPROCESSORS: Multiprocessor Operating System Types Master-Slave Multiprocessors There is one copy of the operating system and its table are present to CPU1. All system calls are redirected to CPU1

24. MULTIPROCESSORS: Multiprocessor Operating System Types Symmetric Multiprocessors (SMP) There is one copy of the OS in memory but any CPU can run it. If the two CPU simultaneously picking the same process to run the same memory page. It associate a MUTEX(Lock) with OS.

25. MULTIPROCESSORS: Multiprocessor Synchronization TSL (Test and Set Lock) Instruction – TSL instruction must first lock the bus, preventing other CPUs from accessing, then both memory accesses, then unlock the bus

26. MULTIPROCESSORS: Multiprocessor Synchronization Use of Multiple Locks to avoid cache trashing

27. MULTIPROCESSORS: Multiprocessor Scheduling TIME SHARING The simplest scheduling algorithm for dealing unrelated process is to have a single system wide data structure for ready process

28. MULTIPROCESSORS: Multiprocessor Scheduling Space Sharing This approach used when the processes are related to one another. Scheduling multiple threads at the same time across multiple CPUs

29. MULTIPROCESSORS: Multiprocessor Scheduling Communication between two threads belonging to Process A that are running out of phase.

30. MULTIPROCESSORS: Multiprocessor Scheduling Gang Scheduling Group of related threads are scheduled as a unit (gang) All member of a gang run simultaneously on different time shared CPU All gang members start and end their time slices together.

33. MULTICOMPUTERS: MULTICOMPUTER HARDWARE Packet – a message that is broken up (either by a user software or a network face. Store-and-forward packet switching

34. MULTICOMPUTERS: MULTICOMPUTER HARDWARE Network Interface Board in a multicomputer

35. MULTICOMPUTERS: Low-Level Communication Software Node to Network Communication Use send & receive rings to coordinates main CPU with on-board CPU When a sender has new packet to send, it first checks to see if there is an available slot in the send ring. If not, it must wait, to prevent overrun.

36. MULTICOMPUTERS: Blocking versus Nonblocking Calls Blocking Calls – when a process call sends, it specifies a destination and a buffer to send that destination. While the message has been completely, the sending process is blocked. NonBlocking Calls – If send is nonblocking, it returns control immediately, before the message is sent.

37. MULTICOMPUTERS: Remote Procedure Call The program must be bound with a small library procedure called the CLIENT STUB (represent the client procedure) The server is bound with a procedure called SERVER STUB.

38. MULTICOMPUTERS: Distributed Shared Memory Various layers where shared memory: (a) – The Hardware (b) – The Operating System (c) – User-level Software

39. MULTICOMPUTERS: Distributed Shared Memory Replication (a) Pages distributed on 4 machines (b) CPU 0 reads page 10 (c) CPU 1 reads page 10