1. Team members:-
Anadi Vats (100101030)
Kumar Siddarth Bansal(100101114)
Mansi Mahajan(100101126)
Jishnu V. Nair(100101100)

2. M
E
M
O
R
Y
H
I
E
R
A
R
C
H
y

3. T
 Main memory:  Associative Y
Refers to physical memory that memory:
P

is internal to the computer.
 Memory unit accessed by
 The computer can manipulate
only data that is in main
content is called associative
memory or content
E
memory.
amount of main memory on a
addressable memory. S
  This memory is accessed
computer is crucial. simultaneously and in parallel
computers often have too little on the basis of data content
O

main memory rather than by specific address
or location.
F
 Auxiliary memory:
 Devices that provide backup  Cache memory:
storage are called auxiliary
memory. M
 Most common devices used are
magnetic disks and magnetic
 Cache memory is random
access memory (RAM) that a
E
tapes computer microprocessor can
access more quickly than it
M
Bits are recorded by write
O

heads and read by read head can access regular RAM.
R
Y

4. A VIRTUAL MEMORY V
SYSTEM PROVIDES A I
MECHNANISM FOR R
TRANSLATING
PROGRAM- T
GENERATED U
ADDRESSES INTO A
CORRECT MAIN
MEMORY. L
 THE TRANSLATION
OR MAPPING IS M
HANDLED E
AUTOMATICALLY BY
THE HARDWARE BY M
MEANS OF A O
MAPPING TABLE. R
Y

5.  AN ADDRESS USED
BY A PROGRAMMER
WILL BE CALLED A A
VIRTUAL M
ADDRESS, AND THE D
SET OF SUCH E
ADDRESSES IS D
CALLED ADDRESS M
SPACE. R O
E
 AN ADDRESS IN MAIN R
MEMORY IS CALLED A S
LOCATION OR Y
PHYSICAL S
ADDRESS,AND THE
SET OF SUCH &
ADDRESSES IS
CALLED THE S
MEMORY SPACE.
P
A

6. M
E
M
O
R
Y
T
A
VIRTUAL MEMORY MAIN B
ADDRESS MAPPING
MAIN MEMORY MEMORY L
REGISTER TABLE
(20 bits) ADDRESS E
REGISTER
(15 bits)
F
O
MEMORY TABLE
R
MAIN MEMORY
BUFFER REGISTER
BUFFER REGISTER
M
A
P
P
I
N
G

7. A U
D
 THE ADDRESS SPACE AND THE MEMORY SPACE S
D I
ARE DIVIDED INTO GROUPS OF FIXED SIZE.
R N
 THE PHYSICAL MEMORY IS BROKEN DOWN E G
INTO GROUPS OF EQUAL SIZE CALLED S
BLOCKS. S p
 THE ADDRESS SPACE IS BROKEN INTO GROUPS A
OF EQUAL SIZE CALLED PAGES. M G
A E
 THE PAGE AND BLOCK ARE SPLIT INTO
P S
GROUPS OF 1K WORDS. P
I
N
G

8. Page no. Line number
1 0 1 0 1 0 1 0 1 0 0 1 1 Virtual address
Table Presence Main memory
address bit
000 0 Block 0
001 11 1 01 0101010011 Block 1
010 00 1 Block2
011 0 Main memory Block3
100 0 Address register
101 01 1
110 10 1 MBR
111 0
01 1
Memory page table

9.  THE CONTENT OF THE WORD IN THE MEMORY PAGE TABLE AT THE PAGE
NUMBER ADDRESS IS READ OUT INTO THE MEMORY TABLE BUFFER
REGISTER.
 IF THE PRESENCE BIT IS 1, THE BLOCK NUMBER THUS READ IS TRANSFERD
TO THE 2 HIGH ORDER BITS OF THE MAIN MEMORY ADDRESS REGISTER.
 THE LINE NUMBER FROM THE VIRTUAL ADDRESS IS TRANSFERRED INTO
THE 10 LOW ORDER BITS OF THE MEMORY ADDRESS REGISTER.
 THE READ SIGNAL TO MAIN MEMORY TRANSFER THE CONTENT OF THE
WORD TO THE MAIN MEMORY BUFFER REGISTER READY TO BE USED BY
CPU.
 IF THE PRESENCE BIT IS ZERO, IT SIGNIFIES THAT THE CONTENT OF THE
WORD REFERNCED BY THE VIRTUAL ADDRESS DOES NOT RESIDE IN MAIN
MEMORY.

10. P
A technique used by virtual memory
operating system to ensure that the data you A
need is available as quickly as possible.
 The operating system copies a page into the
memory whenever a program requires a
G
particular page from our storage device.
 It copies another page back into the disk in
I
place of the page just removed.
N
G

11. P
A
 Page tables are used to translate the virtual G
addresses seen by the application into E
physical addresses seen by the hardware to
process instructions.
 Such hardware that handle this specific T
translation are often referred to as the
memory management unit.
A
B
L
E
S

12. P A
A L
 Goal: G G
Want lowest page-fault rate E O
R
Evaluate algorithm by running it on a R I
particular string of memory references E T
(reference string) and computing the P H
number of page faults on that string L
M
A
 In all our examples, the reference string C
is E
M
1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5 E
N
T

13. F
I
F
O

14.  LRU replacement associates with each page
L
R
the time of that page’s last use
U
 When a page must be replaced, LRU chooses
the page that has not been used for the
longest period of time

15. L
R
U

16.  The major problem is how to implement L
LRU replacement:
1. Counter: whenever a reference to a
page is made, the content of the clock R
register are copied to the time-of-use
filed in the page table entry for the
page. We replace the page with the
U
smallest time value
2. Stack: Whenever a page is referenced,
it is removed from the stack and put on
the top. In this way, the most recently
used page is always at the top of the
stack

17. T
H
 When paging is used, a problem called R
thrashing can occur, in which the computer
spends an unsuitable amount of time A
swapping pages to and fro from the backing
store hence slowing down the useful work. S
H
I
N
G