Arm Neoverse Roadmap, Cloud Native ecosystem

1. © 2020 Arm Limited
October 22, 2020
Scaling the Next-Gen
Infrastructure with
Arm Neoverse Solutions
Brian Jeff
Infrastructure Line of Business

2. 2 © 2020 Arm Limited
October 2018: Announcing the Arm Neoverse Roadmap

3. 3 © 2020 Arm Limited
February 2019: Neoverse N1 Exceeds Performance Targets
Exceeded
+30% target
2X

4. 4 © 2020 Arm Limited
Hyperscale & Cloud Computing HPC
5G Infrastructure Edge

5. 5 © 2020 Arm Limited
Enabling a Frictionless Cloud-Native Developer Experience
CI/CD
Drone.io
Actions
Language & Library
Container &
Virtualization
Operating System
Workloads
Networking

6. 6 © 2020 Arm Limited
Neoverse N1 Outperforms Across Diverse Workloads
Performance per vCPU of M6g (Graviton2) versus M5
M5 = 100%
SPECrate®
2017
floating
point1,6
(est.)
124%
SPECrate®
2017
Integer1,6
(est.)
144%
General
Purpose
x264
Media
Encoding1
126%
Multi-
media
Machine
Learning:
On-CPU
Inference1
128%
EDA Simulation
on Cadence
Xcelium1
154%
Technical
Nginx
Reverse
Proxy4
154%
Mem-
cached1
143%
SPEC
jvm20081,7
(est.)
143%
Content
Access
128%
Inter
Systems
IRIS for
Health2
130%
Presto
(Java)
TPC-H
SQL3
165%
KeyDB (multi-
thread Redis)5
Database
Performance/vCPU
Don’t take our word for it
(3rd party data sources):
1. AWS re:Invent 2019: Deep dive
on Arm-based EC2 instances
powered by AWS Graviton
2. InterSystemsIRIS on Arm-Based
AWS Graviton2 Processors
3. High Performance SQL: AWS
Graviton2 Benchmarks with
Presto and Arm Treasure Data
CDP
4. Optimize Your NGINIX Plus
Deployment with Arm-Based
Amazon EC2 M6g Instances
5. Benchmarking the AWS
Graviton2 with KeyDB – M6g up
to 65% faster
6. All SPEC scores estimates, compiledwith GCC9 -O3 -march=native,run on largest singlesocket size for each instance type tested.
7. All SPEC scores estimates, run with OpenJDK11 and skipping compiler*and startup.* tests. Tests run on largest single-socketinstancesize for each instancetype tested.

7. 7 © 2020 Arm Limited
Arm Neoverse Platform PPA Design Principles
N-Series: Scale Out
Performance
V-Series: Maximum
Performance
E-Series: Efficient Throughput
Performance > Power & Area
WIDER / DEEPER uArch
Bigger:
• Buffers
• Caches
• Windows
• Queues
More:
• Performance
• Bandwidth
• Area
• Power
Performance = Power = Area
BALANCED uArch
Optimized:
• Perf/Power
• Perf/Area
More:
• Cores per TDP/Area
• Scalability
• Balance
Integer / AGU
Floating-point
• Vector / Scalar
Cache Memory
• LD / ST
Integer / AGU
Floating-point
• Vector / Scalar
Cache Memory
• LD / ST
Power & Area > Performance
EFFICIENT uArch
Optimized:
• Power
• Area
More:
• Efficiency
• Throughput
• Thread Count

8. 8 © 2020 Arm Limited
7nm
PCIe Gen4, DDR4, HBM2
CCIX 1.0
Platform
features
IP Date Production
5nm
PCIe Gen5, DDR5, HBM3
CCIX 2.0, CXL 2.0
2021
+30% infra WL perf.
ML/Vector uplift
Greater core density
Poseidon
Generation
Platforms
5/3nm
PCIe Gen5/6, DDR5, HBM3
CCIX next, CXL next
2022+
In planning
A72+60% ST perf. uplift
N1
Platform
N1+50% ST perf. uplift
SVE 2x256b, bFloat16
V1 Platform
(Zeus)
7/5nm
PCIe Gen5, DDR5, HBM2e
CCIX 1.1
Now
N1+40% ST perf. uplift
SVE 2x128b, bFloat16
N2 Platform
(Perseus)
E1
Platform
A53+2.7x throughput
Arm Neoverse Platform Roadmap
V-series
Max MLST Perf
N-series
5GScale outPerf/W
E-series
Data efficiency

9. 9 © 2020 Arm Limited
Enabling next-generation use cases for Neoverse V1 and N2 platforms
CCIX and CXL Leadership for the Intelligent Future
Coherent
In-package
Chiplets
Coherent
Multi-Socket
Tightly Coupled
Heterogeneous
Compute
Coherent
Accelerator
GPU
NPU
CCIX CXL
Memory Expansion
& Pooling

10. 10 © 2020 Arm Limited
Arm Neoverse V1 Platform
Scalable Vector Extensions (SVE): wide vector performance for HPC and ML
High performance Architected to scale Anticipated by customers
√
√
128-bit
256-bit
512-bit
SVE vector width:
SVE supports up to 2048-bit vector width
1 1
1.82
0.62
Speedup Instruction Count (lower
is better)
1 1
1.83
0.52
Speedup Instruction Count (lower
is better)
N1 (2x128 NEON) V1 (2x256 SVE)
“SVE on the Neoverse roadmap brings a lot of
potential to HPC and machine learning workloads,
and we look forward to contributing to the Arm-
ecosystem as it grows.”
-Craig Prunty, VP marketing and business
development, SiPearl
• Silicon partner has
implementation control over
SVE voltage and frequency
transitions
• With SVE developers can mix
code freely between narrow
and wide vector execution
WorkloadAWorkloadB
“Fugaku developed by Riken and Fujitsu has
achieved four supercomputer crowns, largely
thanks to strong floating-point calculation engine
with SVE and high throughput cache and memory
structure in Fujitsu’s A64FX processor. We
welcome the expansion of SVE technology and
ecosystem in the future.”
-Takumi Maruyama, Principal Expert, Fujitsu

11. 11 © 2020 Arm Limited
Arm Neoverse N2 Platform
Cloud to edge efficiency
Cloud Data
Centers
Edge
Edge
Edge
Edge
Edge
Edge
5G
N2
N2
N2
High core count, high power
Enterprise & Cloud CPUs
Mid core count, mid power
Switch and SmartNIC CPUs
Low core count, low power
Gateway and Router CPUs
N-Series Platform Scalability
32-192 cores
80-350W TDP
12-36 cores
30-80W TDP
8-16 cores
20-35W TDP
High
Low
&Power
SoCPerformance
5G

12. 12 © 2020 Arm Limited
Arm Neoverse is Just Getting Started
Adoption of Arm
Neoverse solutions is
accelerating
across key segments:
hyperscale/cloud computing,
HPC, 5G, and the edge
Arm is meeting and
exceeding targets with
the Neoverse roadmap
around performance and IP
delivery schedules
Arm continues to invest
in the software
ecosystem
to enable a frictionless
developer experience and
software that ‘just works’
12 © 2020 Arm Limited

13. The Cloud to Edge Infrastructure Foundation
for a World of 1T Intelligent Devices
Thank You!

14. 14 © 2020 Arm Limited
• This benchmark presentation made by Arm Ltd and its subsidiaries (Arm) contains forward-looking statements and information. The
information contained herein is therefore provided by Arm on an "as-is" basis without warranty or liability of any kind. While Arm
has made every attempt to ensure that the information contained in the benchmark presentation is accurate and reliable at the
time of its publication, it cannot accept responsibility for any errors, omissions or inaccuracies or for the results obtained from the
use of such information and should be used for guidance purposes only and is not intended to replace discussions with a duly
appointed representative of Arm. Any results or comparisons shown are for general information purposes only and any particular
data or analysis should not be interpreted as demonstrating a cause and effect relationship. Comparable performance on any
performance indicator does not guarantee comparable performance on any other performance indicator.
• Any forward-looking statements involve known and unknown risks, uncertainties and other factors which may cause Arm’s stated
results and performance to be materially different from any future results or performance expressed or implied by the forward-
looking statements.
• Arm does not undertake any obligation to revise or update any forward-looking statements to reflect any event or circumstance that
may arise after the date of this benchmark presentation and Arm reserves the right to revise our product offerings at any time for
any reason without notice.
• Any third-party statements included in the presentation are not made by Arm, but instead by such third parties themselves and Arm
does not have any responsibility in connection therewith.
Performance and Benchmark Disclaimer