04 geran bc-en-zxg10 i bsc structure and principle-1-training manual-201010 (1)

ZXG10 iBSC
Structure and Principle
ZTE UNIVERSITY
ZTE University, Dameisha
YanTian District, Shenzhen,
P. R. China
518083
Tel: (86) 755 26778800
Fax: (86) 755 26778999
URL: http://ensupport.zte.com.cn
E-mail: support@zte.com.cn

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Publishing Date (MONTH/DATE/YEAR) : 20100906

Content
ZXG10 iBSC Structure and Principle ............................. 1
1 System Overview....................................................... 2
1.1 System Background ............................................................... 2
1.2 Position in the Network........................................................... 2
1.3 Cabinet Appearance............................................................... 3
1.4 System Features ................................................................... 3
1.5 Services and Functions........................................................... 4
2 System Indices........................................................ 13
2.1 Physical Indices....................................................................13
2.1.1 Dimensions .................................................................13
2.1.2 Weight........................................................................13
2.2 Power Indices ......................................................................14
2.2.1 Power Supply...............................................................14
2.2.2 Total Power Consumption ..............................................14
2.3 Environment Requirement .....................................................14
2.3.1 Grounding Requirements...............................................14
2.3.2 Temperature and Humidity Requirements ........................14
2.3.3 Air Quality Requirements...............................................15
2.3.4 Atmospheric Pressure Requirements ...............................15
2.4 Clock Indices .......................................................................15
2.5 Reliability Indices .................................................................16
2.6 Interface Type......................................................................16
2.7 Capacity Specifications..........................................................16
3 Hardware Structure................................................. 19
3.1 Cabinet Layout.....................................................................19
3.2 Shelf...................................................................................20
3.3 Boards ................................................................................20
3.4 Shelves...............................................................................24
3.4.1 Shelf Overview.............................................................24
3.4.2 Shelf Description..........................................................26
3.4.3 Inter-Shelf Connections.................................................40
4 Software Structure.................................................. 47

4.1 Front-End Software...............................................................47
4.2 Background Software ............................................................49
5 System Principle...................................................... 51
5.1 Logical Units ........................................................................51
5.1.1 Operation and Maintenance Unit.....................................52
5.1.2 Processing Unit (CMPU).................................................52
5.1.3 Abis Interface Unit........................................................52
5.1.4 A-Interface Uits ...........................................................55
5.1.5 Packet Control Unit.......................................................56
5.1.6 TransCoder Unit ...........................................................59
5.1.7 IP Switch Unit..............................................................59
5.2 Clock Distribution .................................................................59
5.3 User Plane Signaling Flow ......................................................60
5.3.1 User Plane Signal Flow in the CS Domain.........................60
5.3.2 User Plane Signal Flow in the PS Domain .........................62
5.4 Control Plan Signaling Flow....................................................63
5.4.1 Control Plane Signal Flow in the CS Domain .....................63
5.4.2 Control Plane Signal Flow in the PS Domain .....................65
6 Interface and Protocol............................................. 69
6.1 Interfaces............................................................................69
6.1.1 A-Interface..................................................................69
6.1.2 Ater Interface (TC Is External) .......................................69
6.1.3 Abis Interface ..............................................................70
6.1.4 Gb Interface ................................................................70
6.1.5 OMC Interface .............................................................71
6.1.6 CDR Interface ..............................................................71
6.2 Protocols .............................................................................71
6.2.1 CS Domain Protocols ....................................................71
6.2.2 PS Domain Protocols.....................................................78
7 Equipment Configuration......................................... 81
7.1 Abis Interface and A-Interface Adopting E1 ..............................81
7.2 Abis Interface Adopting E1 and A-Interface Adopting
STM-1............................................................................................82
7.3 Abis Interface Adopting E1 and A-Interface Adopting IP .............83
7.4 Abis Interface and A-Interface Adopting IP...............................84
7.5 Abis Interface Adopting IP and A-Interface Adopting
E1(T1) ...........................................................................................85
7.6 Abis Interface Adopting IP and A-Interface Adopting
STM-1............................................................................................86

7.7 Abis Interface Adopting IPoE and A-Interface Adopting
E1(T1) ...........................................................................................87
7.8 Abis Interface Adopting IPoE and A-Interface Adopting
STM-1............................................................................................88
7.9 Abis Interface Adopting IPoE and A-Interface Adopting IP ..........89
7.10 Abis Interface and Ater Interface Adopting E1(T1)...................90
7.11 Abis Interface Adopting IP and Ater Interface Adopting
E1(T1) ...........................................................................................91
8 Operation and Maintenance..................................... 93
8.1 OMM Access and Operation Mode............................................93
8.2 EMS Maintenance Function.....................................................94
9 Boards..................................................................... 97
9.1 General Description of Boards ................................................97
9.2 OMP ...................................................................................98
9.2.1 OMP Functions .............................................................98
9.2.2 OMP Principles .............................................................98
9.2.3 OMP Panel...................................................................99
9.2.4 OMP Interfaces ..........................................................100
9.2.5 OMP Buttons..............................................................101
9.2.6 OMP Indicators ..........................................................101
9.3 CMP..................................................................................103
9.3.1 CMP Functions ...........................................................103
9.3.2 CMP Principles ...........................................................103
9.3.3 CMP Panel .................................................................103
9.3.4 CMP Interfaces...........................................................104
9.3.5 CMP Buttons..............................................................104
9.3.6 CMP Indicators...........................................................105
9.4 UIMC ................................................................................106
9.4.1 UIMC Functions..........................................................106
9.4.2 UIMC Principles..........................................................107
9.4.3 UIMC Panel................................................................107
9.4.4 UIMC Interfaces .........................................................108
9.4.5 UIMC Buttons ............................................................110
9.4.6 UIMC Indicators .........................................................110
9.5 CHUB................................................................................111
9.5.1 CHUB Functions .........................................................111
9.5.2 CHUB Principles .........................................................111
9.5.3 CHUB Panel ...............................................................112
9.5.4 CHUB Interfaces.........................................................113
9.5.5 CHUM Buttons ...........................................................115

9.5.6 CHUB Indicators.........................................................115
9.6 ICM ..................................................................................116
9.6.1 ICM Functions............................................................116
9.6.2 ICM Principles............................................................117
9.6.3 ICM Panel..................................................................118
9.6.4 ICM Interfaces ...........................................................119
9.6.5 ICM Buttons ..............................................................124
9.6.6 ICM Indicators ...........................................................124
9.6.7 DIP Switches on the ICM Board ....................................128
9.7 SBCX ................................................................................128
9.7.1 SBCX Functions..........................................................128
9.7.2 SBCX Principles..........................................................128
9.7.3 SBCX Panel ...............................................................129
9.7.4 SBCX Interfaces.........................................................130
9.7.5 SBCX Buttons ............................................................132
9.7.6 SBCX Indicators .........................................................132
9.8 DTB ..................................................................................134
9.8.1 DTB Functions............................................................134
9.8.2 DTB Principles............................................................134
9.8.3 DTB Panel .................................................................135
9.8.4 DTB Interfaces...........................................................136
9.8.5 DTB Buttons ..............................................................136
9.8.6 DTB Indicators...........................................................137
9.8.7 DTB DIP Switches and Jumpers ....................................138
9.9 SDTB2 ..............................................................................141
9.9.1 SDTB2 Functions ........................................................141
9.9.2 SDTB2 Principles ........................................................141
9.9.3 SDTB2 Panel..............................................................142
9.9.4 SDTB2 Interfaces .......................................................144
9.9.5 SDTB2 Buttons ..........................................................144
9.9.6 SDTB2 Indicators .......................................................145
9.10 SPB2...............................................................................146
9.10.1 SPB2 Functions ........................................................146
9.10.2 SPB2 Principles ........................................................147
9.10.3 SPB2 Panel ..............................................................147
9.10.4 SPB2 Interfaces........................................................148
9.10.5 SPB2 Buttons...........................................................149
9.10.6 SPB2 Indicators........................................................149
9.11 GIPI................................................................................150
9.11.1 GIPI Functions .........................................................150

9.11.2 GIPI Principles .........................................................150
9.11.3 GIPI Panel ...............................................................151
9.11.4 GIPI Interfaces.........................................................152
9.11.5 GIPI Buttons............................................................153
9.11.6 GIPI Indicators.........................................................154
9.12 EIPI ................................................................................154
9.12.1 EIPI Functions..........................................................154
9.12.2 EIPI Principles..........................................................155
9.12.3 EIPI Panel................................................................155
9.12.4 EIPI Interfaces .........................................................156
9.12.5 EIPI Buttons ............................................................156
9.12.6 EIPI Indicators .........................................................157
9.13 GUIM ..............................................................................157
9.13.1 GUIM Functions........................................................157
9.13.2 GUIM Principles ........................................................158
9.13.3 GUIM Panel..............................................................159
9.13.4 GUIM Interfaces .......................................................159
9.13.5 GUIM Buttons ..........................................................161
9.13.6 GUIM Indicators .......................................................161
9.14 GUP2 ..............................................................................163
9.14.1 GUP2 Functions........................................................163
9.14.2 GUP2 Principles ........................................................164
9.14.3 GUP2 Panel..............................................................165
9.14.4 GUP2 Interfaces .......................................................166
9.14.5 GUP2 Buttons ..........................................................166
9.14.6 GUP2 Indicators .......................................................167
9.15 GLI .................................................................................167
9.15.1 GLI Functions...........................................................167
9.15.2 GLI Principles...........................................................168
9.15.3 GLI Panel ................................................................168
9.15.4 GLI Interfaces..........................................................169
9.15.5 GLI Buttons .............................................................170
9.15.6 GLI Indicators ..........................................................170
9.16 PSN ................................................................................171
9.16.1 PSN Functions..........................................................171
9.16.2 PSN Principles ..........................................................171
9.16.3 PSN Panel................................................................172
9.16.4 PSN Interfaces .........................................................173
9.16.5 PSN Buttons ............................................................173
9.16.6 PSN Indicators .........................................................174

9.17 PWRD .............................................................................174
9.17.1 PWRD Functions .......................................................174
9.17.2 PWRD Principles .......................................................175
9.17.3 PWRD Panel.............................................................176
9.17.4 DIP Switches and Jumpers on the PWRD Board.............176
9.18 Indicator Status Description ...............................................177

ZXG10 iBSC Structure
and Principle
After you have completed this course, you
will be able to:
>> Learn iBSC system funcations and fea-
tures
>> Learn iBSC system indices, including
its dimensions and capacity
>> Learn iBSC hardware and software
structure
>> Learn the working principles and sig-
nal flow iBSC
>> Learn the networking modes and con-
figurations of iBSC
>> Learn the operation and maintenance
modes of iBSC
Confidential and Proprietary Information of ZTE CORPORATION 1

ZXG10 iBSC Structure and Principle
Chapter1 System Overview
After you have completed this chapter, you will know:
>> System Background
>> Position in the Network
>> Cabinet Appearance
>> System Features
>> Services and Functions
1.1 System Background
As a 2G digital mobile cellular communication system, GSM has
been applied widely across the globe, mainly for voice services.
However, with the development of mobile communication tech-
nology and the diversification of services, the demand for data
services keeps increasing. GSM devices thus need to address sig-
nificantly increasing demand for data services, for example, IP Gb
interfaces, Iu interface interconnection, large-capacity data inter-
faces and convergence with 3G services.
To satisfy these requirements, ZTE has developed iBSC.
1.2 Position in the Network
Figure 1 shows the position of iBSC in the network when the TC is
built-in.
FIGURE 1 POSITION OF IBSC IN THE NETWORK
iBSC is part of the GSM EDGE Radio Access Network (GERAN). The
GERAN includes one or more Base Station Subsystems (BSSs),
each of which consists of one BSC and one ore more BTSs. The
2 Confidential and Proprietary Information of ZTE CORPORATION

Chapter 1 System Overview
BSC and the BTS are connected via the Abis interface, and the
GERAN and the CN are connected via the A/Gb interface.
1.3 Cabinet Appearance
Figure 2 shows the overall appearance of iBSC.
FIGURE 2 IBSC OVERALL APPEARANCE
The iBSC cabinet complies with the CompactPCI standard. Its front
door is navy blue with densely spaced ventilation holes. The cab-
inet body is also navy blue.
1.4 System Features
iBSC is a large-capacity BTS controller independently developed
by ZTE. It has the following features:
� Adopts the all-IP hardware platform
iBSC adopts an all-IP hardware platform that is the same as
ZTE 3G products, which ensures the strong service support
capabilities of ZXG10 iBSC and provides ease for the imple-
mentation of IP Abis and IP Gb interfaces.

� Large capacity, strong processing capability
iBSC supports up to 1536 sites and 3072 carriers. It has a
strong processing capability that helps to reduce network com-
plexity, improve network QoS and save investment on equip-
ment rooms.
� Standard A-interface
iBSC provides completely open A-interfaces to ensure inter-
connection with devices from different manufacturers.
� Modular design, easy expansion
iBSC adopts modular design that makes capacity expansion
possible and smooth by simply adding modules.
� Flexible networking modes
iBSC supports the star, chain, tree and ring connection of the
Abis interface; it also supports E1, satellite, microwave and
optical transmission devices.
� High integration and low power consumption
iBSC is highly integrated, which saves area occupation and in-
vestment on equipment rooms.
iBSC has a low power consumption, which reduces operator
investment on the power system and air conditioners.
� High reliability
iBSC adopts the 1+1 backup for key components to increase
system reliability.
1.5 Services and Functions
iBSC supports the service functions of the BTS controller as stip-
ulated in GSM Phase II+ standard, and is compatible with GSM
Phase II standard. Its functions are as follows:
1. Supports GSM900, GSM850, GSM1800 and GSM1900 net-
works.
2. Supports BTS management functions stipulated in the proto-
cols, and can manage the mixed access of ZXG10-BTS series
products.
3. Implements the O&M management of the BSS by connecting
to NetNumen M31 via the OMC interface.
4. Supports multiple service types.
i. Circuit voice service
– Full-rate voice service
– Enhanced full-rate voice service
– Half-rate voice service
– AMR voice service
The Adaptive Multi-Rate (AMR) audio codec automat-
ically adjusts the code rate of voice according to C/I

values in order to achieve the best voice quality under
different C/I values.
According to the protocol, AMF-FR has eight voice code
rate modes, all of which are supported by iBSC. AMR-HR
has five voice code rate modes (7.4 kbit/s, 6.7 kbit/s,
5.9 kbit/s, 5.15 kbit/s and 4.75 kbit/s), all of which are
supported by iBSC.
ii. 9.6 kbit/s circuit data service
iii. Short message service
– MS terminated point-to-point short message service
– MS initiated point-to-point short message service
– Cell broadcast service originated from the SMC or the
Operation and Maintenance System
iv. GPRS Service
Supports point-to-point interactive telecom service. For
example, database access, session service and tele-action
service.
v. EDGE Service
5. Supports channel management, including ground channel
management, service channel management and control chan-
nel management.
i. Ground channel management
Includes the management of the ground channel between
the MSC and the BSC, the ground channel between the
BSC and the BTS and the channel between the BSC and
the SGSN.
ii. Service channel management includes: channel assign-
ment, link monitoring, channel release and function control
decision.
iii. Supported control channels include: FCCH, SCH, BCCH,
PCH, AGCH, RACH, SDCCH, SACCH, FACCH; PACCH,
PAGCH, PBCCH, PCCCH, PPCH, PRACH, PTCCH.
6. Supports frequency hopping.
7. Supports discontinuous transmission (DTX) and voice activa-
tion detection (VAD).
8. Supports various handoff modes.
Supports synchronous handoff, non-synchronous handoff and
pseudo-synchronous handoff.
Supports handoff within 900 MHz frequency band, within 1800
MHz frequency band, and between 900 MHz and 1800 MHz
frequency bands. It can process handoff measurement, sup-
ports handoff measurement before handoff, supports network
initiated handoff due to service or interference management
reasons, supports handoff between channels of different voice
code rates, supports handoff when using DTX, supports handoff
caused by traffic reasons, and supports cocentric circle handoff
based on the carrier-to-interference ratio.

9. Supports 6-level static and 15-level dynamic power control of
the MS and the BTS, and supports quick power control based
on the receiving quality.
10. Supports overload control and traffic control.
iBSC can locate and analyze system overload and report the
cause to the background. When the traffic is heavy, it can
control the traffic over the A interface, the Abis interface and
the Gb interface, while ensuring the maximum call traffic ca-
pacity.
11. Supports call re-establishment in case of radio link faults.
12. iBSC supports call queuing and forced call release in the as-
signment and handoff program.
13. Supports Enhanced Multi-level Precedence and Preemption
(EMLPP).
The EMLPP classifies mobile subscribers into different priority
levels and subscribers with higher leves are prioritized over
others in obtaining channel resources.
14. Supports Co-BCCH.
Co-BCCH is used in dual-band cells. A Dual-band cell is a
cell that supports two frequency bands, in which and differ-
ent bands use one BCCH.
It has the following advantages:
� Saves a BCCH timeslot.
� Directly configures the 1800M frequency in the 900M cell.
It is unnecessary to modify the existing adjacency relations
and re-plan the network. Also, it is not required to do re-
selection and handoff between dual-band cells sharing the
same site.
15. Supports dynamic HR channel conversion.
iBSC supports dynamic HR channel conversion. The system
can dynamically and automatically switch between HR and FR
channels in real time according to the call traffic.
16. Supports traffic control.
Traffic control helps to ensure the normal operation of the sys-
tem by restricting certain service in order to control the over-
load.
17. Supports dynamic radio channel assignment.
iBSC supports the dynamic assignment of CS and PS channels.
Dynamic channel allocation means that the logic type of radio
channels can be dynamically generated according to the cur-
rent call type instead of being configured at the background
OMM.The feature can fully utilize radio resources and increase
flexibility of channel utilization.
iBSC performs channel allocation according to the channel rate,
carrier priority, interference band, channel allocation on in-
tra-cell handoff, allocation on reserved channels, and sub-cell
channel selection.
18. Supports voice version selection.

iBSC provides the voice version selection function, which en-
ables the users to set a preferred voice version for FR and HR
channels.The FR voice versions include FR, EFR and AMR; the
HR voice versions include HR and AMR.
19. Supports three-digit net IDs.
iBSC supports three-digit network IDs. Two-digit or three-digit
network IDs can be used according to the current network con-
ditions. Based on the network ID, the MNC in the signaling
messages received over the A interface and the Gb interface
can be interpreted, thus determining the MNC format in the
signaling messages to be sent. The network ID is also the
basis for determining the MNC format in broadcast messages
over the Um interface.
20. Supports handoff between 2G and 3G systems.
� Supports the 3G-to-2G incoming handoff for CS services;
� Supports the 2G-to-3G outgoing handoff for CS services.
21. Supports full dynamic Abis.
Full dynamic Abis means the relation between radio channels
and Abis channels is not generated in the O&M system, but
dynamically configured in the service process. Dynamic Abis
provides wider bandwidths for data services when the trans-
mission bandwidth at Abis is fixed.
22. Supports coding control.
Compared with GPRS, EDGE has significantly improve mea-
surement reports. EDGE measurement could be performed
based on each impulse, that is, it can be measured by the
granularity of BURST.
The feature of rapid EGPRS measurement enables the network
side to respond to the change of radio environment quickly, so
as to choose the most proper coding mode and perform power
control.
In the downlink direction, iBSC supports the determination of
coding modes according to timeslots and according to TBF.
In the uplink direction, iBSC determines the uplink TFB coding
mode based on the uplink channel measurement parameters
reported by the BTS.
23. Supports retransmission.
In the packet services, retransmission is controlled with the
negative feedback method. The sending end determines which
receiving ends have not correctly received data according to
the bitmaps from the receiving ends, and then determines
whether the network side should retransmit corresponding
packets.
In GPRS, packet data is retransmitted using the same coding
mode as the first transmission. For example, if packet data
was originally transmitted using CS4 coding mode, it will be
retransmitted in the CS4 coding mode.
EDGE introduces two new retransmission methods: Segmen-
tation and Assembly(SAR) and incremental redundancy.
24. Optimizes the assignment algorithm of the packet channel.

iBSC supports the multi-timeslot function of MSs, and assigns
GPRS TBF or EDGE TBF according to their support for GPRS or
EDGE.
When assigning PDTCHs to the MSs, iBSC chooses carriers with
low load first; after the carrier is selected, iBSC chooses the
most suitable PDTCH combination in the carrier according to
MS requirements.
25. Supports satellite Abis and satellite Gb interfaces.
Satellite transmission introduces about 540 ms bidirectional
delay in the system, causing great influence on GPRS and EDGE
services.iBSC mitigates the influence and guarantees the qual-
ity of GPRS and EDGE services.
26. Supports various interface types.
iBSC supports STM-1, GE and E1 interfaces.
27. Supports UMTS QoS.
When the GSM network evolves to GERAN, the high-speed
packet data transmission capability brought by EDGE enables
operators to provide subscribers with richer and more colorful
services, such as session service, stream media service and
interaction service. iBSC supports different QoS requirements
for these various services.
28. Supports extended uplink Temporary Block Flow (TBF).
Before extended uplink dynamic allocation is introduced into
the GPRS, the number of uplink channels available for the up-
link TBF is always less than the number of downlink channels
occupied by at the same time; iBSC supports extended uplink
TBF, which creates more uplink channels than downlink chan-
nels and better satisfies service needs.
29. Supports connection between multiple Signaling Points.
According to the specifications of ITU-T, the maximum sig-
naling links and the maximum circuits between two signaling
points are respectively 16 and 4096. Along with the evolution
of the mobile network, its capacity has significantly increased
and requirements on its processing ability has also increased.
The maximum signaling links and circuits between offices as
defined by the ITU-T can no longer satisfy the service needs of
the site.
The signaling part of the universal 3G platform adopted by iBSC
supports multiple signaling points so that the iBSC can connect
to multiple MSCs.
30. Supports intelligent power-off.
iBSC notifies the BTS to perform power-on/power-off opera-
tions through a message when the performance data reaches
the power-on/power-off threshold.
iBSC can combine multiple scattered timeslots and migrate
them to the fewest carriers, and then shut down the unused
carriers to reduce power consumption. Timeslots are be pref-
erentially combined onto BCCH carriers.
iBSC supports the customization of intelligent shutdown by pe-
riod, so as to prevent the intelligent shutdown from influencing
the network in busy hours.

31. Supports TFO.
TFO is an in-band codec negotiation protocol that makes codec
negotiation between two TCs after a call is set up. It eliminates
the need for voice code conversion at the sending and receiving
ends of calls between mobile subscribers, thus increasing voice
quality and reducing transmission delay.
32. Supports transparent channel.
The transparent channel function implements transparent
transfer of data between a timeslot in the E1 line of an inter-
face at one end and another timeslot in the E1 line of another
interface at the other end.
When the E1 lines at both ends are in the level of the shelf, a
transparent channel can be implemented through the circuits
on the GUIM board of this shelf; When the E1 lines at both
ends of a transparent channel are not in the same level of
the shelf, the transparent channel can only be implemented by
processing DSP transparent forwarding of media plane data.
iBSC supports transparent channels from the Abis interface to
the A interface, from the Abis interface to the Abis interface,
and from the A interface to the A interface. When remote TC
is implemented, transparent channel from the Abis interface to
the Ater interface is supported.
33. Supports EGPRS and GPRS channel scheduling.
Take the GPRS mobile phone for example. First, GPRS prefer-
ential channels are assigned to the phone. When EGPRS chan-
nels are free and GPRS channels have a heavy load, EGPRS
channels can be assigned to the phone. Contrarily, when EG-
PRS channels have a heavy load and GPRS channels are free,
GPRS phones can switch to GPRS channels.
34. Supports the Dual-Transmission Mode (DTM).
iBSC supports DTM. Under the A/Gb mode, iBSC can process
CS and PS services simultaneously.
35. Supports subscriber tracing.
iBSC implements subscriber signaling tracing based on IMSI,
TMSI or TLLI.
36. Supports PS paging coordination.
iBSC supports PS paging coordination. In the packet trans-
mission mode, iBSC enables MSs to intercept circuit paging
messages.
37. Supports FLEX A.
FLEX A means one BSC can connect with multiple MSCs that
form MSC pools.
FLEX A provides flexible network modes. Compared with the
traditional single-MSC structure, the MSC pool has the follow-
ing advantages:
� Expands the service area of one MSC, and reduces the fre-
quency and traffic of inter-MSC handoff, location area up-
date, and HLR update.
� Improves utilization of network equipment. In one MSC
Pool, the homing VLR/MSC can be fixed. In this way, the

load of a MSC does not go up when the traffic of hot spot
goes up suddenly.
� Improves the overall disaster recovery capability of the net-
work. When a MSC in the MSC Pool is faulty, its traffic can
be taken over by another MSC in the MSC Pool.
For the MS, the networking mode of FLEX A is transparent, that
is, the MS does not participate in the modification of networking
mode.This guarantees the MS compatibility of the network.
38. Supports FLEX Gb.
FLEX Gb means one BSC can connect multiple SGSNs that form
SGSN pools.
FLEX Cb provides flexible network modes. Compared with the
traditional single-SGSN structure, the SGSN pool has the fol-
lowing advantages:
� Expands the service area of one SGSN, and reduces the fre-
quency and traffic of inter-SGSN PS handoff, routing area
update and HLR update.
� Improves utilization of network equipment. In an SGSN
POOL, the homing VLR/SGSN can be fixed. In this way, the
load of an SGSN does not go up when the traffic of a hot
spot goes up suddenly.
� Improves the overall disaster recovery capability of the
network. When a SGSN in the SGSN Pool is faulty, its traffic
can be taken over by another SGSN in the SGSN Pool.
For MS, the networking mode of FLEX Gb is transparent, that is,
the MS does not participate in the modification of networking
mode. This guarantees the MS compatibility of the network.
39. Supports preemption and queuing of packet services.
The preemption of packet services considers all dynamic and
static packet channels when assigning packet radio resources
according to subscriber QoS requirements. If the free radio
resources on a channel cannot satisfy QoS requirements or
the channel has reached the maximum number of subscribers,
and the current subscriber has the right of preemption, then
the BSC will attempt to forcibly release the radio resources of
one or more low-priority subscribers and assign them to the
current subscriber.
When the BSC cannot allocate sufficient packet radio resources
according to subscriber QoS requirements, the queuing of
packet services allows the BSC to admit services on the Best
Effort principle, and them line them up in a queue to wait for
radio resources that satisfy subscriber QoS requirements.
When the BSC supports preemption and queuing simultane-
ously, preemption precedes queuing in priority. Queuing is ac-
tivated when preemption fails.
40. Supports reselection of the external network assisted cell.
Reselection of the external network assisted cell accelerates
the access speed of the MS during reselection of an external
cell, shortens the cell reselection time during data transmis-
sion, increases data transmission rate, thus providing better
user experience.

41. Supports network controlled cell reselection
Network controlled cell reselection is a procedure in which the
BSC receives the measurement report from the MS, and then
performs storage and weighted average processing of the mea-
sured level values of the service cell and the adjacent cells.
The calculation result is then used together with network ser-
vice load conditions to make cell reselection decisions.
By fully utilizing available information and making reasonable
decisions, network controlled cell reselection optimizes net-
work services. It also reduces MS autonomous reselection of
useless cells, thus increasing TBF data transmission efficiency
and providing the best service quality to end users.
42. Supports uplink incremental redundancy.
Incremental redundancy is a method to control EDGE link qual-
ity. With this method, when the BTS successfully decodes the
RLC head but fails to decode a data chunk, the BTS stores this
data chunk and notifies the MS. The MS then uses another per-
foration method to encode and retransmit the data chunk so
that the BTS can decode the resent data chunk. If decoding
fails, the stored data chunk can be used together to perform
joint decoding. Data chunks using different perforation meth-
ods have different redundant information. Therefore, joint de-
coding has a higher success rate, because more redundancy
information can be utilized.
43. Supports ZXSDR BS8800 GU360.
ZXSDR BS8800 GU360 is an indoor macro-BTS based on the
new platform. It adopts the multi-carrier technology, sepa-
rates the baseband from the frequency module, and imple-
ments GSM and WCDMA in one model.
44. Support Multi PLMNs.
iBSC supports the sharing of one radio network among different
operators. Operators can set up their own cells on the same
site to provide the common access of multiple operators.
45. Supports noise suppression (only for E1 A interface) and level
control.
Noise suppression can increase the voice SNR, enhance voice
quality and provide a more comfortable communication envi-
ronment.
Level control helps to optimize signal levels, thus improving
communication quality.
TFO is exclusive with noise suppression and level control. Once
the TFO is established, noise suppression and level control are
no longer needed.
46. Supports higher-order multiple timeslots for PS services.
iBSC supports higher-order multiple timeslots for PS services.
The downlink path can assign transmission data for five times-
lots at the same time, which increases the downlink rate to
296 Kbps. The high transmission rate can significantly improve
user experience for FTP file transmission and email services.
47. Supports IP transmission for the A interface.

With the evolution of network technology, it is easier to get
IP-based transmission resources. Compared with the tradi-
tional circuit network, IP network has a higher utilization rate
and more flexible network modes.
iBSC supports IP-based bearing at the A interface, which helps
the network to evolve to an all-IP network. With this feature,
the GSM can be easily merged with the transmission network
in the future.
iBSC supports the IP transmission for the A interface only when
the Gigabit hardware platform is adopted. If the FE hardware
platform is adopted, the IP transmission for the A interface is
not supported.

Chapter2 System Indices
>> Physical Indices
>> Power Indices
>> Environment Requirement
>> Clock Indices
>> Reliability Indices
>> Interface Type
>> Capacity Specifications
2.1 Physical Indices
2.1.1 Dimensions
� Excluding the left and right door panels: Height×Width×Depth
= 2000 mm×600 mm×800 mm
� Including the left and right door panels: Height×Width×Depth
= 2000 mm×650 mm×800 mm
Note:
The dimension of each rack is 2000 mm×600 mm×800 mm
(H×W×D), and the width of each side panel is 25 mm.
2.1.2 Weight
At full configuration, the total weight of a single cabinet of iBSC
does not exceed 270 kg.
At full configuration, the total weight of two cabinets of iBSC does
not exceed 540 kg.

2.2 Power Indices
2.2.1 Power Supply
iBSC input voltage nominal value: -48 V DC.
DC voltage range: -40 V to -57 V.
2.2.2 Total Power Consumption
The power consumption of iBSC differs for different configurations.
� One iBSC cabinet
If the cabinet adopts all E1 interfaces, the power consumption
is 2558 W; if the cabinet adopts all IP interfaces, the power
consumption is 2542 W (including 160 W for SBCX when PCU
and TC are built-in).
� Dual iBSC cabinets
If the cabinet adopts all E1 interfaces, the power consumption
is 6368 W; if the cabinet adopts all IP interfaces, the power
consumption is 3808 W (including 160 W for SBCX when PCU
and TC are built-in).
2.3 Environment Requirement
2.3.1 Grounding Requirements
1. Grounding Mode
The cabinet provides top grounding and bottom grounding.
2. Ground Resistance
� Cabinet bonding resistance: 0.1 Ω–0.3 Ω
� Equipment room grounding resistance: 1 Ω
2.3.2 Temperature and Humidity
Requirements
1. Working temperature
� Long-term temperature: 0 °C - 40 °C
� Short-term temperature: -5 °C - 45 °C
2. Relative humidity

Chapter 2 System Indices
� Long-term relative humidity: 20–90%
� Short-term relative humidity: 5–95%
Note:
The working temperature/humidity refers to the value measured
at 1.5 m above the floor and 0.4 m in front of the cabinet when
the cabinet has no front or rear guard plate. The short-term refers
to operating not more than 48 successive hours, or 15 cumulative
days per year.
2.3.3 Air Quality Requirements
1. The equipment room should not have corrosive gas or smoke.
2. The density of dust particle whose diameter is larger than 5μm
should not exceed 3×104/m³.
3. There should be no explosive, conductive, magnetic or corro-
sive dust.
2.3.4 Atmospheric Pressure
Requirements
Atmospheric pressure requirement: 70 kPa–106 kPa.
2.4 Clock Indices
Table 1 illustrates indices of the iBSC clock.
TABLE 1 IBSC CLOCK INDICES
Parameter Index
Clock level Level 3 Class A
Lowest clock accuracy ±4.6×10-6
Pull-in range ±4.6×10-6
Maximum frequency deviation 2×10-8/
Initial maximum frequency deviation 1×10-8
Clock working mode Capture, trace, keep, free

Parameter Index
Clock synchronization mode
External clock synchroniza-
tion; extracting from the line
clock
2MBITS 2
2MHz 2
Clock synchronization
interface
Line 8K 2
2.5 Reliability Indices
1. Mean Time Between Failure (MTBF): 100,000 hours.
2. Mean Time To Repair (MTTR): ≤ 30 minutes.
3. System restart time: 10 minutes.
2.6 Interface Type
Table 2 describes interface types of iBSC.
TABLE 2 IBSC INTERFACE TYPES
Trans-
mission
Type
A-In-
terface
(connect
to MSC,
built-in
TC)
Ater In-
terface
(connect
to iTC,
external
TC)
Abis In-
terface
(connect
to BTS)
Gb In-
terface
(connect
to SGSN)
OMC In-
terface
STM-1 √ √ √ × ×
GE √ × √ √ √
E1 √ √ √ √ ×
T1 × × √ × ×
IPoE × × √ × ×
2.7 Capacity Specifications
1. Table 3 describes the maximum capacities of the A-interface
and Abis interface of iBSC.

Chapter 2 System Indices
TABLE 3 CAPACITY SPECIFICATIONS OF A-INTERFACE AND ABIS INTERFACE AT MAXIMUM
CONFIGURATION
A Interface E1(T1) A STM-1 A IP A
Abis In-
terface
Rack Num-
ber of
Car-
riers
Interface
Capacity
Num-
ber of
Car-
riers
Interface
Capacity
Num-
ber of
Car-
riers
Interface
Capacity
Abis:208
E1(T1)
Abis:208
E1(T1)
Abis:208
E1(T1)
A single
rack
1024
A:188E1
(T1)
1024
A:4STM-1
1024
A:1 GE
Abis:624
E1(T1)
Abis:624
E1(T1)
Abis:624
E1(T1)
E1(T1)
Abis
Dual
racks
3072
A:700E1
(T1)
3072
A: 11 pairs
of STM-1
3072
A: two pairs
of GE
Abis:
three pairs
of STM-1
Abis: three
pairs of
STM-1
Abis: three
pairs of
STM-1
A single
rack
1024
A:188E1
(T1)
1024
A: four
pairs of
STM-1
1024
A: one pair
of GE
Abis: nine
pairs of
STM-1
Abis: nine
pairs of
STM-1
Abis: nine
pairs of
STM-1
STM-1
Abis
Dual
racks
3072
A:700E1
(T1)
1024
A: 11 pairs
of STM-1
3072
A: two pairs
of GE
Abis: one
pair of GE
Abis: one
pair of GE
Abis: one
pair of GE
A single
rack
1024
A:252E1
(T1)
1024
A: four
pairs of
STM-1
2048
A: one pair
of GE
Abis: two
pairs of GE
Abis: two
pairs of GE
Abis: two
pairs of GE
IP Abis
Dual
racks
3072
A:700E1
(T1)
3072
A: 11 pairs
of STM-1
3072
A: two pairs
of GE
Abis:160
E1(T1)
Abis:160
E1(T1)
Abis:160
E1(T1)
A single
rack
1024
A:188E1
(T1)
1024
A: four
pairs of
STM-1
1024
A: one pair
of GE
Abis:480
E1(T1)
Abis:480
E1(T1)
Abis:480
E1(T1)
IPoE Abis
EIPI+D-
TB
Dual
racks
3072
A:700E1
(T1)
3072
A: 11 pairs
of STM-1
3072
A: two pairs
of GE

A Interface E1(T1) A STM-1 A IP A
Abis In-
terface
Rack Num-
ber of
Car-
riers
Interface
Capacity
Num-
ber of
Car-
riers
Interface
Capacity
Num-
ber of
Car-
riers
Interface
Capacity
–
Abis: three
pairs of
STM-1
Abis: three
pairs of
STM-1A single
rack
-
-
1024
A: 4 pairs
of STM-1
1024
A: one pair
of GE
- Nine pairs
of STM-1
Abis: nine
pairs of
STM-1
IPoE Abis
EIPI+S-
DTB2
Dual
racks
-
-
3072
11 pairs of
STM-1
3072
A: two pairs
of GE
2. The table below illustrates the maximum capacity of the Gb
interface in iBSC.
Dual Racks All IP Dual Racks TDM
600M 256M
3. The table below illustrates the maximum carriers, sites, call
traffic and BHCA.
Maximum
Carriers
Maximum
Sites
Maximum
Traffic
BHCA
3072 1536
15000
Erlang(based on
ZTE mode)
4200k

Chapter3 Hardware Structure
>> Cabinet Layout
>> Shelf
>> Boards
>> Shelves
3.1 Cabinet Layout
Figure 3 shows the structural layout of the iBSC cabinet.
FIGURE 3 CABINET LAYOUT

1. Power distribution box
2. Fan subrack
3. 1U blank subrack
4. Service subrack
5. Dust-proof sbrack
3.2 Shelf
Physically, the iBSC system consists of three types of shelves:
BCTC, BGSN and BPSN. Table 4 illustrates the functions of each
shelf.
TABLE 4 SHELF DESCRIPTION
Shelf Type Function
BCTC Completes the global operation and
maintenance of the system, provides
the global system clock, manages the
control plane, and responsible for the
switch between the control plane and the
Ethernet
BGSN Completes system access and builds
various universal service processing
subsystems
BPSN Provides a large capacity non-blocking IP
switch platform for the system
3.3 Boards
Boards are installed in shelves. According to assembly relations,
boards are classified into front boards and rear boards. Front and
rear boards are inserted into the backplane through slots. Indica-
tors are installed on the panel of the front board. Rear boards are
supplementary to front boards by providing external signal inter-
faces and debugging interfaces that connect different shelves in a
rack or different racks.
Table 5 illustrates boards in the iBSC system.
TABLE 5 IBSC BOARD LIST
Board ID Meaning Functions Board
Function
Name
Rear Board
IPBB
IPAB
IPGB
GIPI GE IP
interface
board
It provides
the iBSC
system
with GE
interfaces.
Each GIPI
board
provides
one Gigabit
external
electrical
or optical
port, and
IPI
RGER

Chapter 3 Hardware Structure
Function
Name
Rear Board
one internal
user plane
Gigabit
electrical
port
EIPI E1 IP
interface
board
Provides
IP access
via the E1
connection
EIPI -
RCHB1CHUB Control
plane HUB
The CHUB
works to-
gether
with the
UIMC/GUIM
to be re-
sponsible
for con-
trol plane
data stream
exchange
and conver-
gence in the
system.
CHUB
RCHB2
RCKG1CLKG Clock
Generator
Implements
iBSC system
clock
function
CLKG
RCKG2
RCKG1ICM Integrated
Clock
Module
Implements
iBSC system
clock
function,
with a GPS
transceiver
ICM
RCKG2
CMP Control Main
Processing
Board
Controls
and
manages
service calls
in the PS
and CS
fields, and
manages
the
resources
of BSSAP,
BSSGP and
the system.
CMP -
DTB Digital trunk
board
Each DTB
provides
32 E1
interfaces.
DTB RDTB

Function
Name
Rear Board
GLI Gigabit Line
Interface
Board
Provides
interfaces
and
processing
functions
for each
resource
shelf.
GLI -
BIPB2
AIPB
DRTB2
UPPB2
GUP2 GSM
Universal
Processing
board
Implement
code
conversion,
TDM and
IP packet
conversion,
user plane
protocol
processing,
RTP protocol
processing
and
packaging.
TIPB2
-
OMP Operation
and Mainte-
nance Pro-
cessor
Provides
system
global pro-
cessing
function.
It provides
one external
FE interface
that con-
nects to the
Operation
and Mainte-
nance Sys-
tem, and
directly or
indirectly
monitors
and man-
ages boards
in the sys-
tem.
OMP RMPB
PSN PSN Packet
Switch
Network
Implements
large-
capacity
user data
switch
PSN -
SDTB2 Sonet
Digital
Trunk Board
Provides
two 155M
STM-1
standard
interfaces.
SDTB2 RGIM1

Function
Name
Rear Board
SPB2
GIPB2
SPB2 Signaling
Process
Board
Implements
message
processing
function and
external E1
interface
function
LAPD2
RSPB
SBCX Server
board
Saves files
of the OMP
board, and
organize
these files
according to
the formats
required by
the Oper-
ation and
Mainte-
nance Sys-
tem.
SBCX RSVB
RUIM2UIMC Universal
Interface
Module for
Control
Plane
Provides an
exchange
platform for
the control
shelf and
the packet
switch shelf
UIMC
RUIM3
RGUM1GUIM Gigabit
Universal
Interface
Module
Provides
internal
exchange
platform
for resource
shelf.
GUIM
RGUM2
Note:
A board has two names: a hardware name and a functional
name.The hardware name is the board ID. The functional name
describes the function of the board after software is loaded.
The same hardware board can provide different functions when
different software programs are loaded.

3.4 Shelves
3.4.1 Shelf Overview
3.4.1.1 Shelf Functions
The shelf combines boards into different functional units with the
aid of the backplane. It provides a good running environment for
the boards. Each shelf contains 17 standard board slots.
3.4.1.2 Shelf Classification
The iBSC system contains three types of shelves: control
shelf (BCTC), Gigabit resource shelf(BGSN) and packet switch
shelf(BPSN).
Table 6 illustrates the classification and functions of the shelves.
TABLE 6 SHELF DESCRIPTION
Shelf Type Function
Control Shelf (BCTC)
Completes the global operation and
maintenance of the system, provides the
global system clock, manages the control
plane, and responsible for the switch
between the control plane and the Ethernet
Gigabit Resource Shelf
(BGSN)
Completes system access and builds
various universal service processing
subsystems (user plane data in the shelf
uses Gigabit switch).
Packet Switch Shelf
(BPSN)
Provides a large capacity non-blocking IP
switch platform for the system
3.4.1.3 Shelf Positions
Figure 4 shows the positions of different shelves in iBSC.

FIGURE 4 SHELF POSITIONS
3.4.1.4 Shelf Backplane
The backplane is an important component of a shelf, Circuit boards
in the same shelf are interconnected through printed circuits in the
backplane, which greatly reduces the use of cables and increases
operation reliability.
Figure 5 illustrates the structure of a backplane.
FIGURE 5 BACKPLANE STRUCTURE
1. Backplane fastening screw
2. Backplane connector
3. Board alignment hole
4. Backplane connector
The shelf corresponds to the backplane one by one. Table 7 illus-
trates their corresponding relationships.

TABLE 7 CORRESPONDING RELATIONS BETWEEN SHELVES AND BACKPLANES
Shelf Backplane
Switch shelf
Back panel for packet switch
net (BPSN)
Control shelf
Back panel for control center
(BCTC)
GE Resource Shelf
Back Panel for GE general
service net (BGSN)
3.4.2 Shelf Description
3.4.2.1 Control Shelf (BCTC)
As the control center of iBSC, the control shelf manages and con-
trols the entire system. It is responsible for the control plane sig-
naling processing and operation& maintenance of the iBSC system,
provides system clock and synchronizes clock signals, and serves
as part of the distributed processing platform.
Each iBSC system should have a control shelf that is located in
Shelf 1 of the No. 1 rack.
Configurations Table 8 illustrates boards in the control shelf.
TABLE 8 CONTROL SHELF BOARDS
Front Board Rear Board Backplane
Operation and Main-
tenance Processor
(OMP)
Rear Board of OMP
(RMPB)
Control Main Process-
ing Board (CMP) -
Universal Interface
Module for Control
Plane (UIMC)
UIM Rear Board 2
(RUIM2)
UIM Rear Board 3
(RUIM3)
Control plane HUB
(CHUB)
Rear board of CHUB
1 (RCHB1)
Rear board of CHUB
2 (RCHB2)
Clock Generator board
(CLKG)
CLKG Rear Board 1
(RCKG1)
CLKG Rear Board 2
(RCKG2)
Integrated Clock Mod-
CLKG Rear Board 1
Back panel for con-
trol center (BCTC)

ule (ICM)
(RCKG1)
CLKG Rear Board 2
(RCKG2)
Server board (SBCX)
Rear board of Server
Blade (RSVB)
Figure 6 illustrates the configurations of the control shelf.
FIGURE 6 CONTROL SHELF CONFIGURATIONS
The following describes boards in the control shelf.
1. Two OMP boards must be installed in Slots 11 and 12, which
work in the active/standby mode.
2. Two to four CMP boards should be installed in Slots 1 through
4 in the active/standby mode. The specific quantity is deter-
mined based on system capacity.
Note:
If the capacity needs expansion, the CMP boards can be
installed in other shelves (the packet switch shelf is recom-
mended).
3. Two SBCX boards must be installed in Slots 5 and 7, which
4. Two CLKG/ICM boards must be installed in Slots 13 and 14,
which work in the active/standby mode.

Note:
Use CLKG(ICM) board pairs or ICM board pairs. Different
boards cannot be used together.
5. Two CHUB boards must be installed in Slots 15 and 16, which
6. Two UIMC boards must be installed in Slots 9 and 10, which
7. One RUIM2 board must be installed in Slot 9.
8. One RUIM3 board must be installed in Slot 10.
9. Two RMPB boards must be installed in Slots 11 and 12.
10. One RCKG1 board should be installed in Slot 13.
11. One RCKG2 board should be installed in Slot 14.
12. One RCHB1 board should be installed in Slot 15.
13. One RCHB2 board should be installed in Slot 16.
14. Two RSVC boards should be installed in Slots 5 and 7.
15. One RBID board should be installed on the BCTC.
Principles Figure 7 illustrates the working principles of the control shelf.
FIGURE 7 CONTROL SHELF PRINCIPLES
1. Communication between shelves

i. The iBSC system can be configured with one pair of
CLKG/ICM boards.The CLKG/ICM boards are usually in-
stalled in the control subrack, and distributes system
clock signals to the packet switch network and the Gigabit
resource shelf.
ii. The OMC2 network interface on the rear board of OMP is
connected to the OMP1 network interface on the rear board
of SBCX through the HUB; the OMC1 network interface on
the rear board of SBCX is connected to the external network
through another HUB to separate intranet segments and
Internet segments. The OMM is installed on the SBCX.
iii. The CHUB acts as the control stream convergence center
for the control streams from the switch shelf, the Gigabit
resource shelf and the control shelf.
2. Intra-shelf communication
i. The BCTC backplane bears the signaling processing board
and main control modules. It is responsible for the conver-
gence and processing of the control plane, and serves as
part of the distributed processing platform in a multi-shelf
device.
ii. The UIMC board is the signaling exchange center of the
control subrack. It exchanges information between mod-
ules.
iii. The OMP board implements the control related to the op-
eration and maintenance of the entire system (including
operation and maintenance agent).
As the processing core of iBSC operation & maintenance,
the OMP board directly or indirect monitors and manages all
boards in the system. It provides two links (Ethernet inter-
face and RS485) for configuration management of system
boards.
iv. The SBCX serves as the OMM server. It also stores files for
the OMP and organizes these files according to the formats
required by the OMM.
v. The CMP board connects with the control plane switch unit
and processes all protocols of the control plane.
Backplane The backplane of the control shelf if the BCTC board version
060201. Figure 8 shows the back view of the BCTC.

FIGURE 8 BCTC BACK VIEW
1. Power Interfaces
Table 9 illustrates the power interfaces of the control shelf.
TABLE 9 POWER INTERFACES OF THE CONTROL SHELF
Interface
ID Purpose Connection Relations
X1, X2 Power socket
Through the subrack power filter,
X1 and X2 parallel connect to the
-48 V, -48 VGND and PE signal
pole of rack bus bar.
2. Backplane DIP Switches
The DIP switches are located on the RBID, as shown in Figure
9.

FIGURE 9 DIP SWITCH LAYOUT ON RBID
Table 10 illustrates the DIP switches on the backplane.
TABLE 10 BACKPLANE DIP SWITCH DESCRIPTION
DIP
Switch
Name Purpose Example
S1/X2
Configure the
office infor-
mation of the
shelf
S2/X3
The informa-
tion of the rack
holding the
shelves
S3/X4
Shelf informa-
tion
Four-digit switch
S1 uses the left three digits only/X2
uses the lower three digits only
S2/X3 uses all four digits
S3 uses the left two digits only/X4
uses the lower two digits only
All digits of S1/X2 are all switched
to "ON": the binary value of
the DIP is "0000";
All digits of S2/X3 are all switched
to "ON": the binary value of
the DIP is "0000";
The left two digits of S3/X4 are
all switched to "OFF" and other
digits are "ON": the binary value
of the DIP is "11".
The DIP switches of S1/X2, S2/X3
and S3/X4 are respectively 0, 0

DIP
Switch
Name Purpose Example
and 3. All the actual rack numbers
should add 1, so this configuration
means: office 0, rack 1, shelf 4.
Note:
Backplanes BPSN, BCTC and BGSN all have DIP switches with
the same ON/OFF setting method.
OFF: move the switch downward, representing "1";
ON: move the switch upward, representing "0".
Jumpers may also be used to set shelf information of the site.
In this case, one jumper path represents one digit. Three
four-path jumpers are available, which represent the office in-
formation, rack information and shelf information. See Table
10 for specific meanings of the jumpers.
OFF: plug off the short-circuited module, representing "1";
OFF: plug on the short-circuited module, representing "0".
3.4.2.2 Switch Shelf (BPSN)
The packet switch shelf provides the IP switching function for the
user plane data in each functional entity in the iBSC system, and
provides corresponding QoS functions for different users.
Each iBSC system must be configured with one packet switch shelf
that is installed on the fourth level of the active cabinet.
Configurations Table 11 illustrates boards that can be configured in the packet
switch shelf.
TABLE 11 BOARDS FOR THE PACKET SWITCH SHELF
Packet Switch Net-
work (PSN) Board -
Gigabit line interface
board (GLI) -
Control Main Process-
ing Board (CMP) -
Universal Interface
Module for Control
Plane (UIMC)
UIM Rear Board 2
(RUIM2)
UIM Rear Board 3
(RUIM3)
Back panel for packet
switch net (BPSN)
Figure 10 illustrates the configurations of a packet switch shelf.

FIGURE 10 PACKET SWITCH SHELF CONFIGURATIONS
1. The packet switch shelf provides a Level 1 IP switch platform
for the user plane expansion of multiple resource shelves. It
can also directly provide external high-speed interfaces. Each
pair of GLI boards provide eight pairs of active/standby optical
interfaces. Three pairs of GLI boards provide 24 pairs of opti-
cal interfaces that connect with the 24 active/standby optical
interfaces on the GUIM boards in the six-level resource shelf.
Each GUIM board uses two pairs of optical interfaces.
2. Description of board configurations in the shelf
i. Two UIMC boards must be installed, which are responsible
for the control plane switch of the packet switch shelf. They
work in the active/standby mode and are inserted into Slots
15 and 16.
ii. Two PSN boards must be installed, which are responsible
for the data exchange between line cards. They work in
the load sharing mode and are inserted into Slots 7 and 8.
iii. Two to six GLI boards that serve as GE line cards. They can
be installed in Slots 1 through 6, and their quantity can be
chosen according to capacity needs. However, they must
be installed in pairs, and added from the left slot to the
right to work in the load sharing mode.
iv. 0 to two CMP boards that work in the active/standby mode.
One pair of CMP boards should be installed for every 1024
carriers. They should be installed in Slots 11 through 14.
v. One RUIM2 board must be installed in Slot 15.
vi. One RUIM3 board must be installed in Slot 16.
vii. One RBID board must be installed on the BPSN.
Principles Figure 11 illustrates the working principles of the packet switch
shelf when the Gigabit resource shelf is used.

FIGURE 11 PACKET SWITCH SHELF WORKING PRINCIPLES
i. The resource shelves are connected to the GLI boards in
the switch shelf through the optical interfaces on the front
panel of the GUIM boards.
ii. The control shelf is connected to the UIMC board in the
switch shelf through RCHB1 and RCHB2, which are rear
boards of CHUB.
iii. Clock signals re connected to the UIMC board in the switch
shelf to implement signal transmission through RCKG1 and
RCKG2, which are rear boards of the CLKG/ICM board.
i. User plane data
– The packet switch shelf processes user plane data re-
ceived through the GLI board.
– The data is then sent to the PSN to be switched through
the high-speed signal cables on the backplane.
– At last, the GLI board receives data from the PSN, pro-
cesses the data and then sends to the target port.
ii. Control plane data
The UIMC switch is the process to use the Ethernet bus as
the internal control bus of the subsystem, which connects
to various modules in the subsystem to distribute and col-
lect information, manage system configuration and main-
tenance, and meanwhile implements higher-layer protocols
and transmits signaling data.
Backplane The backplane of the packet switch network is BPSN version
070200. Figure 12 shows the backview of the BPSN.

FIGURE 12 BPSN BACK VIEW
1. Backplane Interfaces
Table 12 illustrates the power supply interfaces of the packet
switch shelf.
TABLE 12 POWER SUPPLY INTERFACES IN PACKET SWITCH SHELF
Interface
ID Purpose Connection Relations
X1, X2, X3
Power
socket
Through the subrack power filter, X1,
X2 and X3 parallel connect to the -48
V, -48 VGND and PE signal pole of rack
bus bar.
2. Backplane DIP Switch
The DIP switches on the BPSN are located on the RBID (X2,
X3 and X4). They are used to set the office, rack and rack
of the shelf. For setting methods, see "Backplane DIP Switch
Description".
3.4.2.3 Gigabit Resource Shelf (BGSN)
As the universal service shelf, the Gigabit resource shelf supports
multiple service processing modules to form various universal ser-

vice processing subsystems. It can be installed with the Abis in-
terface unit, A interface unit, PCU (GIU), TC unit and Ater interface
unit.
There is no special restriction on its location. It is usually located
in Level 1 and Level 3 of No. 1 rack and any level in No. 2 rack.
Configurations Table 13 describes boards that can be configured in the Gigabit
resource shelf.
TABLE 13 GIGABIT RESOURCE SHELF BOARDS
Digital Trunk Board
(DTB)
Digital Trunk Rear
Board (RDTB)
Sonet Digital Trunk
Board(SDTB2)
General Rear Interface
Module 1 (RGIM1)
Gigabit Universal
Interface Module
(GUIM)
Rear board of GUIM 1
(RGUIM1), Rear board
of GUIM 2 (RGUIM2)
GSM Universal
Processing board
(GUP2) -
Single port GE Line
Interface Board
(GIPI)
Resource shelf GE Rear
card (RGER)
MNIC Rear Board
(RMNIC)
Signaling Processing
Board (SPB2)
Rear Board of SPB2
(RSPB)
E1 IP interface
board (EIPI) -
Operation and Main-
tance Processor
(OMP)
Rear Board of OMP
(RMPB)
Control Main Pro-
cessing Board (CMP) -
Back Panel for GE gen-
eral service net (BGSN)
Multiple configuration methods can be applied to the Gigabit re-
source shelf. The following is a configuration wherein E1 or IPoE is
adopted for the Abis interface, and E1 is adopted for the A inter-
face and the Gb interface.Figure 13 illustrates the configurations
of a Gigabit resource shelf.

FIGURE 13 GIGABIT RESOURCE SHELF CONFIGURATION
The following describes boards in the Gigabit resource shelf.
1. Two GUIM boards must be installed in Slots 9 and 10, which
work in the active/standby mode. The GUIM boards connect
to the Level 1 switch through multiple-mode optical cables.
2. The DTB can be installed in Slots 9, 10, 15 or 16. The number
of consecutive DTBs should not exceed three. Slots 1 and 17
may cause wiring difficulties, so they should be avoided when
installing the DTBs. Each shelf should configure six DTBs (the
maximum allowed DTBs is eight).
3. The SDTB2 board can be installed in Slots 9, 10 or 17, which
work in the active/standby mode. Two pairs of single-mode
optical cables can be led out of the SDTB2 panel. If the STDB2
boards are not configured in the active/standby mode, when
they are installed in the active and standby slots, their adjacent
active and standby slots cannot use boards that utilize the HW
lines, such as DTB, GUP2, SPT2 and EIPI.
4. The GUP2 board can be installed in Slots 9, 10, 1 or 17.
5. SPB2 can be inserted into any slot except slots 9 and 10, but
only one SPB can be inserted into slot 15 or 16.
6. The GIPI boards can be inserted into any slot except slots 9 and
10, but only one GIPI board can be inserted into slot 15 or 16.
The GIPI panel has one Gigabit optical interface, or the RGER
can be configured to provide one Gigabit electrical interface,
or the RMINC can be configured to provide four FE electrical
interfaces that work in the active/standby mode.
When GIPI board provides OMCB channels or connects with the
MR server, it can be inserted in Slots 5 through 8 and Slots 13
and 14, and work in the active/standby mode. In this case, the
GIPI board uses RMNIC as its rear board and provides eight FE
interfaces, four for internal connection and four for external
connection.

7. The EIPI boards can be inserted into any slot except slots 9
and 10, but only one EIPI board can be inserted into slot 15 or
16.
8. If an office contains one shelf or two shelves, the OMP boards
must be installed in Slots 11 and 12, and the CMP boards may
be installed in Slots 11 through 14 as required.
9. If SDTB2, SPB2, GIPI, EIPI or GUP2 boards are installed in
Slots 15 or 16, then the TDM board cannot extract line 8 K
clock reference and the serial port in Slot 16 cannot be used.
10. One RGUM1 and one RGUM2 board must be installed in Slots
9 and 10.
11. RDTB, RSPB and RGER/RMNIC boards must be installed if their
front boards are installed.
12. The rear board of the SDTB2 board, namely RGIM1, extracts
the 8 K clock of the STM-1 line, so it is not needed if line clock
extraction is not necessary. If the system has more than one
SDTB2 board, two RGIM1 boards should be installed, and two
clock extraction lines should be connected.
13. One RBID board must be installed on the BGSN.
Principles Figure 14 illustrates the working principles of the Gigabit switch
resource shelf.
FIGURE 14 GIGABIT RESOURCE SHELF PRINCIPLES
i. The GUIM board provides the control Ethernet channel that
connects to the CHUB boards in the control stream conver-
gence center of the control shelf.
The GUIM board interconnects with the GLI board in the
BPSN to carry out level 1 switch between different resource
boards.
ii. DTB and SPB2 boards provide E1 interfaces.
iii. The SDTB2 board provides STM-1 access.
iv. The GIPI board provides GE access.

v. The EIPI board provides E1/T1 based IP access, which is
completed with aid from the DTB or the SDTB2 board.
vi. The CLKG/ICM board in the control shelf distributes system
clock signals to Gigabit resource shelves.
i. As the backplane of the Gigabit resource shelf, the BGSN
supports multiple service processing modules to form var-
ious universal service processing subsystems.
ii. The GUIM board is the convergence and switch center for
various data in the BGSN. It completes the information ex-
change between modules.
iii. The GUP2 board processes user plane related radio proto-
cols, TC code conversion and rate adaptation, and conver-
sion from TDM to IP packets.
iv. The GIPI board provides one Gigabit electrical interface or
four FE interfaces to the internal media plane through the
backplane.
Backplane The backplane of the Gigabit resource shelf is BGSN. Figure 15
shows the back view of the BGSN.
FIGURE 15 BPSN BACK VIEW
1. Backplane Interfaces
Table 14 illustrates the power interfaces of the Gigabit resource
shelf.

TABLE 14 POWER INTERFACES OF THE GIGABIT RESOURCE SHELF
Interface ID Purpose Connection Relations
X1, X2, X3 Power socket
Through the subrack power filter,
X1, X2 and X3 parallel connect
to the -48 V, -48 VGND and PE
signal pole of rack bus bar.
2. Backplane DIP Switches
The DIP switches on the BGSN are located on the RBID (X2,
X3 and X4). They are used to set the office, rack and rack
of the shelf. For setting methods, see "Backplane DIP Switch
Description".
3.4.3 Inter-Shelf Connections
Internal cables of iBSC are used for signal interconnection between
internal boards of the system.
Internal cable connections for the resource shelf (BUSN) and the
GE resource shelf are different, which will be discussed in the fol-
lowing.
3.4.3.1 Internal Connections
One Cabinet 1. For the configuration of one cabinet, internal cables in the iBSC
system include:
i. Clock distribution cable and line clock extraction cable;
ii. Control-plane Ethernet cable;
iii. User-plane optical fiber;
iv. Monitoring cable.
2. Connection Case Description
i. Clock Extraction and Distribution
Figure 16 illustrates the clock extraction and distribution
connections for a single cabinet of iBSC.

FIGURE 16 CLOCK EXTRACTION AND DISTRIBUTION FOR IBSC
WITH A SINGLE CABINET
Note:
In Figure 16, CLKG(ICM) board can be replaced with ICM;
both CLKG(ICM) and ICM can provide clock signals. This
applies to other parts of this section.The DTB, STDB, SDTB2
and SPB2 can all extract clock signals for the CLKG(ICM) or
the ICM. The figure shows only the DTB.
The clock extraction method is as follows:
– Clock reference for clock extraction
Extracts the CN line clock from the interface board, and
then sends it to the CLKG(ICM)/ICM board.
The CLKG(ICM)/ICM board can also input BITS clock
reference or obtain clock reference from the GPS mod-
ule.
– Clock Distribution
Clock signals are transmitted to the GUIM/UIMC boards
in the shelves from RCKG1 and RCKG2 boards through
the clock cables, and then distributed to slots in the
local shelf through the GUIM/UIMC boards.
ii. Control plane Ethernet interconnection
Figure 17 illustrates the Ethernet interconnection of the
control plane.

FIGURE 17 CONTROL PLANE ETHERNET INTERCONNECTION FOR
IBSC WITH ONE CABINET
In Figure 17, solid lines represent cable connections while
dotted lines represent connections using the printed lines
on the backplane.
The Ethernet interconnection for the control plane of the
iBSC system is implemented by the CHUB board. Inter-
connection modes are as follows:
– Connect the GUIM in the Gigabit resource shelf or the
UIMC in the packet switch shelf with the CHUB through
cables.
– Connect the UIMC in the control shelf with the CHUB
directly through printed lines on the backplane.
iii. User plane interconnection
Figure 18 illustrates the user plane connection of iBSC with
one cabinet.
FIGURE 18 USER PLANE CONNECTION OF IBSC WITH ONE CABINET

The user planes in the same Gigabit resource shelf are in-
terconnected through the backplane; User planes in dif-
ferent Gigabit resource shelves are interconnected through
the GLI and PSN boards in the packets switch shelves, that
is, through cables that connect the GUIM boards in the Gi-
gabit resource shelves with the GLI boards.
iv. Connection of the Monitoring Cables
Figure 19 illustrates the monitoring cable connection of
iBSC with one cabinet.
FIGURE 19 MONITORING CABLE CONNECTION OF IBSC WITH ONE
CABINET
The fan subracks and power distribution subracks are con-
nected with cables in order to monitor the fans.
The OMP board is connected with the PWRD board in the
power distribution subrack in order to monitor the PWRD
board.
Sensors are connected to the power distribution subrack in
order to monitor the peripheral environment.
Dual Cabinets 1. For the configuration of dual cabinets, the cables between iBSC
cabinets include the following:
i. Clock distribution cable and line clock extraction cable;
ii. Control-plane Ethernet cable;
iii. User-plane optical fiber;
iv. Monitoring cable.
2. Connection Case Description
i. Clock Distribution
Figure 20 illustrates the clock extraction and distribution
connections for iBSC with dual cabinets.

FIGURE 20 CLOCK EXTRACTION AND DISTRIBUTION FOR IBSC
WITH DUAL CABINETS
Each shelf in iBSC needs the system clock. The clock ex-
traction method is as follows:
– Clock reference for clock extraction
Extracts the CN line clock from the interface board, and
then sends it to the CLKG(ICM)/ICM board.
The CLKG(ICM)/ICM board can also input BITS clock
reference or obtain clock reference from the GPS mod-
ule.
– Clock Distribution
Clock signals are transmitted to the GUIM boards in
the Gigabit resource shelves or the UIMC boards in the
packet switch shelves from RCKG1 and RCKG2 boards
through the clock cables, and then distributed to slots
in the local shelf through the GUIM or UIMC boards.
ii. Control plane Ethernet interconnection
Figure 21 illustrates the control plane Ethernet intercon-
nection for iBSC with dual cabinets.

FIGURE 21 CONTROL PLANE ETHERNET INTERCONNECTION FOR
IBSC WITH DUAL CABINETS
In Figure 21, solid lines represent cable connections while
dotted lines represent connections using the printed lines
on the backplane.
The control plane Ethernet interconnection modes for iBSC
with dual cabinets are as follows:
– Connect the UIMC or GUIM boards in all the shelves
(except for the control shelf) in No. 1 rack with the
CHUB board.
– Connect the UIMC board in the control shelf of No. 1
rack with the CHUB directly through printed lines on the
backplane.
iii. User plane interconnection
Figure 22 illustrates the user plane interconnection for iBSC
with dual cabinets.
FIGURE 22 USER PLANE CONNECTION OF IBSC WITH DUAL
CABINETS

The user planes in the same Gigabit resource shelf are in-
terconnected through the backplane; User planes in dif-
ferent Gigabit resource shelves are interconnected through
the GLI and PSN boards in the packets switch shelves, that
is, through cables that connect the GUIM boards in the Gi-
gabit resource shelves with the GLI boards.
iv. Connection of the Monitoring Cables
Figure 23 illustrates the monitoring cable connection of
iBSC with dual cabinets.
FIGURE 23 MONITORING CABLE CONNECTION OF IBSC WITH DUAL
CABINETS
The fan subracks and power distribution subracks in each
cabinet are connected with cables in order to monitor the
fans.
In No. 1 rack, the OMP board is connected with the PWRD
board; In No. 2 rack, the PWRD board is connected to the
PWRD board in the No. 1 rack. Thus, the PWRD boards in
both cabinets can be monitored.
Sensors are connected to the power distribution subrack in
No. 1 rack in order to monitor the peripheral environment.

Chapter4 Software Structure
>> Front-End Software
>> Background Software
4.1 Front-End Software
Figure 24 illustrates the front-end software structure of iBSC.
FIGURE 24 IBSC FRONT-END SOFTWARE STRUCTURE
The front-end software of iBSC includes the following:
1. BSP&Drivers
The BSP subsystem performs hardware drive of the entire sys-
tem.It shields hardware operation details from the upper-layer
software modules, abstracts hardware functions, and provides
the logical functions of the hardware devices to other software
modules only.
2. Operation Support Subsystem (OSS)
The OSS works above the BSP subsystem and below all other
subsystems. It shields all device drive interfaces from user

processes. It is responsible for process communication, file
management, device drive and process invocation.
3. Bearer Subsystem (BRS)
The bearer subsystem provides IP and TDM bearer services
to the Service Support Subsystem, the Signaling Subsystem
and the OMS. Its functions include link layer functions, net-
work transmission, dynamic routing, ATM processing and traf-
fic control.
4. PP Subsystem
The PP Subsystem implements the following functions: man-
agement of the digital trunk interface, connection of switching
networks, provision of system clocks and corresponding man-
agement, environment control and power management.
5. System Control Subsystem (SCS)
The System Control Subsystem works above the OSS and the
Database Subsystem. It is responsible for the monitoring, start
and version download of the entire system.
6. Database Subsystem
The DBS works above the OSS. It is responsible for NE physical
resource management and the configuration management of
services, signaling and protocols. It also provides database
access interfaces to other subsystems.
7. Operation and Maintenance Subsystem (OMS)
Provides performance management, fault management, secu-
rity management, signaling tracing, and dynamic data obser-
vation functions. It implements the functions of the Operation
and Management System on the foreground.
8. Signaling Subsystem (SS)
The Signaling Subsystem works above the OSS, the DBS and
the BRS. It implements narrowband and broadband SS7 sig-
naling, call signaling, IP signaling and gateway control signal-
ing, and provides services to the RAN Control Plane Subsystem
(RANC) and the RAN Service Support Subsystem (RANSS).
9. RAN Control Plane Subsystem (RANC)
The RAN Control Plane Subsystem processes the Level 3
control plane protocols and controls call signaling connec-
tion, including radio resource management, dynamic channel
resource adjustment, load control, access control, handover
decision and signaling connection management.
10. RAN User Plane Subsystem (RANU)
For PS services, the RAN User Plane Subsystem is responsible
for mutual data forwarding and scheduling between the radio
and Gb interfaces according to QoS requirements.For CS ser-
vices, the RAN User Plane Subsystem provides the TC function
on the GUP board.
11. RAN Service Support Subsystem (RANSS)
It provides support for the control plane subsystem and the
user plane subsystem. It provides assurance for the smooth
ongoing of services, provides monitoring methods for various
services and, and completes the global flow processing of iBSC.

Chapter 4 Software Structure
Its functions include signaling tracing, load control, access con-
trol, performance measurement and global flow processing.
12. Micro-Code Subsystem (MCS)
The MCS implements quick processing of user plane data and
separates the control plane from the data plane.
4.2 Background Software
The background software, NetNumen(TM) M31, runs on the OMM
server and the client and communicates with the iBSC using the
TCP/IP protocols. Functions of NetNumen(TM) M31 include the
following:
1. Configuration Management
2. Fault Management
3. Performance Management
4. System Management
5. Log Management
6. Version Management
7. Topology Management
8. Security Management

This page is intentionally blank.

Chapter5 System Principle
>> Logical Units
>> Clock Distribution
>> User Plane Signaling Flow
>> Control Plan Signaling Flow
5.1 Logical Units
Figure 25 shows the hardware structure of iBSC.
FIGURE 25 HARDWARE SYSTEM STRUCTURE
Logically, the iBSC system is composed of six units.
1. Access Unit
The access unit provides the iBSC system with the access pro-
cessing function of the A-interface, Alter interface, Abis inter-
face and Gb interface. Access units of the iBSC system include
the A-Interface Unit (AIU) (when external TC is used, the AIU
belongs to the iTC system; iBSC adds the NSMU to the Ater
interface unit between it and the the iTC), the Abis Interface
Unit (BIU) and the Gb Interface Unit (GIU).
2. The switching unit provides a large-capacity and non-blocking
switching platform for the system.
3. The CMPU processes upper-layer protocols of the control plane.
4. The UPU processes user plane protocols in the PS field.

5. The operation & maintenance unit manages the iBSC system
and provides global configuration storage and OMC interfaces.
6. The peripheral monitoring unit inspects rack power supply and
the environment and reports alarms, and monitors and con-
trols the fans.
7. The TC unit completes code conversion and rate adaptation;
when external TC is adopted, this function is implemented by
iTC.
5.1.1 Operation and Maintenance Unit
The operation and maintenance unit consists of the OMP and the
SBCX.
The OMP processes the global procedure, controls the operation
and maintenance of the entire system, and connects to the SBCX
through 100M Ethernet to separate the Intranet from the Inter-
net.The OMP board acts as the core of operation and maintenance.
It directly or indirectly monitors and manages boards in the sys-
tem.
Figure 26 illustrates the communications between the operation
and maintenance unit and the client.
FIGURE 26 COMMUNICATIONS BETWEEN THE OPERATION AND MAINTENANCE
UNIT AND THE CLIENT
5.1.2 Processing Unit (CMPU)
The CMPU is implemented via the CMP board. It controls and man-
ages service calls in the PS and CS fields, and manages the re-
sources of BSSAP, BSSGP and the system.
5.1.3 Abis Interface Unit
Three types of Abis interfaces exist in iBSC: E1, IP and IPoE.
E1 Abis Figure 27 illustrates the hardware structure of the E1 Abis interface
unit (BIU).

Chapter 5 System Principle
FIGURE 27 E1 ABIS-INTERFACE UNIT HARDWARE STRUCTURE
The E1 Abis-interface unit consists of the DTB, the GUP and the
SPB.
1. The DTB completes E1 access.
2. LAPD signaling from the BTS is switched to the SPB through
the GUIM board in the local resource shelf. The SPB processes
LAPD signaling.
3. CS and PS services are switched to the GUP board through the
GUIM board in the local resource shelf. The GUP board finds
20ms TRU frames or PCU frames according to channel search,
and forms these frames into IP packets that are sent to the
TCU or UPU for processing.
IP Abis Figure 28 illustrates the hardware structure of the IP Abis-interface
unit.
FIGURE 28 IP ABIS INTERFACE HARDWARE STRUCTURE

The IP Abis interface unit is composed of the GIPI board and the
GUP board.
1. As the interface board, the GIPI board receives IP packets from
the BTS through the external Ethernet interface, and differen-
tiates user plane data from control plane data.
� UDP data is sent through the user plane switch network to
the GUP for processing.
� SCTP data is sent through the control plane switch network
to the CMP for processing.
2. On the uplink direction, the GUP divides the IP packet payload
that are composed based on carriers according to the channel,
and searches the 20ms TRU frames or PCU frames in each
channel. It then forms these frames into IP packets that are
sent to the TCU(UPU) for processing. The downlink direction is
just opposite.
IPoE Abis Figure 29 illustrates the hardware structure of the IPoE Abis inter-
face unit.
FIGURE 29 IPOE ABIS-INTERFACE UNIT HARDWARE STRUCTURE
1. The DTB completes E1 access.
2. The EIPI implements the conversion between PPP packets and
IP packets, and differentiates user plane data from control
plane data.
3. On the uplink direction, the GUP divides the IP packet payload
that are composed based on carriers according to the channel,
and searches the 20ms TRU frames or PCU frames in each
channel. It then forms these frames into IP packets that are

sent to the TCU(UPU) for processing. The downlink direction is
just opposite.
5.1.4 A-Interface Uits
Two types of A-interfaces exist in iBSC: E1 and IP.
E1 A Figure 30 illustrates the hardware structure of the E1 A-interface
unit.
FIGURE 30 E1 A-INTERFACE UNIT HARDWARE STRUCTURE
The E1 A-interface unit consists of DTBs (or SDTBs) and SPBs.
1. Packets from the PCM voice channel are received through the
E1 A interface on the DTB/SDTB and SPB, and then switched
to the TCU through the GUIM of the local resource shelf.
2. In principle, SS7 timeslots are received through the E1 A in-
terface on the SPB. The CPU on the CPU completes MTP2 pro-
cessing and then forms IP packets that are sent to the COMP
through the control plane switching network.SS7 timeslots can
also be received through the DTB/SDTB of the local shelf, and
then switched to the SPB through the GUIM of the local re-
source shelf.
IP A Figure 31 illustrates the hardware structure of the IP A-interface
unit.

FIGURE 31 IP A-INTERFACE UNIT HARDWARE STRUCTURE
The IP A interface unit is composed of GIPI boards and GUP boards.
1. The GIPI board completes IP access, and separates user plane
data from control plane data.
2. The GUP processes RTP and sends the processing result to the
BIU through the GUIM.
5.1.5 Packet Control Unit
The Packet Control Unit (PCU) includes two logical units: GIU and
UPU.
5.1.5.1 Gb Interface Unit
Two types of Gb interfaces exist in iBSC: E1 and IP.

E1 Gb Figure 32 illustrates the hardware structure of the E1 Gb interface
unit.
FIGURE 32 E1 GB INTERFACE HARDWARE STRUCTURE
The E1 Gb interface unit consists of SPBs.
The SPB completes E1 access, processes FR protocol, and sepa-
rates the user plane from the control plane for some data. It sends
user plane data through the user plane switch network to the GUP
for processing, and sends control plane data through the control
plane switch network to the CMP for processing.
IP Gb Figure 33 illustrates the hardware structure of the IP Gb interface
unit.

FIGURE 33 IB GB INTERFACE HARDWARE STRUCTURE
The IP Gb interface unit consists of CIPI boards. The GIPI board
completes IP access, and separates user plane data from control
plane data.
� UDP data is sent through the user plane switch network to the
GUP for processing.
� For SCTP data, some is sent through the control plane switch
network to the CMP for processing, and some is sent through
the user plane switch network to the GUP for processing.
5.1.5.2 Processing Unit
The Processing Unit (UPU) consists of UPPB2 boards. Its functions
include:
1. RLC/MAC Protocol processing
2. Partial BSSGP processing
3. Paging
4. Frame number synchronization

5.1.6 TransCoder Unit
The TransCoder Unit consists of GUP2(DRTB2) boards to imple-
ment code transformation and rate adaptation.
5.1.7 IP Switch Unit
The IP Switch Unit (PSU) provides a large-capacity and unblocked
IP switch network for system control management, communication
between service processing boards and traffic between multiple
access units.The PSU consists of two levels of switch subsystems.
The Level 1 Switch Subsystem consists of PSN and GLI boards
that provide management, core switch network board and line card
functions.
The Level 2 Switch Subsystem consists of UIMC, GUIM and CHUB
boards, and is responsible for the exchange and convergence of
user plane and control plane data flow in the system.
5.2 Clock Distribution
The system clock module of iBSC is on the CLKG/ICM board. The
CLKG board adopts the active/standby design, with the active and
standby boards locked to the same reference. The active and
standby clocks are directly connected using high impedance at the
output drive end to realize smooth switchover.
Figure 34 illustrates the clock signal flow of the system.

FIGURE 34 SYSTEM CLOCK SIGNAL FLOW DIRECTION
The flow direction is described as follows:
1. The CLKG board is responsible for supplying clock signals and
external synchronization functions. It extracts clock reference
via the A-interface and drives multiple channels of clock ref-
erence signals for use by the resource shelf and the packet
switch shelf after intra-board synchronization.
2. The clock signals are driven by the UIMC or GUIM to slots in
the local shelf through the backplane.
5.3 User Plane Signaling Flow
5.3.1 User Plane Signal Flow in the CS
Domain
Signal Flow
Observed from
Logical Units
Figure 35 illustrates the control plane signal flow in the CS Domain
observed from the logical units.

FIGURE 35 CONTROL PLANE SIGNAL FLOW IN THE CS DOMAIN (LOGICAL
UNITS)
The figure above shows the uplink signal flow, which is contrary to
the downlink signal flow.
The BIU severs user plane data from control plane data, and then
sends user plane data to the TCU, which processes such data and
then sends it to the AIU. Signal flow: 1®2.
Signal Flow
Observed from
Shelves
Figure 36 illustrates the user plane signal flow in the CS Domain
observed from the shelves.
FIGURE 36 USER PLANE SIGNAL FLOW IN THE CS DOMAIN (SHELVES)

5.3.2 User Plane Signal Flow in the PS
Domain
Signal Flow
Observed from
Logical Units
Figure 37 illustrates the control plane signal flow in the PS Domain
FIGURE 37 CONTROL PLANE SIGNAL FLOW IN THE PS DOMAIN (LOGICAL
UNITS)
The figure above shows the uplink signal flow, which is contrary to
the downlink signal flow.
The BIU severs CPU frames from all frames and sends them to the
UPU(UPPB) through the user plane switching network. The UPU
then separates PS Domain user plane data from CPU frames re-
ceived for further processing. After data processing is complete,
the data is sent to the GUI through the user plane switching net-
work.Signal flow: 1®2.

Signal Flow
Observed from
Shelves
Figure 38 illustrates the user plane signal flow in the PS Domain
FIGURE 38 USER PLANE SIGNAL FLOW IN THE PS DOMAIN (SHELVES)
5.4 Control Plan Signaling Flow
5.4.1 Control Plane Signal Flow in the
CS Domain
Signal Flow
Observed from
Logical Units
FIGURE 39 CONTROL PLANE SIGNAL FLOW IN THE CS DOMAIN (LOGICAL
UNITS)

Abis-interface signaling flow: Abis interface unit (BIU) sends sig-
naling in the LAPD channel to the CMP board as control plane data.
The CMP processes such data and sends some of it directly back
to the BIU (flow direction: 1®1). Some signaling data will be sent
to the AIU in the form of A-interface signaling flow (flow direction:
1®2).
A-interface signaling flow: The AIU processes the MTP2 part of
A-interface signaling, and then sends it to the CMP to complete the
processing of MTP3 and layers above. Some global processes need
the participation of the OMP. Its data flow direction is: 2®3®3®2
or 2®2.
Signal Flow
Observed from
Shelves
FIGURE 40 CONTROL PLANE SIGNAL FLOW IN THE CS DOMAIN (SHELVES)

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