Dual slope for DVM PPT

1. V. R. GAIKWAD
Dual Slope Analog to Digital
Converter
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2. Block Diagram
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3. Circuit Diagram
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4. Time Domain Analysis
t
V
T
V
RC
TV
RC
tV
tv
RC
TV
RC
tV
tv
VvTvv
RC
TV
Tv
TtVvv
vdv
RC
tv
inref
inref
o
inref
o
refio
in
o
ini
t
io
−=
−=
=
−−=
==
−=
===
+−= ∫
0)(
)(
;);()0(
)(
;;0)0(
)0(
1
)(
0
τ
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5. Reflection Spot
What is the resolution of 3 ½ digit DVM which can
measure input voltage from 0 V to 2 V
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6. Example
Specifications
 Maximum input voltage Vin
=2 V
 3 ½ digit display
 Measurement Cycles per
second (Sampling frequency)
fs=25 Hz
Design
 Measurement interval Ts
=1/fs=40 ms
 Integration duration of Vin
T= Ts/2=20 ms
 Integration duration of
Vref; tmax= T/2=10 ms
 Vref= -VinmaxT/ tmax=-4 V
 For N clock cycles in time
interval tmax; clock required
is fclk=N/ tmax=200
kHz Jul 23, 2016RC1130_007
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7. Reference
Design with Operational Amplifier and Analog
Integrated Circuit
 By Sergio Franco
Modern Digital Electronics
 By R. P. Jain
Introduction to System design using Integrated
Circuit
 By B. S. Sonde
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RC1130_007