1. RAVI PANDIT
Current Address: 117, 2nd
cross, Bhuvaneshwari Nagar,
C.V Raman Post, Bangalore, 560093 Contact: 07348822898
Permanent Address: C-2 Silver oaks Colony, Annapurna Road,
Indore (M.P.), 452009, Contact: 09977747069
Email: ravi.pandit85@gmail.com
Professional Objective
Seeking career enriching Techno-functional assignments to leverage Strong academic background while
contributing to a dynamic team to create tangible value for the organization.
Educational and Professional Credentials
ß PG Diploma in Embedded systems Design from CDAC-ACTS, Knowledge Park, Bangalore with
61.57%, July-2016.
ß Master of Technology (M.Tech) in Electronics & Instrumentation with specialization in
Microelectronics & VLSI Design, S.G.S.I.T.S Indore, with 75.36%, 2011.
ß Bachelor of Engineering (B.E.) in Electronics & Instrumentation, IIST Indore, with 70.56%, 2007.
ß Class XII, Balniketan H. Sec. School, Indore (M.P. Board), with 59.55%, 2002.
ß Class X, Balniketan H. Sec. School, Indore (M.P. Board), with 66.4%, 2000.
Specialized EDA Tools, Languages & Competencies
ß Design Tools : Cadence Virtuoso, Assura, Tanner(S- Edit, T-Spice, W- Edit), Xilinx 9.2i
ß High-Level Languages : VHDL
ß Simulators : Cadence Spectre, ISE simulator
ß Programming Languages : C, Embedded C
ß Computer Skills : MS tools MS Word, MS Excel, MS Power Point, OS Linux, Windows.
Training Rendered
ß Vocational training at L& T CASE EQUIPMENT PVT LTD, Pithampur, Indore. (July-august 2006).
ß Training on microcontroller based instruments in POWERTECH ELECTRONICS, INDORE. (July 2006).
ß Training at BSNL TELEPHONE EXCHG. Transport Nagar, Park road, Scheme no.54. (June 2005).
ß Training at manufacturing division of Transformers at FARM ELECTRONICS, INDORE. (June 2006).
Workshops /Conference Attended
ß 2 day workshop on Ubiquitous Computing (Ubicomp India), May 27-28, 2016, at CDAC Bangalore.
ß 4 day workshop on Low Voltage CMOS Circuit Designing, Oct 17-20, 2013, at IIT Roorkee.
ß National conference on Recent Trends in Electronics & Communication Technology, April 8-9, 2011, at
S.D.Bansal Institute of Technology & Science – INDORE (M.P).
Presented a paper on “Designing of Double P Channel CMOS op amp in 0.18 micron CMOS technology”
ß National Conference on Advances in Electrical & Electronics Engineering (AEEE-2011) Feb 24-25, 2011
At Swami Vivekananda College of Engineering - INDORE (M.P).
Presented a paper on “Designing of 1.5 V High Gain, Ultra Low Power two stage CMOS op amp”.
P.G Diploma Project
Title “AVR based Home Automation System”.
Platform Used Hardware Platform (AVR) , Embedded C.

2. Duration 1 Month
Description The main idea of our project is to automatically control and monitor electrical and
electronic home appliances. In our work we have used IR sensors, and output devices
(DC Motor, 16x2 Char LCD Display, Power Supply section etc.). Now we are going to
Interface all those with the brain of the system Microcontroller (i.e. ATmega16). With
the rotations of the motor we are controlling the turning on & turning off of bulb.
P.G Project
Title Design and Testing Techniques Of Field Programmable Analog Array Using 0.18µm
Technology
Tool Used
Role
Cadence virtuoso, Cadence Assura, Cadence Spectre Simulator.
Design, Simulation, Layout Extraction & Analysis.
Description A Voltage mode switched capacitor Field Programmable Analog Array (FPAA) to be
used to implement various analog circuits is being made.
U.G project
Title Solar Mobile Battery Charger
Technology Used Assembly level language coding in IC 89C51, Keil Compiler.
Role
Description
Understanding the specifications, Hardware Designing of project.
Used for charging battery equipped instruments through 89C51 microcontroller & Solar
plate of 330 mA & 8.3 V.
Experience
ß Worked in Oriental University Indore as an Assistant Professor in Electronics & Communication from
September 2011 to January 2016.
ß Worked in Shri Vaishnav Institute of Technology & Science, Indore, as lecturer in electronics &
instrumentation department from January 2008 to September 2009.
ß Worked in FARM Electronics as Trainee Engineer from July 2007 to December
Personal Profile
DOB 28th
September, 1985
Father’s Name Late Mr. Navin Pandit
Father’s occupation Advocate
Mother’s Name Mrs. Aradhna Pandit
Nationality Indian
Language Known English & Hindi
Declaration
I hereby declare that the above written information is true to the best of my knowledge and belief.
Date:
Place: Bangalore, India (Ready for relocation)
Yours sincerely,
[RAVI PANDIT]