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NAND Implementation The implementation of a Boolean function with NAND gates requires that the function be simplified in the sum-of-products form. Consider the Boolean function F = AB + CD + E

AND-OR-INVERT IMPLEMENTATION ,[object Object]

AND-OR-INVERT implementation ,[object Object]

NOR implementation ,[object Object],[object Object]

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Find all hazards in this circuit. Redesign the circuit as a three-level NOR circuit that is free of all hazards Show how four 2-to-1 and one 4-to-1 multiplexers could be connected to form an 8- to-1 MUX with three control inputs Solution 1 University of Wisconsin - Madison ECE/Comp Sci 352 Digital Systems Fundamentals Charles R. Kime Section 2 – Fall 2001 Chapter 2 – Combinational Logic Circuits – Part 7 Charles Kime & Thomas Kaminski © 2001 Prentice Hall, Inc Logic and Computer Design Fundamentals Logic and Computer Design Fundamentals © 2001 Prentice Hall, Inc Chapter 2-Part 7 2 NAND and NOR Implementation We found that we could implement general Boolean equations with these three primitives: • AND • OR • NOT In this section we will find that either of two gates, the NAND gate or the NOR gate can be used to implement arbitrary logic functions. We use the Positive Logic Convention (where all signals are active high) and a small circle to on a symbol to represent NOT or invert. 2 Logic and Computer Design Fundamentals © 2001 Prentice Hall, Inc Chapter 2-Part 7 3 NAND Gates The basic positive logic NAND gate is denoted by the following symbol: • AND-Invert (NAND) NAND comes from NOT AND, I. e., the AND function with a NOT applied. We call this symbol for a NAND gate an AND-Invert. The small circle represents the invert function. If we apply DeMorgan\'s Law we get: X Y Z X YZ = X + Y + Z F(X, Y,Z) = X Y Z Logic and Computer Design Fundamentals © 2001 Prentice Hall, Inc Chapter 2-Part 7 4 NAND Gates (Cont.) Applying DeMorgan\'s Law gives: • Invert-OR (NAND) We call this symbol for a NAND gate the Invert - OR since all inputs are inverted, followed by the OR function. Both symbols represent the NAND gate - it is sometimes more logically descriptive to use one form over the other. A NAND gate with one input degenerates to an inverter. X Y Z F(X, Y,Z) = X + Y + Z 3 Logic and Computer Design Fundamentals © 2001 Prentice Hall, Inc Chapter 2-Part 7 5 NAND Function Implementation NAND gates can implement a simplified Sum-ofProducts form. Constructing two level NAND-NAND gate circuit: The first level is two 2-input NAND gates using ANDInvert. The second level is one 2- input NAND gate using Invert-OR. Using the NAND relationship, we have: G(A,B,C,D) = AB CD = AB + CD = A B + CD A B C D G(A,B,C,D) = AB + CD Logic and Computer Design Fundamentals © 2001 Prentice Hall, Inc Chapter 2-Part 7 6 NAND Implementation (Cont.) In the implementation, note that the bubbles are on opposite ends of the same line. Thus, they can be combined and deleted: A B C D G(A,B,C,D) This form of the implementation is the Sum-of- Products form. 4 Logic and Computer Design Fundamentals © 2001 Prentice Hall, Inc Chapter 2-Part 7 7 NAND Implementation (Cont.) In the implementation, the bubbles are on opposite ends of the same line. By , they can be combined and deleted: A sum-of-products (SOP) form results To implement an equation like: F(A,B,C) = A + BC, the NAND for A degenerates t.

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Digital

1. NAND Implementation The implementation of a Boolean function with NAND gates requires that the function be simplified in the sum-of-products form. Consider the Boolean function F = AB + CD + E

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