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Multiple Choice Questions–
Chapter 1
Each question has four choices. Choose most appropriate choice of the answer.
1. An embedded system must have (a) hard disk (b) processor and memory (c)
operating system (d) processor and input-output unit(s).
2. An embedded system hardware can (a) have microprocessor or microcontroller or
single purpose processor (b) have digital signal processor (c) one or several
microprocessor or microcontroller or digital signal processor or single purpose
processors (d) not have single purpose processor (s).
3. An embedded system has RAM memory (a) for storing the variables during program
run, stack and input or output buffers, for example, for speech or image (b) for storing all the
instructions and data (c) for storing the programs from external secondary memory (d) for
fetching instructions and data into cache(s).
4. A system might be connected to a number of other devices and systems. (i) A bus
consists of a common set of lines to connect multiple devices, hardware units and
systems (ii) A bus is used for communication between two of these at any given
instance. (iii) A bus is used for communication between all of these at the same
instance (iv) A bus may be serial bus or parallel bus to transfer one bit or multiple
data bits at an instance, respectively.
(a) i, ii and iv correct (b) iii correct (c) iii and iv correct (d) all are correct.
5. A system must have an interrupt handling mechanism for executing the interrupt
service routines in case of the interrupts from (a) physical devices (b) interfaced
circuits or systems, software interrupt instructions and software exceptions (c)
physical devices or interfaced circuits or systems (d) physical devices or interfaced
circuits or systems, software interrupt instructions and software exceptions.
6. (i) Final machine implementable software for a product embeds in the ROM (or
PROM) as an image at a frame. Bytes at each address must be defined for creating the
ROM image. (ii) Since the coding in assembly language is very time consuming in
most cases, software is developed in a high-level language, 'C' or 'C++' or visual C++
2 Embedded Systems..Arhitecture, Programming and Design
or 'Java' in most cases. (iii) Since the coding should be modular, use top-down
programming approach or use object oriented the software is developed in a high-
level language, 'C' or 'C++' or visual C++ or 'Java' in most cases. (iv) Since the
coding needs to be completed fast and there is use of data structures and data type
definitions and declarations, the software is developed in a high-level language.
(a) i, ii and iv correct (b) all are correct (c) iii and iv correct (d) ii, iii and iv correct.
7. (i) A compiler generates an object file. (ii) The object file is linked with library
functions using linker. (iii) After re-allocation of addresses a locator sends the codes
to device programmer for burning as ROM image in embedded system ROM. (iv)
After re-allocation of addresses a loader loads the codes to device programmer for
burning as ROM image in embedded system ROM. (v) After re-allocation of
addresses a loader loads the codes in RAM.
Steps for embedded system development are steps (a) i, ii and iv (b) i, iii, iv and vi
(c) Steps i, ii and iii (d) i , ii and vi.
8. In a multitasking OS, (i) each process (task) has a distinct process control block (ii)
each process (task) has memory allocation of its own (iii) a task has one or more
functions or procedures for a specific job. (iv) a task may share the memory (data)
with other tasks. (iv) processor may process multiple tasks separately or concurrently
(v) each process (task) has a separate stack in memory (vi) a process calls another
process, which can call another process, similar to nested call of the functions.
(a) i, ii, iv and vi correct (b) all are correct except vi (c) iii, iv and v correct (d) ii, iii
and vi correct.
9. RTOS is used in most embedded systems when the system does (a) concurrent
processing of multiple real time processes (b) sequential processing of multiple
processes when the tasks have real time constraints (c) real time processing of
multiple processes (d) the concurrent processing of multiple processes, tasks have
real time constraints and deadlines, and high priority task preempts low priority task
as per the real time constraints.
10. (a) A file has a data structure depending on the operating system (a) A file is a set of
data records in the computer or embedded system (c) A file is a set of data records
Chapter 1 Solutions to Review Questions
3
stored at the hard disk. (d) A file is a virtual device, which has descriptor and data
structure, which sends the records (characters or words) to a data sink (for example, a
program structure), and which stores the data from the data source (for example, a
program structure).
11. A device driver is software for (a) opening or connecting or binding or reading or
writing or closing or other actions of the device (b receiving input or sending outputs
from device (c) access to parallel or serial port by the device (d) controlling and
configuring the device for read and write functions.
12. Device Manager is software (i) for allocating and registering port (in fact, it may be a
register or memory) addresses for the various devices at distinctly different addresses
(ii) codes for detecting the presence of devices (iii) for initializing these and for
testing the devices that are present (iv) codes for detecting any collision between the
device accesses in the system (v) managing driver functions of all physical and virtual
devices.
(a) v correct (b) i, iv and v correct (c) all correct (d) all correct except iv.
13. (a) Cross assembler converts object codes or executable codes to high level language
code and vice versa (b) Simulator simulates all functions of an embedded system
circuit including additional memory and peripherals. Simulation is independent of a
particular target system. (c) Assembler created assembled codes for the physical
addresses in the target system. (d) IDE is software used for integrated hardware
development and RTOS is for software development.
14. (i) Model/analyze requirements and specifications of system (ii) Design data
structure, software architecture, interfaces and algorithms (iii) Test the design (iv)
Implementation of design (v) component level design (vi) Test all internal logic and
external functions of the system and (vii) system integration
Activities during software design cycle are in sequence of (a) i to vii (b) i, ii, v,
iv, vii and vi (c) i, ii, v, iv, vi and vii (d) i, ii, v, iii, iv, vi and vii.
15. Design metrics are (i) engineering cost (ii) time to market (iii) power dissipation (iv)
flexibility (v) system and user safety (vi) performance (vii) prototype development
time (viii) maintenance of the system
(a) all (b) all except v and viii (c) iii and vi (d) all except i and ii
4 Embedded Systems..Arhitecture, Programming and Design
16. Total power dissipation reduced by (i) reducing operating voltages, (ii) operating at
lower clock frequency if processes meet the deadlines (iii) use of wait and stop
instructions when system is inactive or idle (iv) use of cache disabling instructions (v)
optimizing the amount and type of hardware required for the system
(a) all except v (b) i, ii and iii (c) all except iv (d) all
17. Besides the main microcontroller in digital camera, the following processors are used
in digital camera to enable taking pictures with higher resolution of 4 or 6 M Pixel
within required time interval (a) single purpose processors ─CCD signal processor,
CODEC and pixel display processor ( b) single purpose processors─ graphic and
display processors (c) DSPs (d) embedded processors
18. Sophisticated embedded systems development requires (b) IPs and several ASIPs, (b) IPs
and several ASIPs, and hardware-software co-design (c) multi-core processors (d) system on
chip with large memory
19. Cache (i) is a fast read and write on-chip memory for the processor execution unit (ii)
stores instructions and data fetched in advance from ROM or RAM for use of
execution unit and for data write back for RAM (iii) has advantage that processor
execution unit does not have to wait for instruction and data from external buses and
also does faster write back of data meant for RAM (iv) use is must in embedded
system with large memory requirements (v) has lower power dissipation compared to
RAM
(a) i, ii, iii and iv (b) i, iii, iv and v (c) i, ii, iii and v (d) i, ii and iii
20. A communication protocol specifies (i) the ways of communication of signals on the
bus (ii) ways of arbitration when several devices need to communicate through the
bus or the ways of polling from the devices need of the bus at an instance (iii)
memory requirement during communication (iv) minimum rate of data transfer during
communication (v) interrupt service mechanism
(a) i, ii, iii and iv (b) i, iii, iv and v (c) i and ii (d) i, ii and iii
Solutions to Multiple Choice Questions–
Chapter 1
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
Chapter 1 Solutions to Review Questions
5
b c a a d b c b d d
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
a c c b a d a b d c

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Chap01 objectivequestionsemsys2enew

  • 1. Multiple Choice Questions– Chapter 1 Each question has four choices. Choose most appropriate choice of the answer. 1. An embedded system must have (a) hard disk (b) processor and memory (c) operating system (d) processor and input-output unit(s). 2. An embedded system hardware can (a) have microprocessor or microcontroller or single purpose processor (b) have digital signal processor (c) one or several microprocessor or microcontroller or digital signal processor or single purpose processors (d) not have single purpose processor (s). 3. An embedded system has RAM memory (a) for storing the variables during program run, stack and input or output buffers, for example, for speech or image (b) for storing all the instructions and data (c) for storing the programs from external secondary memory (d) for fetching instructions and data into cache(s). 4. A system might be connected to a number of other devices and systems. (i) A bus consists of a common set of lines to connect multiple devices, hardware units and systems (ii) A bus is used for communication between two of these at any given instance. (iii) A bus is used for communication between all of these at the same instance (iv) A bus may be serial bus or parallel bus to transfer one bit or multiple data bits at an instance, respectively. (a) i, ii and iv correct (b) iii correct (c) iii and iv correct (d) all are correct. 5. A system must have an interrupt handling mechanism for executing the interrupt service routines in case of the interrupts from (a) physical devices (b) interfaced circuits or systems, software interrupt instructions and software exceptions (c) physical devices or interfaced circuits or systems (d) physical devices or interfaced circuits or systems, software interrupt instructions and software exceptions. 6. (i) Final machine implementable software for a product embeds in the ROM (or PROM) as an image at a frame. Bytes at each address must be defined for creating the ROM image. (ii) Since the coding in assembly language is very time consuming in most cases, software is developed in a high-level language, 'C' or 'C++' or visual C++
  • 2. 2 Embedded Systems..Arhitecture, Programming and Design or 'Java' in most cases. (iii) Since the coding should be modular, use top-down programming approach or use object oriented the software is developed in a high- level language, 'C' or 'C++' or visual C++ or 'Java' in most cases. (iv) Since the coding needs to be completed fast and there is use of data structures and data type definitions and declarations, the software is developed in a high-level language. (a) i, ii and iv correct (b) all are correct (c) iii and iv correct (d) ii, iii and iv correct. 7. (i) A compiler generates an object file. (ii) The object file is linked with library functions using linker. (iii) After re-allocation of addresses a locator sends the codes to device programmer for burning as ROM image in embedded system ROM. (iv) After re-allocation of addresses a loader loads the codes to device programmer for burning as ROM image in embedded system ROM. (v) After re-allocation of addresses a loader loads the codes in RAM. Steps for embedded system development are steps (a) i, ii and iv (b) i, iii, iv and vi (c) Steps i, ii and iii (d) i , ii and vi. 8. In a multitasking OS, (i) each process (task) has a distinct process control block (ii) each process (task) has memory allocation of its own (iii) a task has one or more functions or procedures for a specific job. (iv) a task may share the memory (data) with other tasks. (iv) processor may process multiple tasks separately or concurrently (v) each process (task) has a separate stack in memory (vi) a process calls another process, which can call another process, similar to nested call of the functions. (a) i, ii, iv and vi correct (b) all are correct except vi (c) iii, iv and v correct (d) ii, iii and vi correct. 9. RTOS is used in most embedded systems when the system does (a) concurrent processing of multiple real time processes (b) sequential processing of multiple processes when the tasks have real time constraints (c) real time processing of multiple processes (d) the concurrent processing of multiple processes, tasks have real time constraints and deadlines, and high priority task preempts low priority task as per the real time constraints. 10. (a) A file has a data structure depending on the operating system (a) A file is a set of data records in the computer or embedded system (c) A file is a set of data records
  • 3. Chapter 1 Solutions to Review Questions 3 stored at the hard disk. (d) A file is a virtual device, which has descriptor and data structure, which sends the records (characters or words) to a data sink (for example, a program structure), and which stores the data from the data source (for example, a program structure). 11. A device driver is software for (a) opening or connecting or binding or reading or writing or closing or other actions of the device (b receiving input or sending outputs from device (c) access to parallel or serial port by the device (d) controlling and configuring the device for read and write functions. 12. Device Manager is software (i) for allocating and registering port (in fact, it may be a register or memory) addresses for the various devices at distinctly different addresses (ii) codes for detecting the presence of devices (iii) for initializing these and for testing the devices that are present (iv) codes for detecting any collision between the device accesses in the system (v) managing driver functions of all physical and virtual devices. (a) v correct (b) i, iv and v correct (c) all correct (d) all correct except iv. 13. (a) Cross assembler converts object codes or executable codes to high level language code and vice versa (b) Simulator simulates all functions of an embedded system circuit including additional memory and peripherals. Simulation is independent of a particular target system. (c) Assembler created assembled codes for the physical addresses in the target system. (d) IDE is software used for integrated hardware development and RTOS is for software development. 14. (i) Model/analyze requirements and specifications of system (ii) Design data structure, software architecture, interfaces and algorithms (iii) Test the design (iv) Implementation of design (v) component level design (vi) Test all internal logic and external functions of the system and (vii) system integration Activities during software design cycle are in sequence of (a) i to vii (b) i, ii, v, iv, vii and vi (c) i, ii, v, iv, vi and vii (d) i, ii, v, iii, iv, vi and vii. 15. Design metrics are (i) engineering cost (ii) time to market (iii) power dissipation (iv) flexibility (v) system and user safety (vi) performance (vii) prototype development time (viii) maintenance of the system (a) all (b) all except v and viii (c) iii and vi (d) all except i and ii
  • 4. 4 Embedded Systems..Arhitecture, Programming and Design 16. Total power dissipation reduced by (i) reducing operating voltages, (ii) operating at lower clock frequency if processes meet the deadlines (iii) use of wait and stop instructions when system is inactive or idle (iv) use of cache disabling instructions (v) optimizing the amount and type of hardware required for the system (a) all except v (b) i, ii and iii (c) all except iv (d) all 17. Besides the main microcontroller in digital camera, the following processors are used in digital camera to enable taking pictures with higher resolution of 4 or 6 M Pixel within required time interval (a) single purpose processors ─CCD signal processor, CODEC and pixel display processor ( b) single purpose processors─ graphic and display processors (c) DSPs (d) embedded processors 18. Sophisticated embedded systems development requires (b) IPs and several ASIPs, (b) IPs and several ASIPs, and hardware-software co-design (c) multi-core processors (d) system on chip with large memory 19. Cache (i) is a fast read and write on-chip memory for the processor execution unit (ii) stores instructions and data fetched in advance from ROM or RAM for use of execution unit and for data write back for RAM (iii) has advantage that processor execution unit does not have to wait for instruction and data from external buses and also does faster write back of data meant for RAM (iv) use is must in embedded system with large memory requirements (v) has lower power dissipation compared to RAM (a) i, ii, iii and iv (b) i, iii, iv and v (c) i, ii, iii and v (d) i, ii and iii 20. A communication protocol specifies (i) the ways of communication of signals on the bus (ii) ways of arbitration when several devices need to communicate through the bus or the ways of polling from the devices need of the bus at an instance (iii) memory requirement during communication (iv) minimum rate of data transfer during communication (v) interrupt service mechanism (a) i, ii, iii and iv (b) i, iii, iv and v (c) i and ii (d) i, ii and iii Solutions to Multiple Choice Questions– Chapter 1 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
  • 5. Chapter 1 Solutions to Review Questions 5 b c a a d b c b d d 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. a c c b a d a b d c