Jennifer Rexford
Professor
Princeton University
Plenaries Session
ONS2015: http://bit.ly/ons2015sd
ONS Inspire! Webinars: http://bit.ly/oiw-sd
Watch the talk (video) on ONS Content Archives: http://bit.ly/ons-archives-sd
3. Programming
Protocol-Independent
Packet Processors
Jennifer Rexford
Princeton University
http://arxiv.org/abs/1312.1719
With Pat Bosshart, Glen Gibb, Martin Izzard, and Dan Talayco (Barefoot Networks),
Dan Daly (Intel), Nick McKeown (Stanford), Cole Schlesinger and David Walker
(Princeton), Amin Vahdat (Google), and George Varghese (Microsoft)
4. In the Beginning…
• OpenFlow was simple
• A single rule table
– Priority, pattern, actions, counters, timeouts
• Matching on any of 12 fields, e.g.,
– MAC addresses
– IP addresses
– Transport protocol
– Transport port numbers
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5. Over the Past Five Years…
3
Version Date # Headers
OF 1.0 Dec 2009 12
OF 1.1 Feb 2011 15
OF 1.2 Dec 2011 36
OF 1.3 Jun 2012 40
OF 1.4 Oct 2013 41
Proliferation of header fields
Multiple stages of heterogeneous tables
Still not enough (e.g., VXLAN, NVGRE, STT, ...)
7. Future SDN Switches
• Configurable packet parser
– Not tied to a specific header format
• Flexible match+action tables
– Multiple tables (in series and/or parallel)
– Able to match on all defined fields
• General packet-processing primitives
– Copy, add, remove, and modify
– For both header fields and meta-data
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8. We Can Do This!
• New generation of switch ASICs
– Intel FlexPipe
– RMT [SIGCOMM’13]
– Cisco Doppler
• But, programming these chips is hard
– Custom, vendor-specific interfaces
– Low-level, akin to microcode programming
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9. We need a higher-level interface
To tell the switch how we want it to behave
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10. Three Goals
• Protocol independence
– Configure a packet parser
– Define a set of typed match+action tables
• Target independence
– Program without knowledge of switch details
– Rely on compiler to configure target switch
• Reconfigurability
– Change parsing and processing in the field
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14. Simple Motivating Example
• Data-center routing
– Top-of-rack switches
– Two tiers of core switches
– Source routing by ToR
• Hierarchical tag (mTag)
– Pushed by the ToR
– Four one-byte fields
– Two hops up, two down
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up1
up2 down1
down2
ToR ToR
15. Header Formats
• Header
– Ordered list of fields
– A field has a name and width
header ethernet {
fields {
dst_addr : 48;
src_addr : 48;
ethertype : 16;
}
}
header mTag {
fields {
up1 : 8;
up2 : 8;
down1 : 8;
down2 : 8;
ethertype : 16;
}
}
header vlan {
fields {
pcp : 3;
cfi : 1;
vid : 12;
ethertype : 16;
}
}
16. Parser
• State machine traversing the packet
– Extracting field values as it goes
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parser start { parser vlan {
ethernet; switch(ethertype) {
} case 0xaaaa : mTag;
case 0x800 : ipv4;
parser ethernet { . . .
switch(ethertype) { }
case 0x8100 : vlan;
case 0x9100 : vlan; parser mTag {
case 0x800 : ipv4; switch(ethertype) {
. . . case 0x800 : ipv4;
} . . .
} }
}
17. Typed Tables
• Describe each packet-processing stage
– What fields are matched, and in what way
– What action functions are performed
– (Optionally) a hint about max number of rules
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table mTag_table {
reads {
ethernet.dst_addr : exact;
vlan.vid : exact;
}
actions {
add_mTag;
}
max_size : 20000;
}
19. Control Flow
• Flow of control from one table to the next
– Collection of functions, conditionals, and tables
• For a ToR switch:
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ToR
From core
(with mTag)
From local hosts
(with no mTag)
Source
Check
Table
Local
Switching
Table
Egress
Check
mTag
Table
Miss: Not Local
20. Control Flow
• Flow of control from one table to the next
– Collection of functions, conditionals, and tables
• Simple imperative representation
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control main() {
table(source_check);
if (!defined(metadata.ingress_error)) {
table(local_switching);
if (!defined(metadata.outport)) {
table(mTag_table);
}
table(egress_check);
}
}
22. P4 Compiler
• Parser
– Programmable parser: translate to state machine
– Fixed parser: verify the description is consistent
• Control program
– Target-independent: table graph of dependencies
– Target-dependent: mapping to switch resources
• Rule translation
– Verify that rules agree with the (logical) table types
– Translate the rules to the physical tables
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23. Compiling to Target Switches
• Software switches
– Directly map the table graph to switch tables
– Use data structure for exact/prefix/ternary match
• Hardware switches with RAM and TCAM
– RAM: hash table for tables with exact match
– TCAM: for tables with wildcards in the match
• Switches with parallel tables
– Analyze table graph for possible concurrency
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24. Compiling to Target Switches
• Applying actions at the end of pipeline
– Instantiate tables that generate meta-data
– Use meta-data to perform actions at the end
• Switches with a few physical tables
– Map multiple logical tables to a physical table
– “Compose” rules from multiple logical tables
– … into “cross product” of rules in physical table
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25. Related Work
• Abstract forwarding model for OpenFlow
• Kangaroo programmable parser
• Protocol-oblivious forwarding
• Table Type Patterns in ONF FAWG
• NOSIX portability layer for OpenFlow
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26. Conclusion
• OpenFlow 1.x
– Vendor-agnostic API
– But, only for fixed-function switches
• An alternate future
– Protocol independence
– Target independence
– Reconfigurability in the field
• P4 language: a straw-man proposal
– To trigger discussion and debate
– Much, much more work to do!
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