it involves the diffusion mechanism, fick's law, oxidation and ion implantation

1. IC TECHNOLOGY
DIFFUSION
AND
ION IMPLANTATION
By:
Kritica sharma
Assistant Professor (ECE)

2. CONTENTS
 Impurtiy doping
 Diffusion
 Ficks diffusion Equation in One Dimension
 Analytic Solution of Ficks Law
 Correction to simple theory .
 Diffusion in SiO2.
 Ion Implantation and Ion Implantation Systems:
The concept of ion implantation.
 The Ion Implanter.
 Comparison of diffusion and ion implantation.
 Possible motions of ions in the wafer.
 Ion stopping mechanisms.
 Implantation profiles.
 Advantages and disadvantages of ion implantation.

3. CONTD..
 Oxidation
 Growth mechanism and Deal-Grove Model of oxidation
 Linear and Parabolic Rate co-efficient
 Structure of SiO2
 Oxidation techniques and system
 Oxide properties

4. IMPURITY DOPING
 Two methods for introducing impurities into Si to control the
majority-carrier type and resistivity of layers:
 Diffusion: dopant atoms move from the surface into Si by
thermal means via substitutional or interstitial diffusion
mechanisms.
 Ion implantation: dopant atoms are forcefully added into
Si in the form of energetic ion beam injection.
4

5. NEED OF DOPING
 Formation of pn junction and fabrication of devices during
wafer fabrication.
 alter the type and level of conductivity of semiconductor
materials.
 form bases, emitters, and resistors in bipolar devices, as
well as drains and sources in MOS devices.
 dope polysilicon layers.
5

6. COMPARISON
6

7. DOPING PROFILES
7

8. DIFFUSION
 Diffusion: movement of a chemical species from an area of
high concentration to an area of lower concentration.
 The diffusion process begins with the deposition of a shallow
high concentration of the desired impurity in the Si surface
through windows etched in the protective barrier layer.
8

9. DIFFUSION MECHANISM
Interstitial diffusion (Na, Li)
Substitutional diffusion
9

10. DIFFUSION MECHANISM (CONTD.)
Interstitial-substitutional Diffusion
Diffusion by
dissociative
mechanism
(Cu, Ni)
Diffusion by kick-
out mechanism
(Gold and Platinum)

11. DIFFUSION MECHANISM (CONTD.)
 Interstitialcy Diffusion (B and P)
 Interchange Diffusion
 Grain Boundary Diffusion
 Combination effects

12. FICK’S FIRST LAW OF DIFFUSION
• Based on analogy between material transfer in a solution and heat
transfer by conduction.
J=rate of transfer of solute per unit area or diffusion flux
C=concentration of solute (function of x and t only)
x=coordinate axis in the direction of solute flow
t=diffusion time
D=diffusivity (Diffusion constant)
Statement: The local rate of transfer of solute per unit area per unit time
is proportional to the concentration gradient of the solute and defines
the proportionality constant as diffusivity of the solute. The negative
sign shows the flow towards lower concentration of solute.
12

13. LIMITATION OF FIRST LAW
 Though it describes diffusion process accurately.
 But, has no convenient measure of current density of the
impurity.
 Thus, second law developed to describe the concept with
more readily measurable quantities.
13

14. FICK’S SECOND LAW
 Consider a long bar of material with uniform cross-
sectional area A. For a small volume of length dx,
 J1 is the flux entering into the volume and J2 is the
flux leaving the volume. Then the continuity
equation gives,
2 1J J J
dx x
 


2 1( )
C J
Adx A J J Adx
t x
 
     
 

15. FICK’S SECOND LAW OF DIFFUSION
 Law of conservation of matter: change in solute concentration per
unit time= local decrease in diffusion flux in the absence of source.
 Combining with Fick’s first law,
 At low concentration of solute, diffusivity at a particular temperature
can be considered a constant
( , ) ( , )C x t C x t
D
t x x
   
     
2
2
( , ) ( , )C x t C x t
D
t x
 

 

16. FICK’S SECOND LAW OF DIFFUSION
 Fick’s second law of diffusion is given as:
Where, C = concentration of solute.
D = diffusivity
x = coordinate axis in the direction of
solute flow
t = diffusion time
2
2
( , ) ( , )C x t C x t
D
t x
 

 
16

17. ANALYTIC SOLUTION OF FICK’S LAW
 CASE I: When total diffusion source concentration (Cs) is fixed or for
constant diffusivity (D).
 Solution for constant diffusivity is done in three varieties:
 Constant surface concentration
 Constant total dopant
 Sheet resistance of diffused layer
17

18. ANALYTIC SOLUTION OF FICK’S LAW:
CONSTANT SURFACE CONCENTRATION
Where
x

 

18

19. DOSE OF DIFFUSION
 Dose is measured in units of impurities per unit area(per cm2).
 It varies with time of diffusion.
0
2
( ) ( , ) (0, )TQ t C x t dx C t Dt


 
19

20. IMPURITY DISTRIBUTION FOR CONSTANT
SURFACE CONCENTRATION
20

21. Analytic Solution of Fick’s law
• Solution for constant diffusivity is done in three varieties:
– Constant surface concentration
– Constant total dopant
– Sheet resistance of diffused layer
DRIVE IN DIFFUSION
Initial amount of impurity QT is
introduced in the wafer and diffused
with boundary condition that QT is
fixed.
Surface dopant falls
with time while
dopant goes deeper

22. METHODS OF DIFFUSION
22

23. ANALYTIC SOLUTION OF FICK’S LAW
CONSTANT TOTAL DOPANT
2
2
0
' 2
: ( ,0) 0
(0, )
0
: ( , ) 0 ( , )
nd
T
C C
D Fick s Law of Diffusion
t x
Initial condition C x x
dC t
dx
Boundary condition C t and C x t dx Q

 
     
 
   

      
2
(0, )
/
s
T
s
T
Putting x surface concentration C is
Q
C C t
Dt
where Q total impurity in atoms cm

     
 
    
Gaussian
centered
at 0
pre deposition DriveinDt Dt 

24. IMPURITY DISTRIBUTION FOR CONSTANT
TOTAL DOPANT

25. Analytic Solution of Fick’s law
• Solution for constant diffusivity is done in three varieties:
– Constant surface concentration
– Constant total dopant
– Sheet resistance of diffused layer
For diffused layer
forming pn junction

26. FORMATION OF PN JUNCTION
26

27. ANALYTIC SOLUTION OF FICK’S LAW
SHEET RESISTANCE OF DIFFUSED LAYER
 The sheet resistance of diffused layer is
where µ = major carrier mobility
µeff = effective mobility
 Average resistivity of diffused layer is: ρ = Rsxj
0 0
1 1
( ) ( )
j js x x
eff
R
q C x dx q C x dx 
 
 
27

28. ANALYTIC SOLUTION OF FICK’S LAW
 CASE II: Concentration dependent diffusivity (D).
 At high concentrations, when we have constant surface concentration or
constant total dopant, the distributions deviate from those obtained in
case I.
 There are two possible solutions for case II:
 Approximate solution
 Constant total dopant
28

29. CASE II: APPROXIMATE SOLUTION
 The solution to Fick’s law is obtained by giving diffusivity
where Di = constant diffusivity at low
concentration
ni = intrinsic carrier concentration
r = constant of exponent
So, the solution of Fick’s law is obtained as,
The values of α, β and thus C(y), are determined by initial and
boundary conditions.
2
r
i
i
C
D D
n
 
  
 
( , ) ( );
x
C x t t C y where y
t


   
29

30. CASE II: APPROXIMATE SOLUTION
 When α = 0 and β = ½, y = x/√t. this is Boltzmann’s transformation
which has been used to determine the concentration dependent
diffusivities D(C) with constant surface concentration C0
0
1/ 2
( )
/
C
C
ydC
D C
dC dy



30

31. CASE II: CONSTANT TOTAL DOPANT
 If impurities are introduced into Si with total dopants QT, then the
solution of Fick’s law is given as,
where surface concentration Cs(t) is
and
1/
2
2
( , ) ( ) 1
( )
r
s
F
x
C x t C t
x t
 
  
 
1
22
2
( )
2( 2)
rr
T i
s
i
Q nr
C t
D tr r
 
  
  
1
2
2( 2)
( )
r r
T i
F r r
i
Q D tr
x t
nr r
 
  
 Gamma integral
31

32. TEMPERATURE DEPENDENCE OF
DIFFUSIVITY
• For common dopants: Change with temperature
• Follows Arrhenius Formula
where D0 = Diffusivity constant
EA = Activation Energy
D0 and EA define diffusivity for most impurities.
EA is related to energy of motion and energies of formation of defect
impurity complexes.
32

33. CORRECTIONS TO SIMPLE THEORY
 At high concentration (Cdoping >> ni), the impurity profiles can be
represented by concentration dependent diffusivities. Fick’s law are
no more valid.
 Due to profile’s own electric field the movement of impurities is
affected. The diffusivity is now D(1+η) where η is screening factor
lying between 0 and 1.
 Diffusivity is further affected by presence of other impurities.
 Due to the presence of electric field the current density J has drift
and diffusion components.
 The diffusivity of impurities in a semiconductor depends on the
concentration of vacancies.
33

34. EFFECT OF ELECTRIC FIELD ON
DIFFUSION
 Since current=drift current+ diffusion current
 Flux, where µ = mobility and Ex = applied electric
field.
 In a semiconductor,
 So, flux is given as
 This can be rewritten as
where η = screening factor [0,1]
* If η = 0; then
x
C
J D CE
x


  

1
x
KT C
E
q C x


 

1C KT C
J D C
x q C x
 
  
      
 1
C
J D
x


  

C
J D
x

 
 Fick’s First Law34

35. OXIDATION OF SEMICONDUCTOR
 When semiconductor is oxidized, a high concentration of
interstitials is generated at the interface.
 The excess concentration decays with depth due to vacancy
interstitial recombination.
 B and P have higher diffusivity near the surface. These are thus
believed to diffuse by interstitialcy process.
 Arsenic diffusivity decrease under oxidizing conditions. Since
excess interstitial concentration depress the local vacancy
concentration. So, As is believed to diffuse by vacancy mechanism.
35

36. DIFFUSIVITY UNDER OXIDATION
• The diffusivity under oxidation is given as
where is the diffusivity
enhancement and retardation due to oxidation.
• n lies between 0.3 to 0.6.
• If α is positive (oxidation enhanced diffusion) or if
α is negative (oxidation retarded diffusion).
iD D D  
n
oxdt
D
dt

 
   
 
36

37. DIFFUSION IN SIO2
• SiO2 is used for insulation and as barrier to impurity diffusion.
• Arsenic diffusivity in SiO2 :
– depends on anneal ambient.
– In nitrogen diffusivity was higher than in oxygen.
– At concentrations above 5 X 1020 cm-3 As was found to be
immobile.
• Antimony(Sb) has diffusivities in N2 and dry O2 as:
• Diffusivity of Sb in wet oxygen
11 2 1.32 /
3.7 10 /sec) eV KT
SbD cm e 
  
7 2 2.25 /
1.2 10 /sec) eV KT
SbD cm e 
  
37

38. DIFFUSION IN SIO2
• Boron diffusion in SiO2:
– B diffuses substitutionally.
– Nitrogen reduces B diffusivity by increasing the diffusion
activation energy.
– So nitrogen is incorporated into most gate oxides to
prevent B to diffuse from p-type polycrystalline gate
electrodes to the channel of PMOS devices.
– If B diffuses into channel, the threshold voltage changes
and it degrades oxide reliability.
– Hydrogen increases B diffusivity in SiO2.
38

39. Ion Implantation
• Contamination free
• The dominant, accurate and low temperature doping method
• Excellent control of dose with large range(1012 to 1018 dopants /cm2)
• Non-equilibrium process.
• Good control of implant depth (100 Å - 10µm)with energy (KeV to
MeV)
• Repairing crystal damage and dopant activation requires annealing,
which can cause dopant diffusion and loss of depth control.
• Wide choice of masking materials
Dopant ions

40. CONCEPT
40

41. Schematic of an Ion Implanter
Common feed gases for Si:
BF3,AsH3,PH3
Common feed gases for GaAs:
SiH4,H2
Variable orifice
to control flow of
feed gases

42. Schematic of an Ion Implanter
Arc Chamber:
-Break up feed
gases into variety
of atomic and
molecular species
-Ionize some of
these species
Analyzing
Magnet:
-deflects a selected
ion species to the
ion selection
aperture
42

43. ANALYZING MAGNET
Magnetic field exists
perpendicular to the velocity, so,
The velocity v is given as
43

44. Schematic of an Ion Implanter
44

45. The Acceleration Tube in Ion Implanter
Set of rings attached
to voltage divider
network to impart ion
energy
45

46. Neutral Beam Trap in Ion Implanter
-The wafers may be clamped or held
with centrifugal force.
-a batch of wafers are implanted at
the same time

47. Photograph
of the Eaton HE3
High Energy
Implanter,
showing the
ion beam
hitting the
300mm wafer
end-station

48. COMPARISON OF DIFFUSION AND ION
IMPLANTATION
 Diffusion is a cheaper and more simplistic method, but can
only be performed from the surface of the wafers. Dopants
also diffuse unevenly, and interact with each other altering the
diffusion rate.
 Ion implantation is more expensive and complex. It does not
require high temperatures and also allows for greater control
of dopant concentration and profile. It is an anisotropic
process and therefore does not spread the dopant implant as
much as diffusion. This aids in the manufacture of self-
aligned structures which greatly improve the performance of
MOS transistors.
48

49. MOVEMENT OF IONS IN THE WAFER
Range
R
Projected range
RP
Vacuum Silicon

50. Ion Stopping
Nuclear stopping
• Main stopping mechanism
 Caused by collision with nuclei
of the lattice atoms
 Scattered significantly and
causes crystal damage
 Elastic collision
Electronic stopping
 Inelastic collision with electrons
of the lattice atoms
 Energy transfer is very small
(deep penetration)
 Negligible crystal structure
damage
50

51. 51
STOPPING POWER AND ION VELOCITY
Nuclear
Stopping
Electronic
Stopping
I II III
Ion Velocity
StoppingPower
H+
B+
As
+

52. STOPPING POWER
Total stopping power: Energy loss of the ion per unit distance
as it travels inside the substrate.
max
0
T
N Td

53. ION PROJECTION RANGE
0 0
0 0
0
/
pR
p
n eE E
dE dE
R dx
dE dx S S
  
  
VLSI/ULSI ProcessTechnology

54. DOSE AND CONCENTRATION
VLSI
/ULS
I
Proc
essT
echn
olog
y

55. C(x)  CP exp 
x RP 
2
2RP
2









Q  2 RP CP

56. 56
Mask layer thickness
and
ion penetration
Barrier Thickness to
Block 200 keV Ion Beam

57. Implantation Processes: Channeling
• If the incident angle is right, ion can travel long distance without
collision with lattice atoms
• It causes uncontrollable dopant profile
Very few
collisions
Lots of collisions

58. 58
CHANNELING EFFECT
Channeling Ion
Collisional Ion
Lattice Atoms
q
Wafer
Surface

59. Post-collision Channeling
Collisional
q
Wafer
Surface
CollisionalChanneling

60. POST-COLLISION CHANNELING
Collisional CollisionalChanneling
DopantConcentration
Distance from surface

61. Implantation Processes: Channeling
• Ways to avoid channeling effect
– Tilt wafer, 7° is most commonly used
– Screen oxide
– Pre-amorphous implantation, Germanium
• Shadowing effect
– Ion blocked by structures
• Rotate wafer and post-implantation diffusion

62. Shadowing Effect
Polysilicon
Substrate
Doped Region
Shadowed Region
Ion Beam

63. SHADOWING EFFECT
Polysilicon
Substrate
Doped Region
After Annealing and Diffusion

64. 64
Q & A
 Why don’t people use channeling effect to create deep junction
without high ion energy?
• Ion beam is not perfectly parallel. Many ions will start to have a lot
of nuclear collisions with lattice atoms after they penetrating into the
substrate. Some ions can channel deep into the substrate, while
many others are stopped as the normal Gaussian distribution.

65. DAMAGE PROCESS
 Implanted ions transfer energy to lattice atoms
 Atoms to break free
 Freed atoms collide with other lattice atoms
 Free more lattice atoms
 Damage continues until all freed atoms stop
 One energetic ion can cause thousands of displacements of lattice
atoms

66. 66
LATTICE DAMAGE WITH ONE ION
Heavy Ion
Single Crystal Silicon
Damaged Region
Light Ion

67. Implantation Processes: Damage
• Ion collides with lattice atoms and knock them out of lattice grid
• Implant area on substrate becomes amorphous structure
Before Implantation After Implantation

68. Implantation Processes: Anneal
• Dopant atom must in single crystal structure and bond with four
silicon atoms to be activated as donor (N-type) or acceptor (P-type)
• Thermal energy from high temperature helps amorphous atoms to
recover single crystal structure.

69. Thermal Annealing
Dopant AtomLattice Atoms

70. Thermal Annealing
Dopant AtomLattice Atoms

71. Thermal Annealing
Dopant AtomLattice Atoms

72. Thermal Annealing
Dopant AtomLattice Atoms

73. Thermal Annealing
Dopant AtomLattice Atoms

74. Thermal Annealing
Dopant AtomLattice Atoms

75. Thermal Annealing
Dopant AtomLattice Atoms

76. Thermal Annealing
Dopant AtomsLattice Atoms

77. Implantation Processes: Annealing
Before Annealing After Annealing

78.  SiO2 growth is a key process step in manufacturing all Si
devices
- Thick (≈ 1µm) oxides are used for field oxides
(isolate devices from one another )
- Thin gate oxides (≈ 100 Å) control MOS devices
- Sacrificial layers are grown and removed to clean
up surfaces
 The stability and ease of formation of SiO2 was one of the
reasons that Si replaced Ge as the semiconductor of choice.
OXIDATION OF SILICON

79. WHY SIO2?
 SiO2 is stable down to 10-9 Torr , T > 900°C
 SiO2 can be etched with HF which leaves Si unaffected
 SiO2 is a diffusion barrier for B, P, As
 SiO2 is good insulator, r > 1016 ohm-cm
 SiO2 has high dielectric breakdown field, 500 V/mm
 SiO2 growth on Si → clean Si / SiO2 interface because Doxy through
SiO2 << Doxy through SiO2

80. • Dry oxide - Pure dry oxygen is employed
Disadvantage
- Dry oxide grows very slowly.
Advantage
- Oxide layers are very uniform.
- Relatively few defects exist at the oxide-silicon
interface (These defects interfere with the
proper operation of semiconductor devices)
- It has especially low surface state charges and
thus make ideal dielectrics for MOS transistors.

81.  Wet oxide - In the same way as dry oxides, but steam is injected
Disadvantage
- Hydrogen atoms liberated by the decomposition of the
water molecules produce imperfections that may degrade the
oxide quality.
Advantage
- Wet oxide grows fast.
- Useful to grow a thick layer of field oxide

82. DEPOSITED OXIDES
 Oxide is frequently employed as an insulator between two layers of
metallization. In such cases, some form of deposited oxide must be
used rather than the grown oxides.
 Deposited oxides can be produced by various reactions between
gaseous silicon compounds and gaseous oxidizers. Deposited
oxides tend to possess low densities and large numbers of defect
sites. Not suitable for use as gate dielectrics for MOS transistors but
still acceptable for use as insulating layers between multiple
conductor layers, or as protective overcoats.

83. KEY VARIABLES IN OXIDATION
 Temperature
- reaction rate
- solid state diffusion
 Oxidizing species
- wet oxidation is much faster than dry oxidation
 Surface cleanliness
- metallic contamination can catalyze reaction - quality of
oxide grown (interface states)

84. ≈

87. FLUX

91. Diffusion rate limited region
Reaction rate limited
region

94. THE SIMPLEST METHOD OF PRODUCING AN OXIDE
LAYER CONSISTS OF HEATING A SILICON WAFER IN AN
OXIDIZING ATMOSPHERE.

95. OXIDATION FURNACE

96. THREE DIMENSION VIEW OF SIO2
GROWTH BY THERMAL OXIDATION
Si substrate
SiO2
SiO2 surface
Original SiO2
surface

97. oLinear oxidation
o Parabolic oxidation of silicon
owhere X = oxide thickness, B = parabolic rate constant, B/A =
linear rate constant, t = oxidation time
o Parabolic relationship of SiO2 growth parameters
owhere R = SiO2 growth rate, X = oxide thickness, t = oxidation
time
t
A
B
X 
BtX 
2
t
X
R 

98. CONTD..
 Implication of parabolic relationship:
 Thicker oxides need longer time to grow than thinner
oxides
 2000Å, 1200C in dry O2 = 6 minutes
 4000Å, 1200C in dry O2 = 220 minutes (36 times
longer)
 Long oxidation time required:
 Dry O2
 Low temperature

99. Dependence of silicon oxidation rate constants on
temperature

100. Oxide thickness vs oxidation time for silicon
oxidation in dry oxygen at various temperatures

101. OXIDATION RATE
Controlled by:
1. Wafer orientation
2. Wafer dopant
3. Impurities
4. Oxidation of polysilicon layers
1. Wafer orientation
• Large no of atoms allows faster oxide growth
• <111> plane have more Si atoms than <100> plane
 Faster oxide growth in <111> Si
 More obvious in linear growth stage and at low
temperature

102. CRYSTAL STRUCTURE OF SILICON
<100> plane
<111> plane

103. Dependence of oxidation linear rate constant and oxide fixed
charge density on silicon orientation

104. 2. Wafer dopant(s) distribution
 Oxidised Si surface always has dopants; N-type or P-type
 Dopant may also present on the Si surface from diffusion or ion
implantation
 Oxidation growth rate is influenced by dopant element used and
their concentration e.g.
 Phosphorus-doped oxide: less dense and etch faster
 Higher doped region oxidise faster than lesser doped region
e.g. high P doping can oxidise 2-5 times the undoped
oxidation region
 Doping induced oxidation effects are more obvious in the
linear stage oxidation

105. Schematic illustration of dopant distribution as a function of
position is the SiO2/Si structure indicating the redistribution
and segregation of dopants during silicon thermal oxidation

106.  Distribution of dopant atoms in Si after oxidation is completed
 During thermal oxidation, oxide layer grows down into Si
wafer- behavior depends on conductivity type of dopant
 N-type: higher solubility in Si than SiO2, move down to
wafer. Interface consists of high concentration N-type
doping
 P-type: opposite effect occurs e.g Boron doping in Si
move to SiO2 surface causes B pile up in SiO2 layer and
depletion in Si wafer  change electrical properties

107. 3. Oxide impurities
Certain impurities may influence oxidation rate
e.g. chlorine from HCl from oxidation atmosphere 
increase growth rate 1-5%

108.  Oxidation of polysilicon
 Oxidation of polysilicon is essential for polysilicon
conductors and gates in MOS devices and circuits
 Oxidation of polysilicon is dependent on
 Polisilicon deposition method
 Deposition temperature
 Deposition pressure
 The type and concentration of doping
 Grain structure of polysilicon

109. THERMAL OXIDATION METHOD
 Thermal oxidation  energy is supplied by heating a wafer
 SiO2 layer are grown:
Atmospheric pressure oxidation  oxidation without
intentional pressure control (auto-generated pressure);
also called atmospheric technique
High pressure oxidation  high pressure is applied
during oxidation
 2 atmospheric techniques
Tube furnace
Rapid thermal system

110. OXIDATION TECHNIQUES
Thermal oxidation
Atmospheric
pressure
Tube furnace Dry oxygen
Wet oxygen
Rapid thermal Dry oxygen
High pressure Tube furnace Dry or wet
oxygen
Chemical oxidation
Anodic
oxidation
Electrolytic cell Chemical

111. HORIZONTAL TUBE FURNACE
 Quartz reaction tube – reaction chamber
for oxidation
 Muffle – heat sink, more even heat
distributing along quartz tube
 Thermocouple – placed close to quartz
tube. Send temp to band controller
 Controller – send power to coil to heat
the reaction tube by radiation/conduction
 Source zone- heating zone
Place the
sample

112. HORIZONTAL TUBE FURNACE
 Integrated system of a tube furnace consists of several
sections:
1. Reaction chamber
2. Temperature control system
3. Furnace section
4. Source cabinet
5. Wafer cleaning station
6. Wafer load station
7. Process automation

113. VERTICAL TUBE FURNACES
 Small footprint
 Maybe placed outside the cleanroom
with only a load station door opening
into the cleanroom
 Disadvantage: expensive

114. RAPID THERMAL PROCESSING
 Based on radiation principle heating
 Useful for thin oxides used in MOS gates
 Trend in device miniaturisation requires reduction in thickness of
thermally grown gate oxides
 < 100Å thin gate oxide
 Hard to control thin film in conventional tube furnace
 Problem: quick supply and remove O2 from the system

115.  RTP system: able to heat and cool the wafer temperature VERY
rapidly
 RTP used for oxidation is known as Rapid Thermal Oxidation
(RTO)
 Have O2 atmosphere
 Other processes use RTP system:
 Wet oxide (steam) growth
 Localised oxide growth
 Source/ drain activation after ion implantation
 LPCVD polysilicon, amorphous silicon, tungsten, silicide
contacts
 LPCVD nitrides
 LPCVD oxides

116. RTP design
e.g. RTP time/temperature
curve

117. HIGH PRESSURE OXIDATION
 Problems in high temperature oxidation
 Growth of dislocations in the bulk of the wafer 
dislocations cause device performance problems
 Growth of hydrogen-induced dislocations along the edge of
opening  surface dislocations cause electrical leakage
along the surface or the degradation of silicon layers
grown on the wafer for bipolar circuits
 Solve: low temperature oxidation BUT require a longer
oxidation time

118.  High pressure system  similar to conventional horizontal
tube furnace with several features:
 Sealed tube
 Oxidant is pumped into the tube at pressure 10-25 atm
 The use of a high pressure requires encasing the quartz
tube in a stainless steel jacket to prevent it from cracking
 High pressure oxidation results in faster oxidation rate
 Rule of thumb: 1 atm causes temperature drop of 30C
 In high pressure system, temperature drop of 300-750C
  This reduction is sufficient to minimise the growth of
dislocations in and on the wafers

119. Advantage of high pressure oxidation
 Drop the oxidation temperature
 Reduce oxidation time
 Thin oxide produced using high pressure oxidation  higher
dielectric strength than oxides grown at atmospheric pressure
High pressure
oxidation

120. OXIDE PROPERTIES
 In microelectronics, we use thin layers of pure SiO2. The
layers are amorphous (fused silica)
 Density: 2.0 - 2.3 gm/cm3
 Dielectric constant at low frequencies: εr = 3.9 (remember
this!) refractive index at optical wavelengths: n ≈ 1.5
 Breakdown field: > 107 V/cm (1 V across 1 nm)
 The interface with silicon always results in electronic trap
levels and some negative interface charge. Typical interface
defect density ≈ 1011 cm–2. This is not a high density of
defects at an interface. It can be made even lower by
annealing in hydrogen. S