In this deck from the CoNGA Conference for Next Generation Arithmetic, Anantha Kinnal from Calligo Technologies demonstrates the company's Posit computing technology. "CalligoTech, based in Bangalore - India, built and demonstrated World’s First Posit-enabled System at the CoNGA track at Supercomputing Asia’18, Singapore. Our primary objective was to build a System capable of performing basic arithmetic operations using Posit Number System and capable of running existing C programs." The Posit number system is a flexible number system with variable no of bits (n) and exponent size (es). Any specific configuration is represented as <n,es> format. We selected to implement a Posit Numeric Unit (PNU) with <32,2> configuration targeting HPC applications and to be able to compare advantages of Posit with Single Precision Floats for dynamic range and with Double Precision Floats for accuracy. We chose to implement the PNU design using FPGAs on a Single Board Computer with Intel Arria10 SOC-FPGA, running Linux. The SOC-FPGA comes with dual-core ARM Cortex-A9 MPCore Processor with native FPU and different capacity FPGAs. FPGAs offer field-upgrade and capability to change the design in seconds just by reprogramming using different bit-stream. This flexibility is absolutely necessary for an evolving standard, to quickly fix bugs and to add new functionality. We use a host computer connecting to the SBC over Ethernet. It runs a docker environment containing cross-compiler, general and special libraries." Watch the video: https://wp.me/p3RLHQ-iEL and https://posithub.org/conga/2018/techprogramme Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter

1. March 2018
Posit Numeric Unit (PNU)
Implementation – Posit <32,2>
www.calligotech.com

2. Posit Numeric Unit – Native Mode
Hardware:
Ø Verilog RTL based Design – suitable for
FPGA, ASIC or Full-chip VLSI Design
Ø Supports - Add, Sub, Mul and Quire for
<32,2> as of now
Ø Support for – Division, Sqrt, InvSqrt,
Exp, Log etc (planned next)
Ø Reconfigurable for different Posit
Configurations (later)
Ø NoC with different posit configuration for
each PE, with Quire support for each PE
Posit Numeric Unit
Posit Input
Operands
Posit Output

3. Posit Numeric Unit – Native Mode (contd..)
Software:
ØNeeds new compilers capable of
supporting native Posit constants,
Variables
Ø New applications
Ø Reconfigurable for different Posit
Configuration
Posit Numeric Unit
Posit Input
Operands
Posit Output

4. Posit Numeric Unit –
Embedded Double Precision Mode
Ø Use existing compilers
Ø Compile & run existing ‘C’
Programs without any modifications
Ø Takes-in DP operands
Ø Computes using PNU<32,2>
Ø Generates results in DP
Ø HW – DP to Posit, Posit to DP Posit to Double Precision
Posit Numeric Unit
Double Precision to
Posit<32,2> converter

5. CPU with Posit Numeric Unit (Tightly coupled)
Ø Current PNU design - Generic
Ø Can be adopted for any CPU
architectures
Ø Leverage existing Opcode Map
for given ISA
Ø Tightly integrated for highest
performance
Ø Across segments – Mobile,
Laptop, Desktop, Servers, etc
CPU
X86, ARM, RISC5
PNU with
CPU specific
Wrapper

6. YOUR INVENTION, OUR IMPLEMENTATION
TURN YOUR IDEAS INTO REALITY

7. © Calligo Technologies, Bangalore
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