CMOS digitally programmable analog front-ends for third generation wireless applications, CMOS baseband circuit techniques for integrated multi-standard wireless receivers, Compact high performance analog CMOS baseband design solutions for multistandard wireless transceivers, A Wide Linear Output Range Biopotential Amplifier for Physiological Measurement Frontend, Roadmap to a Ph.D. Degree (ECE), Synopsys Custom Compiler™, Pulsic, Dan Clein's status of Virtuoso, Custom Compiler, and Pulsic tools, Layout Book, FPAA, Silicon mitus, COSMIC,

1. Wednesday, 30 October 2019. 3:39pm
Useful websites’ links:
Dissertation PhD/Thesis MSc:
CMOS digitally programmable analog front-ends for third generation wireless applications:
https://etd.ohiolink.edu/pg_10?::NO:10:P10_ETD_SUBID:122275
CMOS baseband circuit techniques for integrated multi-standard wireless receivers:
https://etd.ohiolink.edu/pg_10?::NO:10:P10_ETD_SUBID:147974
Compact high performance analog CMOS baseband design solutions for multistandard wireless
transceivers:
https://etd.ohiolink.edu/pg_10?0::NO:10:P10_ACCESSION_NUM:osu1149024229
Paper:
A Wide Linear Output Range Biopotential Amplifier for Physiological Measurement Frontend:
http://www.sooxma.com/abstracts/A%20wide%20linear%20output%20range%20biopotential%20a
mplifier%20for%20physiological%20measurement%20frontend.pdf
ECE PhD: http://engineering.uci.edu/dept/eecs/graduate/roadmap_phd
Biomedical engineering: http://engineering.uci.edu/dept/bme
patent paper: http://www.freepatentsonline.com/7525372.pdf
IC design: Preparing for the next node:
http://s3.mentor.com/public_documents/whitepaper/resources/mentorpaper_104862.pdf
The Synopsys Custom Compiler™ design environment is a modern solution for full-custom analog,
custom digital, and mixed-signal IC design. As the heart of the Synopsys Custom Design Platform,
Custom Compiler provides design entry, simulation management and analysis, and custom layout
editing features. It delivers industry-leading productivity, performance, and ease-of-use while
remaining easy to adopt for users of legacy tools.:
https://www.synopsys.com/content/dam/synopsys/implementation&signoff/datasheets/custom-
compiler-ds.pdf
Synopsys Tutorial Part 1 - Introduction to Synopsys Custom Designer Tools:
https://www.youtube.com/watch?v=DHqJxftY5B8 & http://youtu.be/lcQCwYrX2wE
Pulsic Solves IC Design Challenges for Leading Companies Worldwide. Pulsic is an EDA company
focused on Precision Design Automation.: https://www.pulsic.com/
Dan Clein's status of Virtuoso, Custom Compiler, and Pulsic tools:
https://www.deepchip.com/items/0571-01.html
Layout Book: CMOS IC Layout: Concepts, Methodologies, and Tools, Dan Clein has 33 years
experience doing full custom and AMS layout. His "CMOS IC Layout" is considered a key reference
book in full custom chip design. To reach Dan email him at cometic@ieee.org.

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https://epdf.pub/cmos-ic-layout-concepts-methodologies-and-tools.html
Python based analog layout: https://www.researchgate.net/publication/228541535_A_Python-
Based_Analog_Layout_Generation_Tool_For_Nanometer_CMOS_Technologies
A lot of EDA tools are used in the design and implementation of IC chip. While the EDA tools are
powerful, there are always features that are not available to address some of the IC design and
implementation needs. Some of these missing features can be easily developed in a short time while
some may take a longer time. The latter forms the niche for EDA Utilities. The tools developed in
EDA Utilities were done in between full-time employments, or during free time.:
http://www.eda-utilities.com/
Layout Book: http://www.eda-utilities.com/CMOS_Transistor_Layout_KungFu.pdf
fractional memristor:
https://uhra.herts.ac.uk/bitstream/handle/2299/19956/Published_Version.pdf?sequence=2&isAllo
wed=y
Courses (Prof. Franco Maloberti): http://ims.unipv.it/Courses.php
research-by-objectives, technology transfer, and market evolution: a virtuous triangle:
http://ims.unipv.it/~franco/Miscellanea/1.pdf
The UHRA is a repository of the research produced by the University of Hertfordshire. Research in
UHRA can be viewed and downloaded freely by researchers and students all over the world.:
https://uhra.herts.ac.uk/
ABB in FPAA:
https://uhra.herts.ac.uk/bitstream/handle/2299/21159/YS_AAM.pdf?sequence=1&isAllowed=y
MCCI is a leading Technology Centre based in Tyndall National Institute, Cork, Ireland. We specialise
in delivering research on advanced RF and mixed signal circuits. We research and develop circuits
that sense, condition, convert, interpret and connect the physical and digital worlds. Our goal is to
increase export revenue and employment of microelectronics companies. Our highly experienced
research team consists of 15 distinguished Principal Investigators , with 70 research staff across six
academic member universities and institutes of technology. We also bring in world class overseas
professors and industry experts to consult with us and to give seminars to industry and academia.:
https://www.tyndall.ie/mcci
Eindhoven University of Technology/research: https://www.tue.nl/en/research/research-labs/
https://www.tue.nl/en/research/research-groups/
COSMIC lab is specialized in different electronic fields. Based on microelectronics technology, our
expertise regards the design and implementation of electronic systems and their reliability:
http://www.cosmiclab.diten.unige.it/ &
http://www.cosmiclab.diten.unige.it/expertise/electronics/analog-circuit-design
Silicon mitus is a fabless analog semiconductor company specializing in Power Management
Integrated Chips (PMIC), providing customized solutions for electronics applications that include but

3. Wednesday, 30 October 2019. 3:39pm
are not limited to tablets, mobile phones and monitors. Due to our arduous efforts, we have now
proudly expanded our product portfolio to include audio products:
http://www.siliconmitus.com/main/
SSCS ESSCIRCedu 2019 Pieter Harpe: https://www.youtube.com/watch?v=FjLOtBWZkjU
Software defined hardware: https://www.accenture.com/_acnmedia/pdf-84/accenture-software-
defined-hardware-v09.pdf
DESIGN TECHNIQUES FOR FIRST PASS SILICON IN SOC RADIO TRANSCEIVERS:
https://pdfs.semanticscholar.org/77b7/9a318806d7d4229a46dbdcc2131eed75da42.pdf?_ga=2.250
950661.201675328.1572261451-376095060.1572261451
RISC-V is a free and open ISA enabling a new era of processor innovation through open standard
collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible
software and hardware freedom on architecture, paving the way for the next 50 years of computing
design and innovation: https://riscv.org/
Chipus Microelectronics is a semiconductor company with proven expertise in the development of
ultra-low-power, low-voltage, analog and mixed-signal integrated circuits (ICs) and systems on chip
(SoCs): https://chipus-ip.com/
SiFive is the first fabless semiconductor company to build customized silicon based on the free and
open RISC-V instruction set architecture: https://www.sifive.com/
First Pass Semiconductors is founded by a group of VLSI professionals with in-depth knowledge and
experience of more than 20+ years in the field of ASIC design: http://www.firstpass-
semi.com/index.html
Lecture: https://limsk.ece.gatech.edu/course/ece6133/slides/intro.pdf &
https://limsk.ece.gatech.edu/course/ece6133/
ALGORITHMS FOR VLSI PHYSICAL DESIGN AUTOMATION:
https://doc.lagout.org/science/0_Computer%20Science/2_Algorithms/Algorithms%20for%20VLSI%2
0Physical%20Design%20Automation%20%283rd%20ed.%29%20%5BSherwani%201998-11-
30%5D.pdf