Study on 12-/14-/16-Bit, Octal-Channel, DAC
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An Overview study on 12-/14-/16-Bit, Octal-Channel DAC
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Hinweis der Redaktion
- This is a study on the Texas Instruments 12/14/16 bit octal channel DAC.
- Welcome to the training module on the 12-bit resolution DAC7568. This training module covers how to interface the DAC to an MCU and application information.
- The 16-bit DAC8568, 14-bit DAC8168, and 12-bit DAC7568 digital-to-analog converters (DACs) from Texas Instruments target data-acquisition systems, industrial process control, and portable instrumentation. Their internal reference provides temperature drift performance of 2 ppm/°C (typical) up to 5 ppm/°C (maximum) across the entire operating range for twice the accuracy of competitive devices, according to TI. The internal reference, which saves space and cost compared to external references, also offers a high initial accuracy of ±0.004% (typical) and ±0.002% to help eliminate the need for full-scale system calibration.
- This device Targeting applications such as industrial process control and portable instrumentation, the DAC8568 (16-bit), DAC8168 (14-bit) and DAC7568 (12-bit) digital-to-analog converters (DACs) from TI integrate eight channels in a TSSOP-14 or TSSOP-16 package. Features include a power of 0.56 mW per channel (including internal reference current) and a temperature drift of 2 ppm/°C (typ) up to 5 ppm/ °C (max). The internal reference offers an initial accuracy of ±0.004% (typ); ±0.02% and the output glitch energy is 0.1nV-s.
- The DAC architecture consists of eight string DACs each followed by an output buffer amplifier The resistor string is simply a string of resistors, each of value R . The code loaded into the DAC register determines at which node on the string the voltage is tapped off to be fed into the output amplifier by closing one of the switches connecting the string to the amplifier. It is monotonic because it is a string of resistors. The output buffer amplifier is capable of generating. rail-to-rail voltages on its output, giving a maximum output range of 0V to AVDD.
- To enable the internal reference, write the 32-bit serial command When performing a power cycle to reset the device, the internal reference is switched off (default mode). In the default mode, the internal reference is powered down until a valid write sequence is applied to power up the internal reference. If the internal reference is powered up, it automatically powers down when all DACs power down in any of the power-down modes
- This page gives you serial interface feature that exist in this device. It has 3- wire serial interface Sync, Sclk, Din which are compatible with SPI, Qspi and microwire standards. It has 32-bit shift register which consist of four prefix bits, four control bits, 16 data bits and four feature bits. The data format is straight binary with all '0's corresponding to 0V output and all '1's corresponding to full-scale output
- This page gives information about the different power down modes present in the DAC. There are four power modes which exist here, these modes are selected using the PD1, PD2 bits. Power up selected DAC, Power down selected DAC 1Kohm to GND, 100Kohm to GND, Power down selected DAC High-Z to GND are the different modes.
- Load regulation is defined as the change in reference output voltage as a result of changes in load current. The load regulation of the internal reference is measured using force and sense contacts The force and sense lines reduce the impact of contact and trace resistance, resulting in accurate measurement of the load regulation contributed solely by the internal reference.
- The MSP430F449 mC will interface with the DAC8564 using the SPI serial data communication protocol via the MSP430 USART0 port. Only two pins are used from the four-pin SPI mode of configuration. It is implemented this way because there is no need for reading any data back from the DAC8564, or having the MSP430 microcontroller be enslaved by another host peripheral for SPI purposes. Therefore, the STE and the MISO functions in SPI mode of the USART0 port are not used. The DAC8564 receives a 24-bit digital input word serially Because the SPI only provides eight data clocks per transmission, three write cycles are required within the SYNC low period to complete one write cycle to the DAC8564.
- Here we show the some of the interface between DAC and Microcontroller. In 8051 based MCU we use UART interface connection like TXD, RXD line and SYNC is derived from a programmable port pin. In Microwire connection the data are shifted out on every falling edge of serial clock.
- This page gives some application information about this device like Internal Reference, Supply voltage, Noise Performance, Thermal Hysteresis.
- Thank you for taking the time to view this presentation on “ DAC7568 ” . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Texas Instruments site, or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility. You may visit Element 14 e-community to post your questions.