SlideShare ist ein Scribd-Unternehmen logo
1 von 10
Logic Gates
Gate types: NOT | AND | NAND | OR | NOR | EX-OR | EX-NOR
Symbols | Truth tables | Logic ICs | Summary truth tables | Combinations | Substituting

Next Page: Capacitance and Uses of Capacitors
Also see: Logic ICs | 4000 Series | 74 Series


                                                                                          Logic states
                                                                                          True False
                                                                                            1      0
                                                                                          High   Low
                                                                                          +Vs     0V
                                                                                           On     Off
Introduction

Logic gates process signals which represent true or false. Normally the positive supply
voltage +Vs represents true and 0V represents false. Other terms which are used for the
true and false states are shown in the table on the right. It is best to be familiar with them
all.

Gates are identified by their function: NOT, AND, NAND, OR, NOR, EX-OR and EX-
NOR. Capital letters are normally used to make it clear that the term refers to a logic
gate.

Note that logic gates are not always required because simple logic functions can be
performed with switches or diodes:

    ‱   Switches in series (AND function)
    ‱   Switches in parallel (OR function)
    ‱   Combining chip outputs with diodes (OR function)




Logic gate symbols

There are two series of symbols for logic gates:
   ‱ The traditional symbols have distinctive shapes making them easy to recognise
       so they are widely used in industry and education.
‱   The IEC (International Electrotechnical Commission) symbols are rectangles
       with a symbol inside to show the gate function. They are rarely used despite their
       official status, but you may need to know them for an examination.




Inputs and outputs

Gates have two or more inputs, except a NOT gate which has only one input. All gates
have only one output. Usually the letters A, B, C and so on are used to label inputs, and Q
is used to label the output. On this page the inputs are shown on the left and the output on
the right.


The inverting circle (o)

Some gate symbols have a circle on their output which means that their function includes
inverting of the output. It is equivalent to feeding the output through a NOT gate. For
example the NAND (Not AND) gate symbol shown on the right is the same as an AND
gate symbol but with the addition of an inverting circle on the output.



                                                               Input A Input B Output Q
                                                                   0        0         0
                                                                   0        1         0
                                                                   1        0         0
                                                                   1        1         1
Truth tables

A truth table is a good way to show the function of a logic gate. It shows the output states
for every possible combination of input states. The symbols 0 (false) and 1 (true) are
usually used in truth tables. The example truth table on the right shows the inputs and
output of an AND gate.
There are summary truth tables below showing the output
                             states for all types of 2-input and 3-input gates. These can be
                             helpful if you are trying to select a suitable gate.




Logic ICs

Logic gates are available on special ICs (chips) which usually contain several gates of the
same type, for example the 4001 IC contains four 2-input NOR gates. There are several
families of logic ICs and they can be split into two groups:
   ‱ 4000 Series
   ‱ 74 Series

To quickly compare the different families please see:
   ‱ Summary table of logic families



The 4000 and 74HC families are the best for battery powered projects because they will
work with a good range of supply voltages and they use very little power. However, if
you are using them to design circuits and investigate logic gates please remember that all
unused inputs MUST be connected to the power supply (either +Vs or 0V), this applies
even if that part of the IC is not being used in the circuit!

NOT gate (inverter)

The output Q is true when the input A is NOT true, the output is the inverse of the input:
Q = NOT A
A NOT gate can only have one input. A NOT gate is also called an inverter.

                                                 Input A Output Q
                                                    0         1
                                                    1         0

 Traditional symbol          IEC symbol              Truth Table


AND gate

The output Q is true if input A AND input B are both true: Q = A AND B
An AND gate can have two or more inputs, its output is true if all inputs are true.
Input A Input B Output Q
                                                     0        0         0
                                                     0        1         0
                                                     1        0         0
                                                     1        1         1

 Traditional symbol          IEC symbol                   Truth Table


NAND gate (NAND = Not AND)

This is an AND gate with the output inverted, as shown by the 'o' on the output.
The output is true if input A AND input B are NOT both true: Q = NOT (A AND B)
A NAND gate can have two or more inputs, its output is true if NOT all inputs are true.

                                                  Input A Input B Output Q
                                                     0        0         1
                                                     0        1         1
                                                     1        0         1
                                                     1        1         0

 Traditional symbol          IEC symbol                   Truth Table


OR gate

The output Q is true if input A OR input B is true (or both of them are true): Q = A OR B

An OR gate can have two or more inputs, its output is true if at least one input is true.

                                                  Input A Input B Output Q
                                                     0        0         0
                                                     0        1         1
                                                     1        0         1
                                                     1        1         1

 Traditional symbol          IEC symbol                   Truth Table


NOR gate (NOR = Not OR)
This is an OR gate with the output inverted, as shown by the 'o' on the output.
The output Q is true if NOT inputs A OR B are true: Q = NOT (A OR B)
A NOR gate can have two or more inputs, its output is true if no inputs are true.

                                                Input A Input B Output Q
                                                    0        0         1
                                                    0        1         0
                                                    1        0         0
                                                    1        1         0

 Traditional symbol          IEC symbol                  Truth Table


EX-OR (EXclusive-OR) gate

The output Q is true if either input A is true OR input B is true, but not when both of
them are true: Q = (A AND NOT B) OR (B AND NOT A)
This is like an OR gate but excluding both inputs being true.
The output is true if inputs A and B are DIFFERENT.
EX-OR gates can only have 2 inputs.

                                                Input A Input B Output Q
                                                    0        0         0
                                                    0        1         1
                                                    1        0         1
                                                    1        1         0

 Traditional symbol          IEC symbol                  Truth Table


EX-NOR (EXclusive-NOR) gate

This is an EX-OR gate with the output inverted, as shown by the 'o' on the output.
The output Q is true if inputs A and B are the SAME (both true or both false):
Q = (A AND B) OR (NOT A AND NOT B)
EX-NOR gates can only have 2 inputs.

                                                Input A Input B Output Q
                                                    0        0         1
                                                    0        1         0
                                                    1        0         0
                                                    1        1         1
Traditional symbol            IEC symbol                 Truth Table




Summary truth tables

The summary truth tables below show the output states for all types of 2-input and 3-
input gates.
         Summary for all 2-input gates                  Summary for all 3-input gates
Inputs               Output of each gate                Inputs           Output of each gate
                                   EX-     EX-      A B C AND NAND OR NOR
A B AND NAND OR NOR
                                   OR      NOR      0     0      0      0      1       0       1
 0   0    0      1        0    1      0      1      0     0      1      0      1       1       0
 0   1    0      1        1    0      1      0      0     1      0      0      1       1       0
 1   0    0      1        1    0      1      0      0     1      1      0      1       1       0
 1   1    1      0        1    0      0      1      1     0      0      0      1       1       0
                                                    1     0      1      0      1       1       0
                                                    1     1      0      0      1       1       0
         Note that EX-OR and EX-NOR
          gates can only have 2 inputs.             1     1      1      1      0       1       0



Combinations of logic gates

                                                                     Input A Input B Output Q
                                                                        0          0       0
                                                                        0          1       0
                                                                        1          0       1
                                                              1       1         0
Logic gates can be combined to produce more complex functions. They can also be
combined to substitute one type of gate for another.

For example to produce an output Q which is true only when input A is true and input B
is false, as shown in the truth table on the right, we can combine a NOT gate and an AND
gate like this:
Inputs       Outputs
                                                                   A B C D E Q
                                                                   0     0      0   1   0   1
                                                                   0     0      1   1   0   1
                                                                   0     1      0   0   0   0
                                                                   0     1      1   0   1   1
                                                                   1     0      0   0   0   0
                                                                   1     0      1   0   0   0
                                                                   1     1      0   0   0   0
                                                                   1     1      1   0   1   1
Q = A AND NOT B


Working out the function of a combination of gates

Truth tables can be used to work out the function of a combination of gates.

For example the truth table on the right show the intermediate outputs D and E as well as
the final output Q for the system shown below.




D = NOT (A OR B)
E = B AND C
Q = D OR E = (NOT (A OR B)) OR (B AND C)



Substituting one type of gate for another
Logic gates are available on ICs which usually contain several gates of the same type, for
example four 2-input NAND gates or three 3-input NAND gates. This can be wasteful if
only a few gates are required unless they are all the same type. To avoid using too many
ICs you can reduce the number of gate inputs or substitute one type of gate for another.

Reducing the number of inputs

The number of inputs to a gate can be reduced by connecting two (or more) inputs
together. The diagram shows a 3-input AND gate operating as a 2-input AND gate.


Making a NOT gate from a NAND or NOR gate

Reducing a NAND or NOR gate to just one input creates a NOT gate. The diagram
shows this for a 2-input NAND gate.


Any gate can be built from NAND or NOR gates

As well as making a NOT gate, NAND or NOR gates can be combined to create any type
of gate! This enables a circuit to be built from just one type of gate, either NAND or
NOR. For example an AND gate is a NAND gate then a NOT gate (to undo the inverting
function). Note that AND and OR gates cannot be used to create other gates because they
lack the inverting (NOT) function.

To change the type of gate, such as changing OR to AND, you must do three things:

   ‱   Invert (NOT) each input.
   ‱   Change the gate type (OR to AND, or AND to OR)
   ‱   Invert (NOT) the output.

For example an OR gate can be built from NOTed inputs fed into a NAND (AND +
NOT) gate.

NAND gate equivalents

The table below shows the NAND gate equivalents of NOT, AND, OR and NOR gates:
              Gate                            Equivalent in NAND gates


  NOT
AND




   OR




  NOR




                                     Substituting gates in an example logic system

The original system has 3 different gates: NOR, AND and OR. This requires three ICs
(one for each type of gate).

To re-design this system using NAND gates only begin by replacing each gate with its
NAND gate equivalent, as shown in the diagram below.
Then simplify the system by deleting adjacent pairs of NOT gates (marked X above).
This can be done because the second NOT gate cancels the action of the first.

The final system is shown on the right. It has five NAND gates and requires two ICs
(with four gates on each IC). This is better than the original system which required three
ICs (one for each type of gate).

Substituting NAND (or NOR) gates does not always increase the number of gates, but
when it does (as in this example) the increase is usually only one or two gates. The real
benefit is reducing the number of ICs required by using just one type of gate.

Weitere Àhnliche Inhalte

Was ist angesagt?

Electronic Circuits
Electronic  CircuitsElectronic  Circuits
Electronic Circuits
gavhays
 
Report on-the-logic-gates
Report on-the-logic-gatesReport on-the-logic-gates
Report on-the-logic-gates
bhardubhai
 
Logic gates
 Logic gates Logic gates
Logic gates
zameerhasan
 

Was ist angesagt? (20)

Logic Gates & Related Device
Logic Gates & Related DeviceLogic Gates & Related Device
Logic Gates & Related Device
 
Logic gate class 12
Logic gate class 12Logic gate class 12
Logic gate class 12
 
Logic gates and logic circuits
Logic gates and logic circuitsLogic gates and logic circuits
Logic gates and logic circuits
 
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed KhanDigital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
Digital Logic & Computer Architecture Practical Book by Yasir Ahmed Khan
 
Physics project on logic gate
Physics project on logic gatePhysics project on logic gate
Physics project on logic gate
 
logic gates
logic gateslogic gates
logic gates
 
Computer circuit logic
Computer circuit logicComputer circuit logic
Computer circuit logic
 
Electronic Circuits
Electronic  CircuitsElectronic  Circuits
Electronic Circuits
 
Logic gates 07 11-2014
Logic gates 07 11-2014Logic gates 07 11-2014
Logic gates 07 11-2014
 
Logic gates and NAND and NOR univarsal gates
Logic gates and NAND and NOR univarsal gatesLogic gates and NAND and NOR univarsal gates
Logic gates and NAND and NOR univarsal gates
 
Logic gates
Logic gatesLogic gates
Logic gates
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
 
Report on-the-logic-gates
Report on-the-logic-gatesReport on-the-logic-gates
Report on-the-logic-gates
 
Logic gates
 Logic gates Logic gates
Logic gates
 
verification of logic gates cbse class 12
verification of logic gates cbse class 12verification of logic gates cbse class 12
verification of logic gates cbse class 12
 
physics investigatory project class 12 on logic gates ,boolean algebra
physics investigatory project class 12 on logic gates ,boolean algebraphysics investigatory project class 12 on logic gates ,boolean algebra
physics investigatory project class 12 on logic gates ,boolean algebra
 
Computer science study material
Computer science study materialComputer science study material
Computer science study material
 
Computer logic and gates
Computer logic and gatesComputer logic and gates
Computer logic and gates
 
Basic Logic gates
Basic Logic gatesBasic Logic gates
Basic Logic gates
 
Logic gate
Logic gateLogic gate
Logic gate
 

Andere mochten auch

The logic gate circuit
The logic gate circuitThe logic gate circuit
The logic gate circuit
roni Febriandi
 
Physics Investigatory Project Class 12
Physics Investigatory Project Class 12Physics Investigatory Project Class 12
Physics Investigatory Project Class 12
Self-employed
 

Andere mochten auch (9)

digital
digitaldigital
digital
 
transistor transistor logic
transistor transistor logictransistor transistor logic
transistor transistor logic
 
NAND gate
NAND gateNAND gate
NAND gate
 
Basic electronics
Basic electronicsBasic electronics
Basic electronics
 
Logic Gates
Logic GatesLogic Gates
Logic Gates
 
The logic gate circuit
The logic gate circuitThe logic gate circuit
The logic gate circuit
 
Logic gates
Logic gatesLogic gates
Logic gates
 
NAND gate
NAND  gate NAND  gate
NAND gate
 
Physics Investigatory Project Class 12
Physics Investigatory Project Class 12Physics Investigatory Project Class 12
Physics Investigatory Project Class 12
 

Ähnlich wie Logic gates

Fault tolerant and online testability
Fault tolerant and online testabilityFault tolerant and online testability
Fault tolerant and online testability
Sajib Mitra
 
solids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.pptsolids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.ppt
UmeshPatil149
 
Solids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.pptSolids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.ppt
JosephMuez2
 
Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4
Self-employed
 
Components logic gates
Components   logic gatesComponents   logic gates
Components logic gates
sld1950
 

Ähnlich wie Logic gates (20)

Fault tolerant and online testability
Fault tolerant and online testabilityFault tolerant and online testability
Fault tolerant and online testability
 
Digital logic gates and Boolean algebra
Digital logic gates and Boolean algebraDigital logic gates and Boolean algebra
Digital logic gates and Boolean algebra
 
Bca i sem de lab
Bca i sem  de labBca i sem  de lab
Bca i sem de lab
 
Digital logic
Digital logicDigital logic
Digital logic
 
Logic gates and Boolean.pdf
Logic gates and Boolean.pdfLogic gates and Boolean.pdf
Logic gates and Boolean.pdf
 
Basic logic gates
Basic logic gatesBasic logic gates
Basic logic gates
 
Logic gates
Logic gatesLogic gates
Logic gates
 
DOC-20240203-WA0000.pptx
DOC-20240203-WA0000.pptxDOC-20240203-WA0000.pptx
DOC-20240203-WA0000.pptx
 
Plc 2
Plc 2Plc 2
Plc 2
 
logic gates
logic gates logic gates
logic gates
 
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates. Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
Logic gates - AND, OR, NOT, NOR, NAND, XOR, XNOR Gates.
 
Logic gates and Digital system.pptx
Logic gates and Digital system.pptxLogic gates and Digital system.pptx
Logic gates and Digital system.pptx
 
solids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.pptsolids_and_semiconductor_devices_4.ppt
solids_and_semiconductor_devices_4.ppt
 
Solids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.pptSolids_And_Semiconductor_Devices_4.ppt
Solids_And_Semiconductor_Devices_4.ppt
 
Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4Semiconductor Devices Class 12 Part-4
Semiconductor Devices Class 12 Part-4
 
Logic gatesrevised.ppt
Logic gatesrevised.pptLogic gatesrevised.ppt
Logic gatesrevised.ppt
 
Logic gates
Logic gatesLogic gates
Logic gates
 
perform operation with boolean algebra
perform operation with boolean algebraperform operation with boolean algebra
perform operation with boolean algebra
 
Components logic gates
Components   logic gatesComponents   logic gates
Components logic gates
 
Digital logic Gates of Computer Science
Digital logic Gates of Computer ScienceDigital logic Gates of Computer Science
Digital logic Gates of Computer Science
 

Mehr von Eko Supriyadi

Bahan tayang dupak terbaru ( DUPAK )
Bahan tayang dupak terbaru ( DUPAK )Bahan tayang dupak terbaru ( DUPAK )
Bahan tayang dupak terbaru ( DUPAK )
Eko Supriyadi
 
Bahan evaluasi pembelajarann 2
Bahan evaluasi pembelajarann   2Bahan evaluasi pembelajarann   2
Bahan evaluasi pembelajarann 2
Eko Supriyadi
 
Penyajian dan Penafsiran Data Tunggal
Penyajian dan Penafsiran Data TunggalPenyajian dan Penafsiran Data Tunggal
Penyajian dan Penafsiran Data Tunggal
Eko Supriyadi
 
Jaring jaring Bangun Ruang Kelas 5
Jaring jaring Bangun Ruang Kelas 5Jaring jaring Bangun Ruang Kelas 5
Jaring jaring Bangun Ruang Kelas 5
Eko Supriyadi
 
Perkalian dan Pembagian Pecahan Kelas 5
Perkalian dan Pembagian Pecahan Kelas 5Perkalian dan Pembagian Pecahan Kelas 5
Perkalian dan Pembagian Pecahan Kelas 5
Eko Supriyadi
 
2. model pembelajaran lengkap
2. model pembelajaran lengkap2. model pembelajaran lengkap
2. model pembelajaran lengkap
Eko Supriyadi
 
2. model pembelajaran 2013 2017
2. model pembelajaran 2013 20172. model pembelajaran 2013 2017
2. model pembelajaran 2013 2017
Eko Supriyadi
 

Mehr von Eko Supriyadi (20)

Bahan tayang dupak terbaru ( DUPAK )
Bahan tayang dupak terbaru ( DUPAK )Bahan tayang dupak terbaru ( DUPAK )
Bahan tayang dupak terbaru ( DUPAK )
 
Bahan evaluasi pembelajarann 2
Bahan evaluasi pembelajarann   2Bahan evaluasi pembelajarann   2
Bahan evaluasi pembelajarann 2
 
Penyajian dan Penafsiran Data Tunggal
Penyajian dan Penafsiran Data TunggalPenyajian dan Penafsiran Data Tunggal
Penyajian dan Penafsiran Data Tunggal
 
Jaring jaring Bangun Ruang Kelas 5
Jaring jaring Bangun Ruang Kelas 5Jaring jaring Bangun Ruang Kelas 5
Jaring jaring Bangun Ruang Kelas 5
 
Volume Kubus dan Balok
Volume Kubus dan BalokVolume Kubus dan Balok
Volume Kubus dan Balok
 
Denah dan Skala Kelas 5
Denah dan Skala Kelas 5Denah dan Skala Kelas 5
Denah dan Skala Kelas 5
 
Kecepatan dan Debit air
Kecepatan dan Debit airKecepatan dan Debit air
Kecepatan dan Debit air
 
Perkalian dan Pembagian Pecahan Kelas 5
Perkalian dan Pembagian Pecahan Kelas 5Perkalian dan Pembagian Pecahan Kelas 5
Perkalian dan Pembagian Pecahan Kelas 5
 
Penilaian hots sd
Penilaian hots sdPenilaian hots sd
Penilaian hots sd
 
2. model pembelajaran lengkap
2. model pembelajaran lengkap2. model pembelajaran lengkap
2. model pembelajaran lengkap
 
2. model pembelajaran 2013 2017
2. model pembelajaran 2013 20172. model pembelajaran 2013 2017
2. model pembelajaran 2013 2017
 
Rpp smk agustus 2019
Rpp  smk agustus  2019Rpp  smk agustus  2019
Rpp smk agustus 2019
 
Ppt metamorfosis kelas vi
Ppt metamorfosis kelas viPpt metamorfosis kelas vi
Ppt metamorfosis kelas vi
 
Ppt darah kelas vi
Ppt darah kelas viPpt darah kelas vi
Ppt darah kelas vi
 
Ppt bumi bulan kelas vi
Ppt bumi bulan kelas viPpt bumi bulan kelas vi
Ppt bumi bulan kelas vi
 
Penilaian sd 2018 lengkap
Penilaian sd 2018 lengkapPenilaian sd 2018 lengkap
Penilaian sd 2018 lengkap
 
Soal pretest revisi Prajab
Soal pretest revisi PrajabSoal pretest revisi Prajab
Soal pretest revisi Prajab
 
Soal pretest revisi
Soal pretest revisiSoal pretest revisi
Soal pretest revisi
 
Pre tes prajab
Pre tes prajabPre tes prajab
Pre tes prajab
 
Pola pikir asn sbg pelayan masyarakat
Pola pikir asn sbg pelayan masyarakatPola pikir asn sbg pelayan masyarakat
Pola pikir asn sbg pelayan masyarakat
 

KĂŒrzlich hochgeladen

Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Safe Software
 
Finding Java's Hidden Performance Traps @ DevoxxUK 2024
Finding Java's Hidden Performance Traps @ DevoxxUK 2024Finding Java's Hidden Performance Traps @ DevoxxUK 2024
Finding Java's Hidden Performance Traps @ DevoxxUK 2024
Victor Rentea
 
Why Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businessWhy Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire business
panagenda
 

KĂŒrzlich hochgeladen (20)

Vector Search -An Introduction in Oracle Database 23ai.pptx
Vector Search -An Introduction in Oracle Database 23ai.pptxVector Search -An Introduction in Oracle Database 23ai.pptx
Vector Search -An Introduction in Oracle Database 23ai.pptx
 
Strategies for Landing an Oracle DBA Job as a Fresher
Strategies for Landing an Oracle DBA Job as a FresherStrategies for Landing an Oracle DBA Job as a Fresher
Strategies for Landing an Oracle DBA Job as a Fresher
 
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers:  A Deep Dive into Serverless Spatial Data and FMECloud Frontiers:  A Deep Dive into Serverless Spatial Data and FME
Cloud Frontiers: A Deep Dive into Serverless Spatial Data and FME
 
Repurposing LNG terminals for Hydrogen Ammonia: Feasibility and Cost Saving
Repurposing LNG terminals for Hydrogen Ammonia: Feasibility and Cost SavingRepurposing LNG terminals for Hydrogen Ammonia: Feasibility and Cost Saving
Repurposing LNG terminals for Hydrogen Ammonia: Feasibility and Cost Saving
 
Mcleodganj Call Girls đŸ„° 8617370543 Service Offer VIP Hot Model
Mcleodganj Call Girls đŸ„° 8617370543 Service Offer VIP Hot ModelMcleodganj Call Girls đŸ„° 8617370543 Service Offer VIP Hot Model
Mcleodganj Call Girls đŸ„° 8617370543 Service Offer VIP Hot Model
 
Polkadot JAM Slides - Token2049 - By Dr. Gavin Wood
Polkadot JAM Slides - Token2049 - By Dr. Gavin WoodPolkadot JAM Slides - Token2049 - By Dr. Gavin Wood
Polkadot JAM Slides - Token2049 - By Dr. Gavin Wood
 
Boost Fertility New Invention Ups Success Rates.pdf
Boost Fertility New Invention Ups Success Rates.pdfBoost Fertility New Invention Ups Success Rates.pdf
Boost Fertility New Invention Ups Success Rates.pdf
 
Finding Java's Hidden Performance Traps @ DevoxxUK 2024
Finding Java's Hidden Performance Traps @ DevoxxUK 2024Finding Java's Hidden Performance Traps @ DevoxxUK 2024
Finding Java's Hidden Performance Traps @ DevoxxUK 2024
 
Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...
Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...
Biography Of Angeliki Cooney | Senior Vice President Life Sciences | Albany, ...
 
Connector Corner: Accelerate revenue generation using UiPath API-centric busi...
Connector Corner: Accelerate revenue generation using UiPath API-centric busi...Connector Corner: Accelerate revenue generation using UiPath API-centric busi...
Connector Corner: Accelerate revenue generation using UiPath API-centric busi...
 
Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...
 
Elevate Developer Efficiency & build GenAI Application with Amazon Q​
Elevate Developer Efficiency & build GenAI Application with Amazon Q​Elevate Developer Efficiency & build GenAI Application with Amazon Q​
Elevate Developer Efficiency & build GenAI Application with Amazon Q​
 
Introduction to Multilingual Retrieval Augmented Generation (RAG)
Introduction to Multilingual Retrieval Augmented Generation (RAG)Introduction to Multilingual Retrieval Augmented Generation (RAG)
Introduction to Multilingual Retrieval Augmented Generation (RAG)
 
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, AdobeApidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
 
Why Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire businessWhy Teams call analytics are critical to your entire business
Why Teams call analytics are critical to your entire business
 
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
Apidays New York 2024 - The Good, the Bad and the Governed by David O'Neill, ...
 
MINDCTI Revenue Release Quarter One 2024
MINDCTI Revenue Release Quarter One 2024MINDCTI Revenue Release Quarter One 2024
MINDCTI Revenue Release Quarter One 2024
 
Corporate and higher education May webinar.pptx
Corporate and higher education May webinar.pptxCorporate and higher education May webinar.pptx
Corporate and higher education May webinar.pptx
 
MS Copilot expands with MS Graph connectors
MS Copilot expands with MS Graph connectorsMS Copilot expands with MS Graph connectors
MS Copilot expands with MS Graph connectors
 
Rising Above_ Dubai Floods and the Fortitude of Dubai International Airport.pdf
Rising Above_ Dubai Floods and the Fortitude of Dubai International Airport.pdfRising Above_ Dubai Floods and the Fortitude of Dubai International Airport.pdf
Rising Above_ Dubai Floods and the Fortitude of Dubai International Airport.pdf
 

Logic gates

  • 1. Logic Gates Gate types: NOT | AND | NAND | OR | NOR | EX-OR | EX-NOR Symbols | Truth tables | Logic ICs | Summary truth tables | Combinations | Substituting Next Page: Capacitance and Uses of Capacitors Also see: Logic ICs | 4000 Series | 74 Series Logic states True False 1 0 High Low +Vs 0V On Off Introduction Logic gates process signals which represent true or false. Normally the positive supply voltage +Vs represents true and 0V represents false. Other terms which are used for the true and false states are shown in the table on the right. It is best to be familiar with them all. Gates are identified by their function: NOT, AND, NAND, OR, NOR, EX-OR and EX- NOR. Capital letters are normally used to make it clear that the term refers to a logic gate. Note that logic gates are not always required because simple logic functions can be performed with switches or diodes: ‱ Switches in series (AND function) ‱ Switches in parallel (OR function) ‱ Combining chip outputs with diodes (OR function) Logic gate symbols There are two series of symbols for logic gates: ‱ The traditional symbols have distinctive shapes making them easy to recognise so they are widely used in industry and education.
  • 2. ‱ The IEC (International Electrotechnical Commission) symbols are rectangles with a symbol inside to show the gate function. They are rarely used despite their official status, but you may need to know them for an examination. Inputs and outputs Gates have two or more inputs, except a NOT gate which has only one input. All gates have only one output. Usually the letters A, B, C and so on are used to label inputs, and Q is used to label the output. On this page the inputs are shown on the left and the output on the right. The inverting circle (o) Some gate symbols have a circle on their output which means that their function includes inverting of the output. It is equivalent to feeding the output through a NOT gate. For example the NAND (Not AND) gate symbol shown on the right is the same as an AND gate symbol but with the addition of an inverting circle on the output. Input A Input B Output Q 0 0 0 0 1 0 1 0 0 1 1 1 Truth tables A truth table is a good way to show the function of a logic gate. It shows the output states for every possible combination of input states. The symbols 0 (false) and 1 (true) are usually used in truth tables. The example truth table on the right shows the inputs and output of an AND gate.
  • 3. There are summary truth tables below showing the output states for all types of 2-input and 3-input gates. These can be helpful if you are trying to select a suitable gate. Logic ICs Logic gates are available on special ICs (chips) which usually contain several gates of the same type, for example the 4001 IC contains four 2-input NOR gates. There are several families of logic ICs and they can be split into two groups: ‱ 4000 Series ‱ 74 Series To quickly compare the different families please see: ‱ Summary table of logic families The 4000 and 74HC families are the best for battery powered projects because they will work with a good range of supply voltages and they use very little power. However, if you are using them to design circuits and investigate logic gates please remember that all unused inputs MUST be connected to the power supply (either +Vs or 0V), this applies even if that part of the IC is not being used in the circuit! NOT gate (inverter) The output Q is true when the input A is NOT true, the output is the inverse of the input: Q = NOT A A NOT gate can only have one input. A NOT gate is also called an inverter. Input A Output Q 0 1 1 0 Traditional symbol IEC symbol Truth Table AND gate The output Q is true if input A AND input B are both true: Q = A AND B An AND gate can have two or more inputs, its output is true if all inputs are true.
  • 4. Input A Input B Output Q 0 0 0 0 1 0 1 0 0 1 1 1 Traditional symbol IEC symbol Truth Table NAND gate (NAND = Not AND) This is an AND gate with the output inverted, as shown by the 'o' on the output. The output is true if input A AND input B are NOT both true: Q = NOT (A AND B) A NAND gate can have two or more inputs, its output is true if NOT all inputs are true. Input A Input B Output Q 0 0 1 0 1 1 1 0 1 1 1 0 Traditional symbol IEC symbol Truth Table OR gate The output Q is true if input A OR input B is true (or both of them are true): Q = A OR B An OR gate can have two or more inputs, its output is true if at least one input is true. Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 1 Traditional symbol IEC symbol Truth Table NOR gate (NOR = Not OR)
  • 5. This is an OR gate with the output inverted, as shown by the 'o' on the output. The output Q is true if NOT inputs A OR B are true: Q = NOT (A OR B) A NOR gate can have two or more inputs, its output is true if no inputs are true. Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 0 Traditional symbol IEC symbol Truth Table EX-OR (EXclusive-OR) gate The output Q is true if either input A is true OR input B is true, but not when both of them are true: Q = (A AND NOT B) OR (B AND NOT A) This is like an OR gate but excluding both inputs being true. The output is true if inputs A and B are DIFFERENT. EX-OR gates can only have 2 inputs. Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 0 Traditional symbol IEC symbol Truth Table EX-NOR (EXclusive-NOR) gate This is an EX-OR gate with the output inverted, as shown by the 'o' on the output. The output Q is true if inputs A and B are the SAME (both true or both false): Q = (A AND B) OR (NOT A AND NOT B) EX-NOR gates can only have 2 inputs. Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 1
  • 6. Traditional symbol IEC symbol Truth Table Summary truth tables The summary truth tables below show the output states for all types of 2-input and 3- input gates. Summary for all 2-input gates Summary for all 3-input gates Inputs Output of each gate Inputs Output of each gate EX- EX- A B C AND NAND OR NOR A B AND NAND OR NOR OR NOR 0 0 0 0 1 0 1 0 0 0 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 0 1 0 0 1 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 1 0 1 1 1 0 1 0 0 1 1 0 0 0 1 1 0 1 0 1 0 1 1 0 1 1 0 0 1 1 0 Note that EX-OR and EX-NOR gates can only have 2 inputs. 1 1 1 1 0 1 0 Combinations of logic gates Input A Input B Output Q 0 0 0 0 1 0 1 0 1 1 1 0 Logic gates can be combined to produce more complex functions. They can also be combined to substitute one type of gate for another. For example to produce an output Q which is true only when input A is true and input B is false, as shown in the truth table on the right, we can combine a NOT gate and an AND gate like this:
  • 7. Inputs Outputs A B C D E Q 0 0 0 1 0 1 0 0 1 1 0 1 0 1 0 0 0 0 0 1 1 0 1 1 1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 1 1 Q = A AND NOT B Working out the function of a combination of gates Truth tables can be used to work out the function of a combination of gates. For example the truth table on the right show the intermediate outputs D and E as well as the final output Q for the system shown below. D = NOT (A OR B) E = B AND C Q = D OR E = (NOT (A OR B)) OR (B AND C) Substituting one type of gate for another
  • 8. Logic gates are available on ICs which usually contain several gates of the same type, for example four 2-input NAND gates or three 3-input NAND gates. This can be wasteful if only a few gates are required unless they are all the same type. To avoid using too many ICs you can reduce the number of gate inputs or substitute one type of gate for another. Reducing the number of inputs The number of inputs to a gate can be reduced by connecting two (or more) inputs together. The diagram shows a 3-input AND gate operating as a 2-input AND gate. Making a NOT gate from a NAND or NOR gate Reducing a NAND or NOR gate to just one input creates a NOT gate. The diagram shows this for a 2-input NAND gate. Any gate can be built from NAND or NOR gates As well as making a NOT gate, NAND or NOR gates can be combined to create any type of gate! This enables a circuit to be built from just one type of gate, either NAND or NOR. For example an AND gate is a NAND gate then a NOT gate (to undo the inverting function). Note that AND and OR gates cannot be used to create other gates because they lack the inverting (NOT) function. To change the type of gate, such as changing OR to AND, you must do three things: ‱ Invert (NOT) each input. ‱ Change the gate type (OR to AND, or AND to OR) ‱ Invert (NOT) the output. For example an OR gate can be built from NOTed inputs fed into a NAND (AND + NOT) gate. NAND gate equivalents The table below shows the NAND gate equivalents of NOT, AND, OR and NOR gates: Gate Equivalent in NAND gates NOT
  • 9. AND OR NOR Substituting gates in an example logic system The original system has 3 different gates: NOR, AND and OR. This requires three ICs (one for each type of gate). To re-design this system using NAND gates only begin by replacing each gate with its NAND gate equivalent, as shown in the diagram below.
  • 10. Then simplify the system by deleting adjacent pairs of NOT gates (marked X above). This can be done because the second NOT gate cancels the action of the first. The final system is shown on the right. It has five NAND gates and requires two ICs (with four gates on each IC). This is better than the original system which required three ICs (one for each type of gate). Substituting NAND (or NOR) gates does not always increase the number of gates, but when it does (as in this example) the increase is usually only one or two gates. The real benefit is reducing the number of ICs required by using just one type of gate.