SlideShare ist ein Scribd-Unternehmen logo
1 von 35
Downloaden Sie, um offline zu lesen
Minimisation of crosstalk in VLSI
          ROUTING
            Chandrajit Pal
       University of Calcutta
           SPRING 2010
      palchandrajit@gmail.com


                                    1
Dedicated to my Sir



         Dr. Amlan Chakrabarti




                                 2
Index
•   ROUTING
•   CROSSTALK OVERVIEW
•   EFFECTS OF CROSSTALK
•   APPROACHES TO AVOID CROSSTALK
•   METHODS TO MINIMISE CROSSTALK
•   CONCLUSION
•   REFERENCES

                                    3
Routing

• Problem
      Given a placement, and a fixed number of metal
      layers, find a valid pattern of horizontal and vertical
      wires that connect the terminals of the nets
Levels of abstraction:
 Global routing
 Detailed routing
• Objectives
     Cost components:
       1. Area (channel width) – min congestion
       2. Wire delays – timing minimization in previous levels
       3. Number of layers (fewer layers less expensive)
       4. Additional cost components: number of bends, vias
       5. Minimisation of crosstalk


                                                                 4
Fig: shows top view ,3D view and conceptual layout


                                                     5
Global vs. Detailed Routing

• Global routing
    Input: detailed placement, with exact
           terminal locations
    Determine “channel” (routing region)
     for each net
     Objective: minimize area (congestion),
     and timing (approximate)

• Detailed routing
     Input: channels and approximate
     routing from the global routing phase
     Determine the exact route and layers
     for each net
     Objective: valid routing, minimize area
     (congestion), meet timing constraints
     Additional objectives: min via, power


                                                    6
7
Multiple Terminal nets:Steiner Tree

Steiner tree(aka Rectilinear Steiner tree- RST):
   A tree connecting multiple terminals.
       Original points:”Demand points”- set D.
       Added points:”Steiner points”- set S.
   Edges horizontal or vertical only.
Steiner Minimum Tree (SMT)
   Similar to minimum spanning tree (MST)
    – But finding SMT is NP-complete
   Many good heuristics introduced to find SMT
Algorithm
     1 . Find MST
     2 . Pass horizontal and vertical lines from each terminal to
    get the Hannan grid (optimal solution is on this grid)
     3. Convert each edge of the MST to an L-shaped route
     on Hannan grid (add a Steiner point at the corner of L)


                                                                    8
9
10
VLSI trends:
   –     Device size is decreasing.
   –     Increase the no of transistors, interconnection wires
   – Size of the channel is decreased.


   Effects:
    Increasing coupling effect (inductive & capacitive) between
      interconnection wires
   Result:
       crosstalk




                                                                  11
Topic

A BRIEF DISCUSSION ON
CROSSTALK IN VLSI CIRCUITS.




                              12
Mutual Inductance and Capacitance
Crosstalk is the coupling of energy from one line to another via :
Mutual inductance(magnetic field)
Mutual capacitance(electric field)




                                                                13
Mutual Inductance and Capacitance
Mechanism of coupling
the circuit element representing this transfer of energy are the familiar
   equations:
                 Δ IB= -Cm d(VB - VA)        and     Δ VB= -Lm dIA
                                dt                             dt




Mutual inductance will induce current on the victim line opposite of the driving
  current(Lenz’s Law).


                                                                                   14
Crosstalk induced noise
The near and far end victim line currents sum to produce the near
and far end crosstalk noise.
Coupled currents:




    I near=Icm + I lm                      I far=Icm - I lm

    • Current induced by capacitive coupling goes to both directions
    • Current induced by inductive coupling goes opposite to the drive current
                                                                                 15
Crosstalk induced noise
“Voltage profile of coupled noise”

• Near end crosstalk is always positive
• currents from Lm and Cm always add and flow into the node.

• For PCB’s far end crosstalk is “usually” negative
•   current due to Lm larger than current due to Cm.
•   Note that far end crosstalk can be positive.




                                                               16
Noise: A Key Stopper in Mixed Signal Systems




  Skin effect.
  Dielectric absorption
                                               17
Major effects of crosstalk

1. Signal Integrity illustration




                                   18
Effects of crosstalk (contd…)

2. Noise-on-delay effect:Crosstalk




                                     19
Effects of crosstalk (contd…)

3.Crosstalk can lead to :
     - logic faults(especially in dynamic circuits).
     - Voltage overshoot(stress,forward biased PN junctions)

4. When noise acts against a normally static signal, it can destroy the
   local information carried by the static node in the circuit and
   ultimately result in incorrect machine-state stored in a latch.
5.Timing noise
      skew(DC component of timing noise).
       jitter(AC component of timing noise).
6. EMI and violation of EMC requirements.



                                                                          20
Basic Approaches in Crosstalk Avoidance

Segregation / Spacing / Ground Shielding (1)

       Segregation                            Spacing




                                                          21
Segregation / Spacing / Ground Shielding (2)

• Segregation : Dividing many
  (noisy) and less(quiet) signal
  transition wire and merging
  group by group.(use with
  shielding)

• Spacing : the method that
  signal wire to shun each other,
  when signal net is close to
  each other (routing channel is
  not wide)

• Shielding : blocking signal line
  with ground line to minimize
  signal interference to the other
  wire.(ground bounce occurs
  and must broaden the ground
  line)
                                               22
Net Ordering
    Net ordering is used for minimize crosstalk-critical region between each lines.
     When, long line and long line is close together, crosstalk between them is more
     larger than long line and short line. So, we must change the permutation of track
     for minimizing crosstalk.




•    Left : Unordered
     track permutation

•    Right : Ordered
     track permutation
     for minimizing
     crosstalk



                                                                                         23
Layer Assignment

 When using more than 3 layer in channel routing, adjacent signal
  wire in same layer results crosstalk. For example, left figure makes
  more crosstalk than right.
 Layer assignment problem is solved by integer linear programming
  or dynamic programming method.




                                                                         24
Various Techniques To Reduce
          Crosstalk
  The following PCB design techniques can significantly
  reduce crosstalk in micro-strip or strip-line layouts:
  SOME TECHNIQUES ARE A RULE OF THUMB.




                                                           25
1. Widen spacing S between the signallines as much as routing restrictions will allow.
2. Design the transmission line so that the conductor is as close to the ground plane as
   possible. This couples the transmission line tightly to the ground plane and helps
   decouple it from adjacent signals.
3. Use differential routing techniques where possible, especially for critical nets.
4. Route signals on different layers orthogonal to each other, if there is significant coupling.
5. Minimize parallel run lengths between signals, routing with short parallel sections
   and minimize long coupled sections between nets.                                       26
CROSSTALK ESTIMATION

Crosstalk-estimation:
     Bounded partitioning:
         partitions the X-talk bound of each net into the regions its go
         through
      Net ordering:
         orders the net in each regions to require as few spare track as
         possible




                                                                           27
Crosstalk Constraints Global Routing
               (CCGR)
• NP-hard problem
• Two stage heuristic approach
  – New Steiner tree formulation to minimize the total X-talk.
  – X-talk on each net is estimated.
  – nets having X-talk violation is then ripped up and re-routed




                                                                   28
6.Minimum X-talk Steiner tree
 Routing graph G={V,E}
 Minimized X-talk Extended Global Routing solution       for nets 1…. M-1
  is given
 Place Mth net such that routing topologies for 1 ………. M-1 are kept and
  total X-talk is minimized


      Rip-Up & Rerouting
      If solution violates crosstalk constraints
      Rip-up them
      Re-route them one net at a time in the order of
      decreasing violation

                                                                           29
EXAMPLE




Nets 1,2,3,4, are routed and net 5 is   Shortest path root (not
{p1 & p2} c1=2,c2=3,c3=30,              feasible): r1=12,r2=20,r3=4,
c4=36,c5=35                             r4=0,r5=32



                                                                       30
Examples Continues…..




                                 Optimal Solution:
   Minimum X-talk root (not
                                 r1=0,r2=2,r3=19, r4=15,r5=32
   feasible): r1=11,r2=2,r3=4,
   r4=0,r5=13


                                                            31
Crosstalk reduction techniques(contd…)
7. Overcome the impedance mismatch by different termination
   schemes.

    A simple parallel termination scheme is shown below.




                                                              32
Crosstalk reduction techniques(contd…)

 8. A structure for reducing crosstalk in VLSI circuits :
         the empty areas(3) are filled with ground connections(7 & 11) fig2 below




                                                                                    33
Conclusion
 NP-hard problem.

 Many others approaches are available.

 Some GA based approaches are very successfully implemented

 Optimal Solution are taken because some other constraints are there like
  wire length and congestion .

 Also add routing of virtex 5 diagonal from whitepaper




                                                                             34
References
1.     “Global Routing with Crosstalk Constraints”
       Haj Zhou and D.F. Wong Department of Computer Science, University of Texas
2.      VLSI Design Shaahin Hessabi Department of Computer Engineering,
        Sharif University of Technology.
3.      VLSI Design Automation I – © Kia Bazargan
4.      J. J. Xiong and L. He. IEEE Trans on CAD, 2008
5.      ALTERA WHITE PAPER,basic principles of signal integrity.
6.       Crosstalk-ConstrainedMaze Routing Based on Lagrangian Relaxation
          Hai Zhou and D.F. Wong Department of Computer Sciences University of Texas
     at Austin Austin, TX 78712-1188

7.     US PATIENT ,PATIENT NO:US 6,218,631 B1
8.     WIRES AS INTERCONNECTS
       Li-Rong Zheng and Hannu Tenhunen
       Royal Institute of Technology (KTH), Stockholm, Sweden
       lirong@imit.kth.se, hannu@imit.kth.se

                                                                                       35

Weitere ähnliche Inhalte

Was ist angesagt?

Placement and routing in full custom physical design
Placement and routing in full custom physical designPlacement and routing in full custom physical design
Placement and routing in full custom physical design
Deiptii Das
 
Vlsi physical design
Vlsi physical designVlsi physical design
Vlsi physical design
I World Tech
 

Was ist angesagt? (20)

Asic backend design
Asic backend designAsic backend design
Asic backend design
 
Floor plan & Power Plan
Floor plan & Power Plan Floor plan & Power Plan
Floor plan & Power Plan
 
Crosstalk.pdf
Crosstalk.pdfCrosstalk.pdf
Crosstalk.pdf
 
Placement and routing in full custom physical design
Placement and routing in full custom physical designPlacement and routing in full custom physical design
Placement and routing in full custom physical design
 
Low Power Techniques
Low Power TechniquesLow Power Techniques
Low Power Techniques
 
GUI for DRV fix in ICC2
GUI for DRV fix in ICC2GUI for DRV fix in ICC2
GUI for DRV fix in ICC2
 
Floorplanning in physical design
Floorplanning in physical designFloorplanning in physical design
Floorplanning in physical design
 
VLSI circuit design process
VLSI circuit design processVLSI circuit design process
VLSI circuit design process
 
Flip Chip technology
Flip Chip technologyFlip Chip technology
Flip Chip technology
 
Vlsi Synthesis
Vlsi SynthesisVlsi Synthesis
Vlsi Synthesis
 
Vlsi physical design
Vlsi physical designVlsi physical design
Vlsi physical design
 
Multi mode multi corner (mmmc)
Multi mode multi corner (mmmc)Multi mode multi corner (mmmc)
Multi mode multi corner (mmmc)
 
STA.pdf
STA.pdfSTA.pdf
STA.pdf
 
2Overview of Primetime.pptx
2Overview of Primetime.pptx2Overview of Primetime.pptx
2Overview of Primetime.pptx
 
Timing and Design Closure in Physical Design Flows
Timing and Design Closure in Physical Design Flows Timing and Design Closure in Physical Design Flows
Timing and Design Closure in Physical Design Flows
 
Implementing Useful Clock Skew Using Skew Groups
Implementing Useful Clock Skew Using Skew GroupsImplementing Useful Clock Skew Using Skew Groups
Implementing Useful Clock Skew Using Skew Groups
 
ASIC Design Flow | Physical Design | VLSI
ASIC Design Flow | Physical Design | VLSI ASIC Design Flow | Physical Design | VLSI
ASIC Design Flow | Physical Design | VLSI
 
Physical Verification Design.pdf
Physical Verification Design.pdfPhysical Verification Design.pdf
Physical Verification Design.pdf
 
Standard-Cells.pdf
Standard-Cells.pdfStandard-Cells.pdf
Standard-Cells.pdf
 
Understanding cts log_messages
Understanding cts log_messagesUnderstanding cts log_messages
Understanding cts log_messages
 

Ähnlich wie minimisation of crosstalk in VLSI routing

High Performance Printed Circuit Boards - Lecture #3
High Performance Printed Circuit Boards - Lecture #3High Performance Printed Circuit Boards - Lecture #3
High Performance Printed Circuit Boards - Lecture #3
Samsung Electro-Mechanics
 
1999 si pi_dws_training_course
1999 si pi_dws_training_course1999 si pi_dws_training_course
1999 si pi_dws_training_course
Piero Belforte
 
High speed board design considerations
High speed board design considerationsHigh speed board design considerations
High speed board design considerations
Mohamad Tisani
 
Class06 transmission line_basics
Class06 transmission line_basicsClass06 transmission line_basics
Class06 transmission line_basics
s.p.c.e.t.
 
Parameters of multipath channel
Parameters of multipath channelParameters of multipath channel
Parameters of multipath channel
Naveen Kumar
 
Class06_Transmission_line_basics.ppt
Class06_Transmission_line_basics.pptClass06_Transmission_line_basics.ppt
Class06_Transmission_line_basics.ppt
DOAFCLF
 
Signal Integrity - A Crash Course [R Lott]
Signal Integrity - A Crash Course [R Lott]Signal Integrity - A Crash Course [R Lott]
Signal Integrity - A Crash Course [R Lott]
Ryan Lott
 
Pcb carolina scg_2010
Pcb carolina scg_2010Pcb carolina scg_2010
Pcb carolina scg_2010
tcoyle72
 
Pcb carolina scg_2010
Pcb carolina scg_2010Pcb carolina scg_2010
Pcb carolina scg_2010
tcoyle72
 

Ähnlich wie minimisation of crosstalk in VLSI routing (20)

High Performance Printed Circuit Boards - Lecture #3
High Performance Printed Circuit Boards - Lecture #3High Performance Printed Circuit Boards - Lecture #3
High Performance Printed Circuit Boards - Lecture #3
 
1999 si pi_dws_training_course
1999 si pi_dws_training_course1999 si pi_dws_training_course
1999 si pi_dws_training_course
 
High speed board design considerations
High speed board design considerationsHigh speed board design considerations
High speed board design considerations
 
Interconnect timing model
Interconnect  timing modelInterconnect  timing model
Interconnect timing model
 
Terminaters
TerminatersTerminaters
Terminaters
 
Popular Interview Wireless Question with Answer
Popular Interview Wireless Question with AnswerPopular Interview Wireless Question with Answer
Popular Interview Wireless Question with Answer
 
Class06 transmission line_basics
Class06 transmission line_basicsClass06 transmission line_basics
Class06 transmission line_basics
 
Ec 2401 wireless communication unit 2
Ec 2401 wireless communication   unit 2Ec 2401 wireless communication   unit 2
Ec 2401 wireless communication unit 2
 
f2001_landinger.ppt
f2001_landinger.pptf2001_landinger.ppt
f2001_landinger.ppt
 
The wire
The wireThe wire
The wire
 
Parameters of multipath channel
Parameters of multipath channelParameters of multipath channel
Parameters of multipath channel
 
Precoding
PrecodingPrecoding
Precoding
 
mobile radio propagation and fading
mobile radio propagation and fading mobile radio propagation and fading
mobile radio propagation and fading
 
Basics of Patch antenna
Basics of Patch antennaBasics of Patch antenna
Basics of Patch antenna
 
Class06_Transmission_line_basics.ppt
Class06_Transmission_line_basics.pptClass06_Transmission_line_basics.ppt
Class06_Transmission_line_basics.ppt
 
Multiband Transceivers - [Chapter 4] Design Parameters of Wireless Radios
Multiband Transceivers - [Chapter 4] Design Parameters of Wireless RadiosMultiband Transceivers - [Chapter 4] Design Parameters of Wireless Radios
Multiband Transceivers - [Chapter 4] Design Parameters of Wireless Radios
 
Signal Integrity - A Crash Course [R Lott]
Signal Integrity - A Crash Course [R Lott]Signal Integrity - A Crash Course [R Lott]
Signal Integrity - A Crash Course [R Lott]
 
Layout & Stick Diagram Design Rules
Layout & Stick Diagram Design RulesLayout & Stick Diagram Design Rules
Layout & Stick Diagram Design Rules
 
Pcb carolina scg_2010
Pcb carolina scg_2010Pcb carolina scg_2010
Pcb carolina scg_2010
 
Pcb carolina scg_2010
Pcb carolina scg_2010Pcb carolina scg_2010
Pcb carolina scg_2010
 

Kürzlich hochgeladen

Histor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slideHistor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slide
vu2urc
 

Kürzlich hochgeladen (20)

Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processors
 
Handwritten Text Recognition for manuscripts and early printed texts
Handwritten Text Recognition for manuscripts and early printed textsHandwritten Text Recognition for manuscripts and early printed texts
Handwritten Text Recognition for manuscripts and early printed texts
 
Axa Assurance Maroc - Insurer Innovation Award 2024
Axa Assurance Maroc - Insurer Innovation Award 2024Axa Assurance Maroc - Insurer Innovation Award 2024
Axa Assurance Maroc - Insurer Innovation Award 2024
 
A Year of the Servo Reboot: Where Are We Now?
A Year of the Servo Reboot: Where Are We Now?A Year of the Servo Reboot: Where Are We Now?
A Year of the Servo Reboot: Where Are We Now?
 
Strategies for Landing an Oracle DBA Job as a Fresher
Strategies for Landing an Oracle DBA Job as a FresherStrategies for Landing an Oracle DBA Job as a Fresher
Strategies for Landing an Oracle DBA Job as a Fresher
 
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
 
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
 
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
 
Histor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slideHistor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slide
 
From Event to Action: Accelerate Your Decision Making with Real-Time Automation
From Event to Action: Accelerate Your Decision Making with Real-Time AutomationFrom Event to Action: Accelerate Your Decision Making with Real-Time Automation
From Event to Action: Accelerate Your Decision Making with Real-Time Automation
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt Robison
 
HTML Injection Attacks: Impact and Mitigation Strategies
HTML Injection Attacks: Impact and Mitigation StrategiesHTML Injection Attacks: Impact and Mitigation Strategies
HTML Injection Attacks: Impact and Mitigation Strategies
 
[2024]Digital Global Overview Report 2024 Meltwater.pdf
[2024]Digital Global Overview Report 2024 Meltwater.pdf[2024]Digital Global Overview Report 2024 Meltwater.pdf
[2024]Digital Global Overview Report 2024 Meltwater.pdf
 
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, AdobeApidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
Apidays New York 2024 - Scaling API-first by Ian Reasor and Radu Cotescu, Adobe
 
Driving Behavioral Change for Information Management through Data-Driven Gree...
Driving Behavioral Change for Information Management through Data-Driven Gree...Driving Behavioral Change for Information Management through Data-Driven Gree...
Driving Behavioral Change for Information Management through Data-Driven Gree...
 
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemkeProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
ProductAnonymous-April2024-WinProductDiscovery-MelissaKlemke
 
Strategize a Smooth Tenant-to-tenant Migration and Copilot Takeoff
Strategize a Smooth Tenant-to-tenant Migration and Copilot TakeoffStrategize a Smooth Tenant-to-tenant Migration and Copilot Takeoff
Strategize a Smooth Tenant-to-tenant Migration and Copilot Takeoff
 
Tech Trends Report 2024 Future Today Institute.pdf
Tech Trends Report 2024 Future Today Institute.pdfTech Trends Report 2024 Future Today Institute.pdf
Tech Trends Report 2024 Future Today Institute.pdf
 
Understanding Discord NSFW Servers A Guide for Responsible Users.pdf
Understanding Discord NSFW Servers A Guide for Responsible Users.pdfUnderstanding Discord NSFW Servers A Guide for Responsible Users.pdf
Understanding Discord NSFW Servers A Guide for Responsible Users.pdf
 
GenAI Risks & Security Meetup 01052024.pdf
GenAI Risks & Security Meetup 01052024.pdfGenAI Risks & Security Meetup 01052024.pdf
GenAI Risks & Security Meetup 01052024.pdf
 

minimisation of crosstalk in VLSI routing

  • 1. Minimisation of crosstalk in VLSI ROUTING Chandrajit Pal University of Calcutta SPRING 2010 palchandrajit@gmail.com 1
  • 2. Dedicated to my Sir Dr. Amlan Chakrabarti 2
  • 3. Index • ROUTING • CROSSTALK OVERVIEW • EFFECTS OF CROSSTALK • APPROACHES TO AVOID CROSSTALK • METHODS TO MINIMISE CROSSTALK • CONCLUSION • REFERENCES 3
  • 4. Routing • Problem Given a placement, and a fixed number of metal layers, find a valid pattern of horizontal and vertical wires that connect the terminals of the nets Levels of abstraction:  Global routing  Detailed routing • Objectives Cost components: 1. Area (channel width) – min congestion 2. Wire delays – timing minimization in previous levels 3. Number of layers (fewer layers less expensive) 4. Additional cost components: number of bends, vias 5. Minimisation of crosstalk 4
  • 5. Fig: shows top view ,3D view and conceptual layout 5
  • 6. Global vs. Detailed Routing • Global routing Input: detailed placement, with exact terminal locations Determine “channel” (routing region) for each net Objective: minimize area (congestion), and timing (approximate) • Detailed routing Input: channels and approximate routing from the global routing phase Determine the exact route and layers for each net Objective: valid routing, minimize area (congestion), meet timing constraints Additional objectives: min via, power 6
  • 7. 7
  • 8. Multiple Terminal nets:Steiner Tree Steiner tree(aka Rectilinear Steiner tree- RST): A tree connecting multiple terminals. Original points:”Demand points”- set D. Added points:”Steiner points”- set S. Edges horizontal or vertical only. Steiner Minimum Tree (SMT) Similar to minimum spanning tree (MST) – But finding SMT is NP-complete Many good heuristics introduced to find SMT Algorithm 1 . Find MST 2 . Pass horizontal and vertical lines from each terminal to get the Hannan grid (optimal solution is on this grid) 3. Convert each edge of the MST to an L-shaped route on Hannan grid (add a Steiner point at the corner of L) 8
  • 9. 9
  • 10. 10
  • 11. VLSI trends: – Device size is decreasing. – Increase the no of transistors, interconnection wires – Size of the channel is decreased. Effects: Increasing coupling effect (inductive & capacitive) between interconnection wires Result: crosstalk 11
  • 12. Topic A BRIEF DISCUSSION ON CROSSTALK IN VLSI CIRCUITS. 12
  • 13. Mutual Inductance and Capacitance Crosstalk is the coupling of energy from one line to another via : Mutual inductance(magnetic field) Mutual capacitance(electric field) 13
  • 14. Mutual Inductance and Capacitance Mechanism of coupling the circuit element representing this transfer of energy are the familiar equations: Δ IB= -Cm d(VB - VA) and Δ VB= -Lm dIA dt dt Mutual inductance will induce current on the victim line opposite of the driving current(Lenz’s Law). 14
  • 15. Crosstalk induced noise The near and far end victim line currents sum to produce the near and far end crosstalk noise. Coupled currents: I near=Icm + I lm I far=Icm - I lm • Current induced by capacitive coupling goes to both directions • Current induced by inductive coupling goes opposite to the drive current 15
  • 16. Crosstalk induced noise “Voltage profile of coupled noise” • Near end crosstalk is always positive • currents from Lm and Cm always add and flow into the node. • For PCB’s far end crosstalk is “usually” negative • current due to Lm larger than current due to Cm. • Note that far end crosstalk can be positive. 16
  • 17. Noise: A Key Stopper in Mixed Signal Systems Skin effect. Dielectric absorption 17
  • 18. Major effects of crosstalk 1. Signal Integrity illustration 18
  • 19. Effects of crosstalk (contd…) 2. Noise-on-delay effect:Crosstalk 19
  • 20. Effects of crosstalk (contd…) 3.Crosstalk can lead to : - logic faults(especially in dynamic circuits). - Voltage overshoot(stress,forward biased PN junctions) 4. When noise acts against a normally static signal, it can destroy the local information carried by the static node in the circuit and ultimately result in incorrect machine-state stored in a latch. 5.Timing noise skew(DC component of timing noise). jitter(AC component of timing noise). 6. EMI and violation of EMC requirements. 20
  • 21. Basic Approaches in Crosstalk Avoidance Segregation / Spacing / Ground Shielding (1) Segregation Spacing 21
  • 22. Segregation / Spacing / Ground Shielding (2) • Segregation : Dividing many (noisy) and less(quiet) signal transition wire and merging group by group.(use with shielding) • Spacing : the method that signal wire to shun each other, when signal net is close to each other (routing channel is not wide) • Shielding : blocking signal line with ground line to minimize signal interference to the other wire.(ground bounce occurs and must broaden the ground line) 22
  • 23. Net Ordering  Net ordering is used for minimize crosstalk-critical region between each lines. When, long line and long line is close together, crosstalk between them is more larger than long line and short line. So, we must change the permutation of track for minimizing crosstalk. • Left : Unordered track permutation • Right : Ordered track permutation for minimizing crosstalk 23
  • 24. Layer Assignment  When using more than 3 layer in channel routing, adjacent signal wire in same layer results crosstalk. For example, left figure makes more crosstalk than right.  Layer assignment problem is solved by integer linear programming or dynamic programming method. 24
  • 25. Various Techniques To Reduce Crosstalk The following PCB design techniques can significantly reduce crosstalk in micro-strip or strip-line layouts: SOME TECHNIQUES ARE A RULE OF THUMB. 25
  • 26. 1. Widen spacing S between the signallines as much as routing restrictions will allow. 2. Design the transmission line so that the conductor is as close to the ground plane as possible. This couples the transmission line tightly to the ground plane and helps decouple it from adjacent signals. 3. Use differential routing techniques where possible, especially for critical nets. 4. Route signals on different layers orthogonal to each other, if there is significant coupling. 5. Minimize parallel run lengths between signals, routing with short parallel sections and minimize long coupled sections between nets. 26
  • 27. CROSSTALK ESTIMATION Crosstalk-estimation: Bounded partitioning: partitions the X-talk bound of each net into the regions its go through Net ordering: orders the net in each regions to require as few spare track as possible 27
  • 28. Crosstalk Constraints Global Routing (CCGR) • NP-hard problem • Two stage heuristic approach – New Steiner tree formulation to minimize the total X-talk. – X-talk on each net is estimated. – nets having X-talk violation is then ripped up and re-routed 28
  • 29. 6.Minimum X-talk Steiner tree  Routing graph G={V,E}  Minimized X-talk Extended Global Routing solution for nets 1…. M-1 is given  Place Mth net such that routing topologies for 1 ………. M-1 are kept and total X-talk is minimized Rip-Up & Rerouting If solution violates crosstalk constraints Rip-up them Re-route them one net at a time in the order of decreasing violation 29
  • 30. EXAMPLE Nets 1,2,3,4, are routed and net 5 is Shortest path root (not {p1 & p2} c1=2,c2=3,c3=30, feasible): r1=12,r2=20,r3=4, c4=36,c5=35 r4=0,r5=32 30
  • 31. Examples Continues….. Optimal Solution: Minimum X-talk root (not r1=0,r2=2,r3=19, r4=15,r5=32 feasible): r1=11,r2=2,r3=4, r4=0,r5=13 31
  • 32. Crosstalk reduction techniques(contd…) 7. Overcome the impedance mismatch by different termination schemes. A simple parallel termination scheme is shown below. 32
  • 33. Crosstalk reduction techniques(contd…) 8. A structure for reducing crosstalk in VLSI circuits : the empty areas(3) are filled with ground connections(7 & 11) fig2 below 33
  • 34. Conclusion  NP-hard problem.  Many others approaches are available.  Some GA based approaches are very successfully implemented  Optimal Solution are taken because some other constraints are there like wire length and congestion .  Also add routing of virtex 5 diagonal from whitepaper 34
  • 35. References 1. “Global Routing with Crosstalk Constraints” Haj Zhou and D.F. Wong Department of Computer Science, University of Texas 2. VLSI Design Shaahin Hessabi Department of Computer Engineering, Sharif University of Technology. 3. VLSI Design Automation I – © Kia Bazargan 4. J. J. Xiong and L. He. IEEE Trans on CAD, 2008 5. ALTERA WHITE PAPER,basic principles of signal integrity. 6. Crosstalk-ConstrainedMaze Routing Based on Lagrangian Relaxation Hai Zhou and D.F. Wong Department of Computer Sciences University of Texas at Austin Austin, TX 78712-1188 7. US PATIENT ,PATIENT NO:US 6,218,631 B1 8. WIRES AS INTERCONNECTS Li-Rong Zheng and Hannu Tenhunen Royal Institute of Technology (KTH), Stockholm, Sweden lirong@imit.kth.se, hannu@imit.kth.se 35