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FIFO Design

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Arrow Devices
Arrow Devices

This presentation outlines the fundamentals of FIFO Design.

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FIFO Design Aditya Mittal
Objective •  Use Design Framework •  Request/Grant Handshake •  Valid/Busy Handshake © Arrow Devices Pvt. Ltd. 2
FIFO Interface © Arrow Devices Pvt. Ltd. 3
FIFO Protocol •  FIFO not guaranteed to work if protocol violated •  Write Data qualified by Push •  Read Data validated by !Empty •  Should not Push when Full •  Should not Pop when Empty © Arrow Devices Pvt. Ltd. 4
FIFO Protocol © Arrow Devices Pvt. Ltd. 5
FIFO Datapath •  Input Data (bus) •  Output Data (bus) •  Data Store (memory /flop array) © Arrow Devices Pvt. Ltd. 6
FIFO Datapath © Arrow Devices Pvt. Ltd. 7
FIFO Control Path •  Data Path Control –  Write Control –  Read Control •  Flow Control © Arrow Devices Pvt. Ltd. 8
FIFO Write Control •  Write Pointer: Next memory address to write •  Convention: Push causes write pointer to move to next location •  Decode of write pointer enables memory locations © Arrow Devices Pvt. Ltd. 9
FIFO Read Control •  Read Pointer: Next memory address to read •  Convention: Pop causes read pointer to move to next location © Arrow Devices Pvt. Ltd. 10
FIFO Read/Write © Arrow Devices Pvt. Ltd. 11
FIFO Flow Control •  Write Interface: Full signal •  Read Interface: Empty signal © Arrow Devices Pvt. Ltd. 12
© Arrow Devices Pvt. Ltd. 13
FIFO Full Generation •  Full Condition: Both pointers are pointing to same location © Arrow Devices Pvt. Ltd. 14
FIFO Empty Generation •  Empty Condition: Both pointers are pointing to same location © Arrow Devices Pvt. Ltd. 15
Pointer Wrap State •  Set wrap bit every time pointer “wraps around” the max value © Arrow Devices Pvt. Ltd. 16
FIFO Full/Empty Conditions •  Full when pointer values are same and wrap states are different •  Empty when pointer values are same and wrap states are same © Arrow Devices Pvt. Ltd. 17

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FIFO Design

  • 2. Objective •  Use Design Framework •  Request/Grant Handshake •  Valid/Busy Handshake © Arrow Devices Pvt. Ltd. 2
  • 3. FIFO Interface © Arrow Devices Pvt. Ltd. 3
  • 4. FIFO Protocol •  FIFO not guaranteed to work if protocol violated •  Write Data qualified by Push •  Read Data validated by !Empty •  Should not Push when Full •  Should not Pop when Empty © Arrow Devices Pvt. Ltd. 4
  • 5. FIFO Protocol © Arrow Devices Pvt. Ltd. 5
  • 6. FIFO Datapath •  Input Data (bus) •  Output Data (bus) •  Data Store (memory /flop array) © Arrow Devices Pvt. Ltd. 6
  • 7. FIFO Datapath © Arrow Devices Pvt. Ltd. 7
  • 8. FIFO Control Path •  Data Path Control –  Write Control –  Read Control •  Flow Control © Arrow Devices Pvt. Ltd. 8
  • 9. FIFO Write Control •  Write Pointer: Next memory address to write •  Convention: Push causes write pointer to move to next location •  Decode of write pointer enables memory locations © Arrow Devices Pvt. Ltd. 9
  • 10. FIFO Read Control •  Read Pointer: Next memory address to read •  Convention: Pop causes read pointer to move to next location © Arrow Devices Pvt. Ltd. 10
  • 11. FIFO Read/Write © Arrow Devices Pvt. Ltd. 11
  • 12. FIFO Flow Control •  Write Interface: Full signal •  Read Interface: Empty signal © Arrow Devices Pvt. Ltd. 12
  • 13. © Arrow Devices Pvt. Ltd. 13
  • 14. FIFO Full Generation •  Full Condition: Both pointers are pointing to same location © Arrow Devices Pvt. Ltd. 14
  • 15. FIFO Empty Generation •  Empty Condition: Both pointers are pointing to same location © Arrow Devices Pvt. Ltd. 15
  • 16. Pointer Wrap State •  Set wrap bit every time pointer “wraps around” the max value © Arrow Devices Pvt. Ltd. 16
  • 17. FIFO Full/Empty Conditions •  Full when pointer values are same and wrap states are different •  Empty when pointer values are same and wrap states are same © Arrow Devices Pvt. Ltd. 17