3. Interrupts
User
Program
WRITE
WRITE
WRITE
I/O
Program
I/O
Command
END
1
2
3
2
3
4
5
(a) No interrupts
= interrupt occurs during course of execution of user program
User
Program
WRITE
WRITE
WRITE
I/O
Program
I/O
Command
Interrupt
Handler
END
1
2a
2b
3a
3b
4
5
(b) Interrupts; short I/O wait
User
Program
WRITE
WRITE
WRITE
1
(c) Interrupts; lo
Figure 1.5 Program Flow of Control Without and With In
User
Program
WRITE
WRITE
WRITE
I/O
Program
I/O
Command
END
1
2
3
2
3
4
5
(a) No interrupts
= interrupt occurs during course of execution of user program
User
Program
WRITE
WRITE
WRITE
I/O
Program
I/O
Command
Interrupt
Handler
END
1
2a
2b
3a
3b
4
5
(b) Interrupts; short I/O wait
User
Program
WRITE
WRITE
WRITE
1
(c) Interrupts
Figure 1.5 Program Flow of Control Without and With
14. ULT, KLT & Combined
Relationships between ULT States and Process States
15. CHP 7
Addressing Requirements for a Process
Hardware Support for Relation
Process Control Block
Program
Data
Stack
Current top
of stack
Entry point
to program
Process control
information
Increasing
address
values
Branch
instruction
Reference
to data
Figure 7.1 Addressing Requirements for a Process
Process Control Block
Program
Data
Stack
Figure 7.8 Hardware Support for Relocation
Comparator
Interrupt to
operating system
Absolute
address
Process image in
main memory
Relative address
Base Register
Bounds Register
Adder