Study material of 80386 microprocessor

1. INTEL 80386
RASMI M
Asst. Professor
Dept. of Computer Science and
Applications
St. Mary’s College, Thrissur-20

2. • Introduced in October 1985
• Also known as i386
• A 32-bit micrprocessor
• Physical memory size of 4GB & virtual memory of 64 TB
• Complete set of 32-bit registers and instructions
• Has 3 operating modes: real mode (i.e.8086 mode) , protected mode and
virtual mode
• Protected mode – allows use of X286 compatible
• Virtual mode – to run real mode programs in a protected environment

5. Functional units
• Bus Interface unit
• Execution unit
• Segment unit
• Paging unit
• Instruction decode unit
• Code Prefetch unit

6.  BUS INTERFACE UNIT
It handles the transfer of data between the processor,
memory and I/O devices.80386 supports 8-bit, 16-bit and
32- bit data transfers.
 EXECUTION UNIT
It reads the decoded instructions from the instruction
queue and performs the operations that are specified.
During the execution of an instruction, it requests the
segment and page units to generate the addresses of
operands and the bus interface unit to perform read or
write bus cycles to access data in memory or i/o devices.

7.  SEGMENT & PAGING UNIT
• These units provide memory management and protection services.
• Paging is a memory management technique used for virtual
memory multitasking OS. The major advantage of paging is that the
complete segment of a task need not be in the memory at any
time. Only a few pages of segments required for current execution,
need to be available in the memory. Thus the memory requirement
of the task is reduced, making the memory available for other
tasks.
• The segment unit provides a 4-level protection mechanism for
protecting the system code and data.
• The paging unit works under the control of segment unit i.e., the
virtual memory is divided in terms of segments and pages.
• Here the linear address is translated into physical address of the

8.  CODE PREFETCH UNIT
It is used to fetch the instructions in
advance, i.e., while the execution unit
executes the current instruction the prefetch
unit fetches the next one and stores it into
the queue.
 INSTRUCTION DECODE UNIT
This unit is responsible for decoding the
opcode received from the instruction.

9. REGISTERS
80386 has :
 4 general purpose registers (32-bit)
 2 index registers (32-bit)
 2 pointer registers (32-bit)
 6 segment registers (16-bit)
 a 32-bit instruction pointer, flag register and status registers
In 80386, all 32-bit registers are prefixed with the letter ‘E’
(Eg : AX as EAX)

10. 80386
PIN - DIAGRAM

12.  PEREQ – request to fetch the first part of data word
 BUSY # – to notify whether the instruction execution is going on or
not. It is used by WAIT instruction
 ERROR # - to detect errors while executing the instruction
 BE0 # - BE3 # - stands for Byte Enable ; using these 4 enable
pins, the CPU may transfer 1 byte / 2 byte / 3 byte / 4 byte of data
simultaneously
 NA # - causes 80386 to output the address of next instruction
 BS16 # - allows interfacing of a 16 –bit device with the 32-bit data
bus
 READY # - indicates that previous bus cycle is over and the CPU
is ready for next cycle

13. COMMERCIAL
VERSIONS
OF
80386

14.  4 GB physical memory
 64 TB virtual memory
 132 – pin
 32 – bit data bus

15.  16 MB physical
memory
 64 TB virtual memory
 100 – pin
 16 – bit data bus

16. COMPARISON
OF 8086 &
80386

18. Used in
mobile
phones like
BlackBerry
950 & Nokia
9000
Used in
spaceflight
projects
Used in
Hubble
space
telescope