Tesis Doctoral del Alumno Roberto Díaz Ortega para la ULPGC

1. Tesis Doctoral
Design of Radio Frequency Integrated Circuits
for Ultra Wide Band Communications
Las Palmas de Gran Canaria - 20 de Julio de 2012
Directores:
Autor: Dr. Francisco Javier del Pino Suárez
Roberto Díaz Ortega Dr. Sunil Lalchand Khemchandani
Dr. Antonio Hernández Ballester

2. Wireless Personal Area
Networks

3. UWB companies

4. Generic receiver architecture

5. • Find different alternative to implement power and area
efficient low noise amplifiers for ultra wide band applications
1. Obtain a reference system
specifications.
1. Explore different low noise
amplifiers architectures.
2. Explore different inductor
structures.
3. Explore inductorless techniques.
Research objectives

6. 1. Distributed amplifiers
2. Wide band low noise amplifiers
3. Feedback wide band amplifier
4. Inductorless techniques
Proposed milestones

7. System Distributed Wideband Feedback Inductorless
Intro Analysis Amplifiers Amplifiers Amplifiers Techniques Conclusions
• Evolution of ultra wide band communications.
• ECMA-368 / ISO/IEC26907 specifications.
• Receiver architecture.
• Receiver design.
Outline

8. • Fist use of “ultra wide band” term in 1989.
• In 2002 the FCC allocate unlicensed spectrum between 3.1 y
10.6 GHz.
• In 2003 the MBOA promote a global UWB standard.
• In 2003 appear the IEEE 802.15.3a task group.
• In 2004 is created the WiMedia alliance.
• In 2006 the IEEE 802.15.3a task group is abandoned.
• In 2007 was approved the first version of ECMA-368 /
ISO/IEC 26907.
Evolution of UWB
communications

9. Operating frequency band

10. For a Packet Error Rate of less than 8% with a Phisical layer Service Data Unit (PSDU)
of 1024 octects.
Data Rate (Mb/s) Sensitivity (dBm)
53.3 -80.8
80 -78.9
106.6 -77.8
160 -75.9
200 -74.5
320 -72.8
400 -71.5
480 -70.4
Receiver Sensitivity

11. Advantages Disadvantages
No Image Frequency DC Offset
Easly integrable I/Q Mistmatches
Low power operation Flicker Noise
Direct conversion receiver

12. The noise figure is defined as the degradation of the signal to noise ratio:
where:
Data Rate (Mb/s) Sensitivity (dBm) Noise Figure (dB)
480 -70.4 7.32
53.3 -80.8 18.9
Receiver Noise Figure

13. Filter roll-off (dB/oct) Filter Order ADC dynamic Range (dB) ADC bit number
12 2 53.8 ≥9
24 4 41.8 ≥7
36 6 29.8 ≥5
Channel filter and ADC dynamic
range

14. The quantization noise for a ADC input impedance of 50Ω is:
The output thermal noise is given by:
Considering that:
The minimum gain that satisfies the condition is:
ADC Bits Oversampling factor (p) Gain (dB)
7 1 60.86
2 57.86
9 1 48.81
2 45.81
ADC number of bits and system
gain

15. The maximum power level at ADC input is:
To avoid to saturate de ADC:
ADC Bits Oversampling factor (p) Gain (dB)
7 1 60.86
2 57.86
9 1 48.81
2 45.81
Automatic gain control

16. The interference scenario is dominated by IEEE 802.11a. The typical test case establish that
At a distance of 0.2m the interference power has a level of -31.9 dBm
Linearity requirements

17. Component Gain (dB) Noise Figure (dB) IIP3 (dBm)
LNA 15 3 -20
Mixer 20 12 -9
Baseband filter -3 3 -
Baseband 19 25 -8
amplifiers
Budget simulations

18. Parameter Specification Budget simulation
Sensitivity (dBm) -80.8 -85
Noise Figure (dB) 7.32 7.27
Gain (dB) 48.81 50.9
Maximum input (dBm) -41 -35
IIP3 (dBm) -8.65 -8.15
Budget simulations

19. Parameter Value
Gain (dB) 15
Noise Figure (dB) 3
IIP3 (dBm) -20
Power Consumption (mW) minimum
Area (mm2) minimum
Low noise amplifier
specifications

20. System Distributed Wideband Feedback Inductorless
Intro Analysis Amplifiers Amplifiers Amplifiers Techniques Conclusions
• Theoretical approach.
• Area optimization techniques.
• Experimental results.
Outline

21. Low noise amplifier design

22. Low noise amplifier design

23. Distributed amplifiers

24. The characteristic impedance and cut-off
frequency are given by:
Both transmision lines must be equals
Distributed amplifiers

25. Integrated inductors

26. Series integrated inductors

27. Series integrated inductors

28. Stacked inductors

29. Design Area mm2 Power cons. (mW)
Da1 (a) 0.7 90
DA2 (b) 0.6 90
DA3 (c) 0.4 90
Experimental results

30. Experimental results

31. Experimental results

32. In order to provide an objective method to compare the developed circuits and other similar
works, a figure of merit has been used:
Where:
• PDC: power consumption
• P1dB: 1 dB compression point
• Fh: upper frequency corner of the LNA
• Ft* technology unitary current gain bandwidth
• Area: circuit area
Experimental results

33. Ref. Gain BW NF P1dB Area Ft* (tech) PDC FOM1 FOM2
(dB) (GHz) (dB) (dBm) (mm2) (mW)
[7] 6.1 5.5 6.8 8.8 1.12 10.5(0.6μ) 83.4 151 132
[17] 5.5 8.5 10.85 N/A 2.86 10.5(0.6μ) 286 57 -
[18] 7.3 22 5.2 10 1.6 33.7(0.18μ) 52 108 95
[18] 10.6 14 4.35 5.3 1.35 33.7(0.18μ) 52 124 106
[19] 6 27 6 10 1.62 33.7(0.18μ) 68 107 94
[20] 4 8 5.4 8 0.84 33.7(0.18μ) 23 208 182
[21] 10 11 4.6 N/A 1.44 33.7(0.18μ) 19.6 119 -
[21] 16 11 4.5 N/A 1.44 33.7(0.18μ) 100 110 -
DA1 7 6.5 5 12.3 0.74 8.13(0.35μ) 90 231 207
DA2 7 6.5 4.5 12.4 0.61 8.13(0.35μ) 90 282 253
DA3 5.5 6.5 6 11.2 0.47 8.13(0.35μ) 90 364 325
FOM1 not include P1dB - FOM2 including P1dB
Experimental results

34. System Distributed Wideband Feedback Inductorless
Intro Analysis Amplifiers Amplifiers Amplifiers Techniques Conclusions
• Wide band low noise amplifier.
• Flatness improvement.
• Wideband folded cascode amplifier.
Outline

35. Low noise amplifier design

36. The noise depends directly related to:
rb, re and the small signal
transconductance
To get a 50Ω input impedance with a low impact
over the noise figure a degenerative inductive
is used:
Alternatively this expression can be expressed as:
Narrow band low noise amplifier

37. Wideband low noise amplifier

38. Wideband low noise amplifier
design

39. Wideband low noise amplifier
design

40. Wideband low noise amplifier
design

41. Parameter Value
Area (mm2) 0.13
Power consumption (mW) 32
Experimental results

42. Experimental results

43. Experimental results

44. BW 3dB Max. Gain Max. NF IIP3 PDC
Ref. Technology Year
(GHz) (dB) (dB) (dBm) (mW)
[24] 3.1-10.6 9.18 7.2 7.25 23.5 0.18 μm 2007
[25] 2.0-4.6 9.8 5.2 -2.2 12.6 0.18 μm 2005
[26] 3.1-4.8 15 4.9 -9.7 20 0.25 μm 2006
[27] 3.0-5.0 12.7 5.02 16.4 0.18 μm 2005
[28] 3.1-7.5 19.1 3.8 -2.2 32 0.18 μm 2006
[29] 3.0-5.0 12 4.5 - 20 0.18 μm 2009
This work 1.7-5.3 12.5 5.0 -4 32 0.35 μm 2011
Experimental results

45. VD D
VD D
M3 M3
RF O U T
RFO U T
M2
M2
L1 C1 Lg
L1 C1 Lg
M1
M1
Rs
Rs
L2 C2 Cp
L2 C2 Cp
RF I N Ls
RF I N Ls
Flatness improvement

46. Parameter Value
Area (mm2) 0.29
Power consumption (mW) 56.1
Experimental results

47. Experimental results

48. Experimental results

49. Experimental results

50. Wide band folded cascode
amplifier

51. Design Area (μm2) Power cons. (mW)
Wide band cascode (a) 0.13 32
Wide folded cascode (b) 0.13 18.93
Experimental results

52. Experimental results

53. Experimental results

54. Wide band cascode Wide band folded cascode
Experimental results

55. System Distributed Wideband Feedback Inductorless
Intro Analysis Amplifiers Amplifiers Amplifiers Techniques Conclusions
• Theoretical approach.
• Modified miniatured 3D inductor.
• Experimental results.
Outline

56. Feedback techniques

57. Feedback low noise amplifier

58. Feedback low noise amplifier

59. Feedback low noise amplifier

60. Inductor design

61. Miniatured 3D inductor

62. Miniatured 3d Inductor

63. Design Area (mm2) Power cons. (mW)
Conventional inductor (a) 0.17 13.2
Miniatured 3d inductor (b) 0.1 13.2
Experimental results

64. Experimental results

65. Experimental results

66. Conventional inductor Miniatured 3d Inductor
Experimental results

67. Ref. S21 (dB) NF (dB) 3dB BW IIP3 Pdc (mw) Area Tech
(GHz) (dBm) (mm2)
[34] 9.3 <9 2-23 -6.7 9 1.1 0.18μm CMOS
[35] 21 <4.5 2-10 >-5.5 30 0.55 0.18μm SiGe
[36] 9.3 <9.2 2.3-9.2 >-6.7 9 0.66 0.18μm CMOS
[37] 8.5 <5.3 1.3-10.7 >8 4.5 1 0.18μm CMOS
[37] 8.2 <5.5 1.3-12.3 >8 4.5 1 0.18μm CMOS
[18] 10.6 <5.4 0.01-14 >10 52 1.35 0.18μm CMOS
[38] 20 <4.5 3-10 >-11.75 42.5 0.18 0.18μm CMOS
[39] 22 <3.9 3-1-14.5 >-32.5 13.2 0.49 0.18μm SiGe
[40] 15.3 <2.98 3.1-10.6 >-8.5 9 0.87 0.25μm SiGe
[41] 12 <4 2-10 >1.9 24 0.25 0.13μm CMOS
[42] 13 <3.3 2-10 >-7.5 9.6 0.88 0.18μm SiGe
[42] 11.5 <3.5 2-10 >-7.5 7.2 0.88 0.18μm SiGe
[43] 11.5 4.7 3.1-10.6 -10 10.57 0.665 0.18μm CMOS
Std. ind. 14 <5.6 0.1-5.5 >-3.4 13.2 0.1 0.35μm SiGe
3D ind. 14 <4 0.1-6.7 >-4.4 13.2 0.1 0.35μm SiGe
Experimental results

68. System Distributed Wideband Feedback Inductorless
Intro Analysis Amplifiers Amplifiers Amplifiers Techniques Conclusions
• Common gate low noise amplifier.
• Quadrature Mixers.
• Inductorless operation.
• Experimental results.
Outline

69. Common gate low noise
amplifier

70. Inductorless operation

71. Front-end I
Experimental results

72. Parameter Value
Area (mm2) 0.97
Power consumption (mW) 16
Experimental results

73. Experimental results

74. Front-end II
Experimental results

75. Parameter Value
Area (mm2) 0.52
Power consumption (mW) 14
Experimental results

76. Experimental results

77. Comparative results between the front-ends:
Design Frontend I Frontend II
NF(dB) 11.2 13.7
Gain (dB) 12.1 7.2
IIP3 (dBm) -5.6 -2.1
Consumption (mW) 16 14
Area (mm2) 0.97 0.52
With inductorless techniques an area saving of 54% have been achieved.
Experimental results

78. System Distributed Wideband Feedback Inductorless
Intro Analysis Amplifiers Amplifiers Amplifiers Techniques Conclusions
• Summary of the developed circuits.
• Specifications comparative.
• Areas for further research.
Outline

79. Design Gain BW NF IIP3 Area PDC
(dB) (dB) (dB) (dBm) (mm2) (mW)
Distributed amplifier 1 7 6.5 5 21.3 0.74 90
Distributed amplifier 2 7 6.5 4.5 21.4 0.61 90
Distributed amplifier 3 5.5 6.5 6 30.2 0.47 90
Wide band amplifier 12.5 3.6 4.3 -4 0.13 31
Modified shunt-peaking 11.2 4 5 -4 0.29 56.1
Folded cascode 7.8 2.96 3 -4 0.13 18.93
Feedback amplifier (standard ind.) 14 5.6 <4 -3.4 0.17 13.2
Feedback amplifier (3D ind.) 14 6.8 <4 -4.4 0.10 13.2
Frontend I (inductor based) 12.1 5 11.2 -5.6 0.97 16
Frontend II (inductorless) 7.2 5 13.7 -2.1 0.52 14
Developed circuits

80. Design Frontend I Frontend II Specification
NF(dB) 11.2 13.7 7
Gain (dB) 12.1 7.2 35
IIP3 (dBm) -5.6 -2.1 -9
Consumption (mW) 16 14 minimum
Area (mm2) 0.97 0.52 minimum
Inductorless front-ends

81. Journal Papers
• J. del Pino, Sunil L. Khemchandani, Roberto Díaz-Ortega, Rubén Pulido Medina and Hugo García-
Vázquez, ”On-Chip Inductors Optimization For Ultra Wide Band Low Noise Amplifiers”, Journal of
Circuits, Systems, and Computers, Nov. 2011
• J. del Pino, R. Díaz and S.L. Khemchandani, ”Area Reduction Techniques for Full Integrated Distributed
Amplifiers”, International Journal in Electronics and Communications, Nov. 2010
Conference Papers
• H. García-Vázquez, R. Díaz, D. Ramos-Valido, A. Santana, J. del Pino and S.L. Khemchandani, ”Area
Reduction in RF Fully Integrated Front-Ends for UltraWideband”, XXV Conference on Design of Circuits
and Integrated Systems, Nov 2010.
• H. García, R. Pulido, R. Díaz, S.L. Khemchandani, A. Goñi and J. del Pino, ”A Feedback Wideband LNA
with a Modified 3D Inductor for UWB Applications”, XXIII Conference on Design of Circuits and
Integrated Systems, Nov 2008.
• G. Martín, R. Díaz, J. del Pino, S.L. Khemchandani, A. Hernández, ”Design of a Fully Integrated DC to
8.5 GHz Distributed Amplifier in CMOS 0.35”, XXI Conference on Design of Circuits and Integrated
Systems, Nov 2006.
Publications

82. • SR2 - Short Range Radio, Spanish Ministry of Industry, Tourism and Trade 2010-
2011.
• SR2 - Short Range Radio, Spanish Ministry of Industry, Tourism and Trade 2009-
2010.
• WITNESS - WIreless Technologies for small area Networks with Embedded and
Security & Safety. MEDEA+ from UE - Spanish Ministry of Industry, Tourism and
Trade. 2005 - 2007.
Research Projects

83. • Design and integration of the rest of the receiver
• Design of mixers.
• Design of filters.
• Design of baseband amplifiers.
• Inductor estructures
• Explore new alternative to reduce inductor area.
• Explore new circuits topologies that require low
performance inductors.
• Inductorless architectures
• Improve the performance of inductoless designs.
Areas for further research

84. Tesis Doctoral
Design of Radio Frequency Integrated Circuits
for Ultra Wide Band Communications
Las Palmas de Gran Canaria - 20 de Julio de 2012
Directores:
Autor: Dr. D.Francisco Javier del Pino Suárez
Roberto Díaz Ortega Dr. D. Sunil Lalchand Khemchandani
Dr. D. Antonio Hernández Ballester