1) The document summarizes key concepts from Lecture 13 of an electronics course, including the cascode amplifier configuration, frequency response, Miller's theorem, and the small-signal model of a CE amplifier stage. 2) Miller's theorem allows a floating capacitance in an amplifier to be modeled as two grounded capacitances, with the input capacitance increased by the square of the voltage gain. This models the effect of feedback in increasing the input impedance seen by a capacitance. 3) Applying Miller's theorem and developing the small-signal model, the CE amplifier stage has poles at the input and output related to various resistances and capacitances, with the output pole frequency higher than the input

1. EE105 Fall 2007 Lecture 13, Slide 1 Prof. Liu, UC Berkeley
Lecture 13
OUTLINE
• Cascode Stage: final comments
• Frequency Response
– General considerations
– High-frequency BJT model
– Miller’s Theorem
– Frequency response of CE stage
Reading: Chapter 11.1-11.3
ANNOUNCEMENTS
• Midterm #1 (Thursday 10/11, 3:30PM-5:00PM) location:
• 106 Stanley Hall: Students with last names starting with A-L
• 306 Soda Hall: Students with last names starting with M-Z
• EECS Dept. policy re: academic dishonesty will be strictly followed!
• HW#7 is posted online.

2. EE105 Fall 2007 Lecture 13, Slide 2 Prof. Liu, UC Berkeley
Cascoding Cascode?
• Recall that the output impedance seen looking into the
collector of a BJT can be boosted by as much as a factor
of β, by using a BJT for emitter degeneration.
• If an extra BJT is used in the cascode configuration, the
maximum output impedance remains βro1.
( ) 11211
121121
||
||)]||(1[
ooomout
ooomout
rrrrgR
rrrrrgR
βπ
ππ
≤≈
++=
1111max,
121121 ||)]||(1[
oomout
ooomout
rrrgR
rrrrrgR
β
ββ
π
ππ
=≈
++≤

3. EE105 Fall 2007 Lecture 13, Slide 3 Prof. Liu, UC Berkeley
Cascode Amplifier
• Recall that voltage gain of a cascode amplifier is high,
because Rout is high.
• If the input is applied to the base of Q2 rather than the
base of Q1, however, the voltage gain is not as high.
– The resulting circuit is a CE amplifier with emitter degeneration,
which has lower Gm.
( )21211 πrrgrgA omomv −≈
( )212
2
1 oom
m
in
o
m
rrg
g
v
i
G
+
=≡

4. EE105 Fall 2007 Lecture 13, Slide 4 Prof. Liu, UC Berkeley
Review: Sinusoidal Analysis
• Any voltage or current in a linear circuit with a sinusoidal
source is a sinusoid of the same frequency (ω).
– We only need to keep track of the amplitude and phase, when
determining the response of a linear circuit to a sinusoidal source.
• Any time-varying signal can be expressed as a sum of
sinusoids of various frequencies (and phases).
 Applying the principle of superposition:
– The current or voltage response in a linear circuit due to a
time-varying input signal can be calculated as the sum of the
sinusoidal responses for each sinusoidal component of the
input signal.

5. EE105 Fall 2007 Lecture 13, Slide 5 Prof. Liu, UC Berkeley
High Frequency “Roll-Off” in Av
• Typically, an amplifier is designed to work over a
limited range of frequencies.
– At “high” frequencies, the gain of an amplifier decreases.

6. EE105 Fall 2007 Lecture 13, Slide 6 Prof. Liu, UC Berkeley
Av Roll-Off due to CL
• A capacitive load (CL) causes the gain to decrease at
high frequencies.
– The impedance of CL decreases at high frequencies, so that
it shunts some of the output current to ground.






−=
L
Cmv
Cj
RgA
ω
1
||

7. EE105 Fall 2007 Lecture 13, Slide 7 Prof. Liu, UC Berkeley
Frequency Response of the CE Stage
• At low frequency, the capacitor is effectively an open
circuit, and Av vs. ω is flat. At high frequencies, the
impedance of the capacitor decreases and hence the
gain decreases. The “breakpoint” frequency is 1/(RCCL).
1222
+
=
ωLC
Cm
v
CR
Rg
A

8. EE105 Fall 2007 Lecture 13, Slide 8 Prof. Liu, UC Berkeley
Amplifier Figure of Merit (FOM)
• The gain-bandwidth product is commonly used to
benchmark amplifiers.
– We wish to maximize both the gain and the bandwidth.
• Power consumption is also an important attribute.
– We wish to minimize the power consumption.
( )
LCCT
CCC
LC
Cm
CVV
VI
CR
Rg
1
1
nConsumptioPower
BandwidthGain
=






=
×
Operation at low T, low VCC, and with small CL  superior FOM

9. EE105 Fall 2007 Lecture 13, Slide 9 Prof. Liu, UC Berkeley
Bode Plot
• The transfer function of a circuit can be written in the
general form
• Rules for generating a Bode magnitude vs. frequency plot:
– As ω passes each zero frequency, the slope of |H(jω)| increases
by 20dB/dec.
– As ω passes each pole frequency, the slope of |H(jω)|
decreases by 20dB/dec.










+








+






+





+
=
21
21
0
11
11
)(
pp
zz
jj
jj
AjH
ω
ω
ω
ω
ω
ω
ω
ω
ω
A0 is the low-frequency gain
ωzj are “zero” frequencies
ωpj are “pole” frequencies

10. EE105 Fall 2007 Lecture 13, Slide 10 Prof. Liu, UC Berkeley
Bode Plot Example
• This circuit has only one pole at ωp1=1/(RCCL); the slope
of |Av|decreases from 0 to -20dB/dec at ωp1.
• In general, if node j in the signal path has a small-
signal resistance of Rj to ground and a capacitance Cj to
ground, then it contributes a pole at frequency (RjCj)-1
LC
p
CR
1
1 =ω

11. EE105 Fall 2007 Lecture 13, Slide 11 Prof. Liu, UC Berkeley
Pole Identification Example
inS
p
CR
1
1 =ω
LC
p
CR
1
2 =ω

12. EE105 Fall 2007 Lecture 13, Slide 12 Prof. Liu, UC Berkeley
High-Frequency BJT Model
• The BJT inherently has junction capacitances which
affect its performance at high frequencies.
Collector junction: depletion capacitance, Cµ
Emitter junction: depletion capacitance, Cje, and also
diffusion capacitance, Cb.
jeb CCC +≡π

13. EE105 Fall 2007 Lecture 13, Slide 13 Prof. Liu, UC Berkeley
BJT High-Frequency Model (cont’d)
• In an integrated circuit, the BJTs are fabricated in the
surface region of a Si wafer substrate; another
junction exists between the collector and substrate,
resulting in substrate junction capacitance, CCS.
BJT cross-section BJT small-signal model

14. EE105 Fall 2007 Lecture 13, Slide 14 Prof. Liu, UC Berkeley
Example: BJT Capacitances
• The various junction capacitances within each BJT are
explicitly shown in the circuit diagram on the right.

15. EE105 Fall 2007 Lecture 13, Slide 15 Prof. Liu, UC Berkeley
Transit Frequency, fT
• The “transit” or “cut-off” frequency, fT, is a measure
of the intrinsic speed of a transistor, and is defined
as the frequency where the current gain falls to 1.
π
π
C
g
f m
T =2
Conceptual set-up to measure fT
in
in
in
Z
V
I =
inmout VgI =
in
m
T
inT
minm
in
out
C
g
Cj
gZg
I
I
=⇒
=





==
ω
ω
1
1

16. EE105 Fall 2007 Lecture 13, Slide 16 Prof. Liu, UC Berkeley
Dealing with a Floating Capacitance
• Recall that a pole is computed by finding the resistance
and capacitance between a node and GROUND.
• It is not straightforward to compute the pole due to Cµ1
in the circuit below, because neither of its terminals is
grounded.

17. EE105 Fall 2007 Lecture 13, Slide 17 Prof. Liu, UC Berkeley
Miller’s Theorem
• If Avis the voltage gain from node 1 to 2, then a
floating impedance ZFcan be converted to two
grounded impedances Z1and Z2:
v
FF
F A
Z
VV
V
ZZ
Z
V
Z
VV
−
=
−
=⇒=
−
1
1
21
1
1
1
121
v
FF
F
A
Z
VV
V
ZZ
Z
V
Z
VV
11
1
21
2
2
2
221
−
=
−
−=⇒−=
−

18. EE105 Fall 2007 Lecture 13, Slide 18 Prof. Liu, UC Berkeley
Miller Multiplication
• Applying Miller’s theorem, we can convert a floating
capacitance between the input and output nodes of
an amplifier into two grounded capacitances.
• The capacitance at the input node is larger than the
original floating capacitance.
vAA −≡0
( ) F
F
v
F
CAjA
Cj
A
Z
Z
00
1
1
1
1
1
1 +
=
+
=
−
=
ω
ω
F
F
v
F
C
A
jA
Cj
A
Z
Z





 +
=
+
=
−
=
0
0
2
11
1
11
1
11 ω
ω

19. EE105 Fall 2007 Lecture 13, Slide 19 Prof. Liu, UC Berkeley
Application of Miller’s Theorem
( ) FCmS
inp
CRgR +
=
1
1
,ω
F
Cm
C
outp
C
Rg
R 





+
=
1
1
1
,ω

20. EE105 Fall 2007 Lecture 13, Slide 20 Prof. Liu, UC Berkeley
Small-Signal Model for CE Stage

21. EE105 Fall 2007 Lecture 13, Slide 21 Prof. Liu, UC Berkeley
… Applying Miller’s Theorem
( )( )µ
ω
CRgCR CminThev
inp
++
=
1
1
,














++
=
µ
ω
C
Rg
CR
Cm
outC
outp
1
1
1
,
Note that ωp,out > ωp,in

22. EE105 Fall 2007 Lecture 13, Slide 22 Prof. Liu, UC Berkeley
Direct Analysis of CE Stage
• Direct analysis yields slightly different pole locations
and an extra zero:
( ) ( )
( ) ( )
( )outinXYoutXYinCThev
outXYCinThevThevXYCm
p
outXYCinThevThevXYCm
p
XY
m
z
CCCCCCRR
CCRCRRCRg
CCRCRRCRg
C
g
++
++++
=
++++
=
=
1
1
1
2
1
ω
ω
ω

23. EE105 Fall 2007 Lecture 13, Slide 23 Prof. Liu, UC Berkeley
Input Impedance of CE Stage
( )[ ] π
µπω
r
CRgCj
Z
Cm
in ||
1
1
++
≈