16. PagingImplementIssused.pptx

Memory Management
Implementation Issues
Segmentation

Review
• Memory Manager
– coordinate how the different types of memory are used
– keep track memory to allocate and release areas of main memory
to processes
– manage swapping between main memory and disk
• No Memory Abstractions
– Single program
• One OS, only one process
• Special register is used to protection between OS and process
• Disadvantages: slow
– Multiple program
• One OS, many processes locate in memory
• Divided into fixed size block
• Disadvantages
– Internal fragmentations
– Two programs both reference absolute physical memory
 static relocation

Review
• Memory Abstractions
– Multiple processes locate in memory (both primary and secondary)
– Base and Limit Registers
• Multiple processes locate in memory and protection
• Base contains the first address of process in memory, Limit contains the
length of process, the process owns private address space
• Disadvantages
– External fragmentation (Defragment)
– Slow
– Swapping
• Multiple processes with ready processes locate in memory and passive
processes locate in HDD – swap file area
• Swap out/ in operator
• Disadvantages
– External fragmentation
– Process can not grow in memory and the swap area on the disk is full 
data segment upward, stack segment downward

Review
– Memory Management with Bitmaps
• The memory divides units with same size that has a bit corresponding bit
in the bitmap (0: free, 1: occupied)
• Disadvantages
– Slow when searching the bitmap to find a run of k consecutive 0 bits in
the map (small)
– External fragment (large size)
– Memory Management with Linked Lists
• Maintain a linked list of allocated (P) and free memory (H)
• Allocating algorithms
– First, Next, Best, Worst, Quick Fit
– Virtual Memory
• Software/ Process sizes larger than memory
• Overlays
– Developer splits program to many overlays
– Disadvantages: developer‘s knowledge is important

Review
– Virtual Memory
• Paging
– Address space is broken up into pages
– Physical memory is divided up into page frames
– Virtual address vs. Physical address, manage address space with bit
– MMU transfers Virtual address  p, d; then it looks up page table
following the index to get the page frame; the page frame combines
with d to determine the physical address
– Page fault: the program references a part of its address space that is
not in physical memory
– Page table
» Load to collection registers, load to memory using base register,
using TLB
» Excessive large page table: multilevel page, inverted page table,
inverted page table with hash or TLB
» Entry: Caching disabled, Referenced, Modified, Protection,
Present/absent, page frame number

Review
– Virtual Memory
• Paging
– Page replace algorithms
» Optimal: the page will be the latest one accessed in the future
» NRU: the page has lowest class that combines R and M bit
» FIFO: the page at the head of queue
» Second Chance: old page has not been not referenced in the
previous clock interval (R = 0). If R of page equals 1, R is reset
to 0 and put the tail of the queue.
» Clock (circular queue) : the page being pointed to by the hand is
inspected. If R = 0, page is evicted. Otherwise, R is reset to 0, the
pointer points next
» LRU: the page at the end of the list is replaced, the list must be
updated at each memory reference
» NFU, Aging (using bit): The page with the lowest counter
» Working set model, working set clock (circular queue): Third
Chance with Second Chance using age > τ with bit R
» Terminology: Thrashing, Locality of Reference, Demand paging,
prepaging, working set, page fault rate

Review
• Design Issues
– Local vs Global Policies
• Local: page frames are static allocated among current processes
(thrashing or waste memory)
• Global: page frames are dynamically allocated among runnable processes
(thrashing to others process)
– Solution
» Monitor the size of working set of all processes using aging bit
» The allocation is updated dynamically using PFF algorithms with
To periodically determine the number of running processes,
Giving each process a minimum number of frames
– Load Control
• Swapping and Considering not only process size and paging rate but also
its characteristics
– Page Size
• Optimizing the size of the page and the location of page table

Review
• Design Issues
– Separate Instruction and Data Spaces
• Sharing code, library, read only memory
• Copy on write
– Memory Mapped File
• Paging the file as process
– Cleaning Policy
• Using two-handed clock
– Front hand is controlled by the paging daemon
– Back hand is used for page replacement algorithm as in the standard clock algorithm

Objectives…
• Implementation Issues
– OS Involvement with Paging
– Page Fault Handling
– Instruction Backup
– Locking Pages in Memory
– Backing Store
– Policy and Mechanism
• Segmentation
– Pure Segment
– Segmentation with Paging: MULTICS
– Segmentation with Paging: Intel Pentium

Implementations Issues
OS Involvement in Paging
• There are four time when OS has paging related work to do
– Process creation time
– Process execution time
– Page fault time
– Process terminal time

• Process creation time
– OS has to determine how large the program and data will be and
create page table for them.
– Space has to be allocated in memory for page table and it has
to be initialized
– The page table need not be resident when the process is swapped
out but has to be in memory when the process is running.
– Space has to be allocated in the swap area (that has to be
initialized with program text and data) on disk so that when
a page is swapped out, it has somewhere to go
– Some systems page the program text directly from the executable
file, thus saving disk space and initialization time
– Information the page table and swap area on disk must be
recorded in the process table

• Process execution time
– When a process is scheduled for execution, the MMU has to be
reset for the new process and the TLB flushed, to get rid of
traces of the previously executing process
– The new process’ page table has to be made current, usually
by copying it or a pointer to it to some hardware registers
– Optionally, some or all of the process’ pages can be brought
into memory (prepaging) to reduce the number of page faults
initially

• Page fault time
– When a page fault occurs, the OS has to read out hardware
registers to determine which virtual address causes the fault
– OS must compute which page is needed and locate that page on
disk, then it must find an available page frame to put the new
page, evicting some old page if need be
– OS read the needed page into the page frame
– OS must back up PC to have it point to the faulting instruction
and let that instruction execute again
• Process terminal time
– When a process exits, the OS must release its page table, its page,
and disk space that the pages occupy when they are on disk
– If some of the pages are shared with other processes, the pages in
memory and on disk can only be released when the last process
using them has terminated

Page Fault Handling
• The hardware trap to kernel; save PC on stack; save information
about the state of current instruction into a special CPU registers
• An assembly code routine is started to save the general registers and
other volatile information to keep the OS from destroying it
• The OS find the virtual page
– The hardware registers contains this information.
– If not, the OS must retrieve the PC, fetch the instruction, and parse it in software
to figure out what it was doing when the fault hit
• Check if the address is valid and the protection consistent with the
access.
– If not, the process sent a signal or killed.
– If the address is valid and no protection fault has occurred, the system checks to
see if a page frame is free. If no frames are free, the page replacement algorithm
is run to select a victim
• If the “victim” page is dirty, the page is scheduled for transfer to the
disk, and a context switch take place, suspending the faulting
process and letting another one run until the disk transfer has
completed. In any event, the framed is marked as busy to prevent it
from being used for another purpose

Page Fault Handling
• When the page frame is clean, the OS find on the disk address
where the needed page is, and scheduled a disk operation to
bring it in. While the page is being loaded, the faulting process
is still suspended and another user process is run, if one is
available
• When the disk interrupt indicates that the page has arrived, the
OS updates the page table and mark as normal the page frame
• The faulting instruction is backed up to the state it had when it
began and the PC is reset to point to that instruction
• The faulting process is scheduled, and the OS returns to the
routine that called it
• This routine reloads the registers and other state information
and returns to user space to continue execution, as if no fault
had occurred

Instruction Backup
• It is easier said than done “When the page fault occurs,
the OS fetch the page needed, it must restart the
instruction causing the trap”
• Context
– Where should the PC’s position be backed up when the
progressed instructions occur errors?
– Where should the PC’s position be loaded when the instruction
is restarted?
– The value of PC at the time of the trap depends on which operand
faulted and how the CPU’s microcode has been implemented
– In auto-incrementing mode
• First approach
– The increment may be done before the memory reference
– Before restarting the instruction, the OS must decrease the register
• Second approach
– The auto-increment may be done after the memory reference
– The OS do nothing to restart the instruction
– In auto-decrementing mode, a similar problems also occur

Instruction Backup
• Problem
– The page fault occurs when a instruction reference the memory,
the instruction can occur at the operands
– To restart the instruction, the OS must determine where the
first byte of instruction is
– The OS cannot know the command (operator) if the fault
occurs at the operand
→ The OS has to jump through hoops to figure out what
happened and how to repair it (how to an operator as individual
or atomicity)
• Solution
– A hidden internal is used to store the PC before each
instruction is executed
– A second register is used to store the registers auto-
incremented or auto-decremented, and by how much
→ When the fault instruction is restarted, the OS can
unambiguously undo all the effects of it

Locking Pages in Memory
• Problems
– While the process is suspended because it is waiting for the I/O to
complete, another process is run.
– However, this other process gets a page fault
– If the global paging algorithm is used, there is a chance that the page
containing the I/O buffer will be chosen to be removed from memory
→ In the case of DMA used with I/O, the evicted page causes the
problems
• The transferring data will be written into either the buffer or this page
• Notes: The DMA can be transfer the data without controlling of CPU
• Solution
– First Approach: Lock pages engaged in I/O in memory so that they
will not be removed. (pinning)
• If the locking pages in memory always occurs with high ratio, the bottle
neck or thrashing can be occurs
– Second Approach: Do all I/O to kernel buffers & copy the data to use
pages later

Backing Store
• The simplest algorithm for allocating page space on disk
– A special swap partition exits on the disk
– This partition uses block numbers relative to the start of the partition, instead
of using a normal file system
– When the system is booted, the swap partition is empty and is represented in
memory as a single entry giving its origin and size
– When the process is started, a chunk of the partition area the size of first
process is reserved and the remaining area reduced by that amount
– As new processes are started, they are assigned chunks of the swap
partition equal in size to their core images
– As they finished, their disk space is freed
– Requirements: swap area must be initialized to copy entire process image to
the swap area before the process start
→ associated with each process is the disk address of its swap area, that is where
on the swap partition its image is kept (that also kept in process table)

Backing Store (Swap Area)
• Problems:
– Process can increase in size after starting
– This occurs due to the growing of data and stack
• Solution
– First Approach: Reserve separate swap areas for text, data, stack
and allow each of these areas to consist of more than one chunk
on the disk (!?)
– Second Approach:
• Allocate nothing and allocate disk space for each page when it is swapped
out and de-allocate it when it is swapped back in
→ processes in memory do not tie up any swap space
• Disadvantage
– A disk address is needed in memory to keep track of each page on disk
– In each process, there must be a table stored the location of each page on
disk

Backing Store
Tanenbaum, Fig. 3-29.
(a) Paging to a static swap area. (b) Backing up pages dynamically

Backing Store
• Second approach in details,
– Paging to a static swap area
• The swap area on disk is as large as the process virtual address space
• Each page has a fixed location on disk and store in contiguously in order of the
page number
• A page is in memory always has a shadow copy on disk
• Disadvantages
– The synchronization on disk must be progressed even the page in memory has not
been modified
– The page on disk may be out of date due to not update the modified page from memory
(for a long time)
• Ex: Unix is applied
– Backing up pages dynamically
• Disk map
– Is a table mapping the disk address per virtual page is used
– Its entries contain an invalid disk address or a bit marking them as not in used
• Pages do not have fixed addresses on disk.
• A page in memory has no copy on disk
• When the page is swapped out, an empty disk space is chosen on the fly and the
disk map is updated accordingly
• Ex: Windows using swap file to apply this strategy

Separation of Policy and Mechanism
• The memory management system is divided into three parts
– A low-level MMU handler
• All the details of how the MMU works are encapsulated in the MMU
handler
• MMU handler is machine-dependent code and has to be rewritten for
each new platform the OS is ported to
– A page fault handler that is part of the kernel
• A page fault handler is machine-independent code and contains most of
the mechanism for paging
– An external pager running in user space
• The policy is largely determined by the external page, which runs as a
user process
• When a process starts up, the external page is notified in order to set up
the process page map and allocate backing store on the disk if need be
• As the process runs, it may map new objects into its address space, so the
external pager is again notified

• When the process starts running, it may get a page fault.
• The fault hander figures out which virtual page is needed and send message to
the external pager, telling it the problem
• The external pager then reads the needed page in from the disk and copies it to a
portion of its own address space, then it tells the fault handler where the page is
• The fault handler then unmaps the page from the external pager’s address space
and asks the MMU handler to put it into the user’s address space at the right
place
• The user process can be restarted
• Problems
– External pager does not have access to the R and M bits of all the pages
– Some mechanism is needed to pass this information to the external pager or the page
replacement algorithm must go in the kernel
the fault handler tells the external pager which page it has selected for eviction and
provides the data, either by mapping it into the external pager’s address space or
including it in a message. Either way, the external pager writes the data to disk
• Advantages: is more modular code and greater flexibility
• Disadvantages: the extra overhead of the various message being sent between the
pieces of the system

Segmentation
• Context
– Programmer’s
view of memory
is not usually as
a single linear
address space
– Programmer cannot predict how large these will be,
or how they’ll grow, and doesn’t want
to manage where they go in virtual memory
– The virtual memory is one-dimensional because the
virtual address go from 0 to some maximum address,
one address after one another.
– The virtual memory gives a process a complete
virtual address space to itself

Segmentation
• Problem
– The processes as compiler has many objects such as executed code, Static/
Heap Data, Stack, constant table … that are located in address space
– One of them may grow and shrinks in dynamically or unpredictably
→ It is really needed a way of freeing manage the expanding and contracting space
that virtual memory eliminates the worry of organizing the program into overlays
• Solution: Using Segmentation
– Segmentation provides the mechanism to management memory with many
completely independent address spaces and are not fixed size as page
– Segmentation maintains multiple separate virtual address spaces per process
– The address space is a collection of segments
– Segmentation can grow or shrink independently

Segmentation
Example

Segmentation
• Each Segment
– Is a logical entity.
– Consists of a linear sequence addresses, from 0 to some maximum
– Its length may be anything from 0 to maximum allowed
– Different segments may have different length and may change during
execution (ex: the stack segment may be increased or decreased)
– Constitutes a separate address space, different segments can grow and shrink
independently without effecting each other
– Might contain a procedure, or a array, or a stack, or a collection of scalar
variables, but usually it does not contain a mixture of different types ( have
different kinds of protection)
– Facilities sharing procedures or data between several processes (e.g. share
library)
• The compiler automatically construct segments reflecting the input
program
• To specify an address in the segmented memory, the program must
supply two-part address, a segment number, and an address within the
segment <segment-number, offset>

Segmentation
Implementation using Hardware
• Segment table
– Each entry has segment base and segment limit
– Segment base contains the starting physical address where the segment resides in
memory
– Segment limit specifies the length of segment
• Segment splits into <segment_number, offset> and using segment_number as
index into the segment table
• The real address is calculated by adding the offset to segment base

Segmentation
Example
• Segment 2 begins at 4300 and has 400 bytes size
• → If A byte 53 of segment 2 is referenced, the physical
address is 4300 + 53 = 4353
• If A byte 1222 of segment 0 is referenced, the trap to the OS
is occurs

Segmentation
• Advantages
– Can grow or shrink independently
– Reduce costly because no starting addresses have been modified even if the new
version is subsequently modified and recompiled creating the larger or the
smaller size than the old one
• Each procedure occupies a separate segment, with address 0 as its starting address
• When a procedure call to the procedure locating at segment n as (n, 0), no
procedures need be changed
– Vs. the one dimensional memory, the procedures are packed tightly next to each other,
with no address space between them → changing one procedure’s size requires modifying
some procedures (that are moved) following the new starting address
• Sharing
– The entries in the segment table of two different processes point to the same physical
location
→ Eliminating the need for many same code or data in every process’s address space
• Protection is supported by memory management in modern OS (e.g the code is read
only, the limit register on the hardware ….)
• Disadvantages: external fragmentation → compacting

Segmentation
**Paging vs. Segmentation

Segmentation
Implementation of Pure Segment
• Checkerboarding and external fragmentation
– Memory will be divided up into a number of chunks, some
containing segments and some containing holes (after the
system has been running for a while)
– Wastes memory in the holes
– Can be dealt with by compaction (means that external
fragmentation)

Segmentation
Segmentation with Paging
• Context
– Both paging and segmentation have advantages and
disadvantages
– Some system uses one of them to manage its memory.
– However, if the segments are large, it may be inconvenient, or
even impossible, to keep them in main memory in their entirety
• Solution: using paging the segmentation
– Treats each segment as a virtual memory and to page it,
combining
• The advantages of paging (uniform page size and not having to keep the
whole segment in memory if only part of it is being used)
• The advantages of segmentation (ease of programming, modularity,
protection, sharing)
– This strategy is applied on Intel Pentium and MULTICS

Segmentation
Segmentation with Paging: The Intel Pentium
• The virtual memory is divided into two partition (8K segment)
– Local Descriptor Table (LDT): describes segments local to each program
including codes, data, stack …
– Global Descriptor Table (GDT): describes system segments including the OS
itself
– Each entry in the LDT and GDT consists 8 bytes and contains the segment base
and segment limit
• Each program has its own LDT, but there is a single GDT, shared by
all the programs on the computer
• The virtual address is a pair of <selector, offset>
– The selector is a 16 bit numbers
• 13 bits specify the LDT or GDT entry number
• 1 bit tells whether the segment is local or global
• 2 bits relate to protection with value
– The offset is a 32 bit number

Segmentation
• The machine has 6 segment registers
– Allowing 6 segments to be addressed at any one time by a process
• The machine has also 6 microprogram registers (8 byte)
– Holding the corresponding descriptors from either the LDT or
GDT
– Including the segment’s base address, size, and other information

Segmentation
• How to convert a (selector, offset) to physical address
– The microprogram find descriptor corresponding to selector
• The trap occurs if the currently page out or segment does not exist
– Then, the hardware uses the Limit field to check if the offset is
beyond the end of the segment
• If so, the trap occurs
• Otherwise, the Pentium adds the 32 bit Base field in descriptor to the offset
to form what called a linear address

Segmentation
• How to convert a (selector, offset) to physical address (cont)
– If paging is disable
• The linear address is interpreted as the
physical address and sent to the memory for
the read and write
– If paging is enabled (following the
multilevel page table)
• The linear address is interpreted as a virtual
address and mapped onto the physical
address using page tables
• The linear address divided into three fields
– Dir: index into the page directory to
locate a pointer to the proper page table
– Page: index into the page table to find the physical address of the page frame
– Offset: is added to the address of the page frame to get the physical address of
the byte or the word needed

Segmentation
• The Pentium supports four protection
levels (0 – 3)
– 0: kernel of OS handles I/O, memory
management, and other critical matters
– 1: the system calls handler is present
– 2: contains library procedures, possibly
shared among many running programs
(call, read, or not modify)
– 3: user program
• A program restrict itself to using
segments at its own level
• Attempts to access data at higher
level are permitted
• Attempts to access data at a lower
level are illegal and cause traps
• Attempts to call procedures at a
different level are allowed, but in
carefully controlled way

Segmentation
Segmentation with Paging: MULTICS
• MULTICS (Multiplexed Information
and Computing Service) was an
extraordinarily influential early time-
sharing system.
• Each program has a segment table,
with one descriptor per segment
– The segment table is itself a segment and
is paged
– A descriptor contains an indication of
whether the segment is in main memory
or not
• If so,
– The segment and page table are in
memory
– The descriptor contains an 18 bit pointer
to its page table, 9 bit segment size, the
protection bits, and few other items

Segmentation
• Each segment is an ordinary virtual address space and is
paged
• An address consists of two parts
– The segment
– The address within the segment is divided into two parts
• The page number
• The offset
• In implementation,
– The descriptor segment is itself paged has been omitted
– A base register is used to locate the descriptor segment’s table/
This register points to the pages of descriptor segment

Segmentation
• How to convert the <segment, offset> to physical address
– The segment number is used to checked if the segment’s table is in memory or
not
– If so, the segment table is located.
• The page number is used to check if the virtual page is mapped (valid)
• If so, the page frame is added to the offset to give the physical address
• Otherwise, a page fault is triggered.
– If not, segment fault occurs.
– If there is a protection violation, a fault (trap) occurs.

Segmentation
• In reality implementation,
– The TLB is used
– When an address is presented to the computer, the addressing first
checks to see if the virtual address is in the TLB
– If so, it gets the page frame number directly from the TLB and
forms the actual address of the referenced word without having to
look in the descriptor segment or page table
– Otherwise,
• The descriptor and page tables are referenced to find the page frame address
• Then, the TLB is updated to include this page using Aging page replacement

Summary
• Design Issues for Paging Systems
• Implementation Issues
• Segmentation
Q&A

Next Lecture
• File System Components in OS
• Introduction
• Implementation
• Management
• Optimization
• Applying in practices

16. PagingImplementIssused.pptx

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