SlideShare ist ein Scribd-Unternehmen logo
1 von 2
M.JANARDHAN
Mobile: +91-9010420534 E-mail: munnuru.janardhan18@gmail.com
Career Objective:
To secure a challenging position and utilize all my skills developed through my
education and to be associated with the team that dynamically works towards the growth of
organization.
Academics Profile
 Programming Languages: Basics of C, Core Java, Servlets, Jdbc ,sql,oracle.
 Operating Systems: Windows Family.
 Packages: MS Office.
Achievements
 Selected for the Merit Scholarship Provided b y the Central Government in my
Intermediate Standard.
 Participated In Robotic Workshop Conducted by ARK TECHNO SOLUTIONS.
 Participated In Various Technical Fests Conducted by Various Colleges.
Qualification Discipline Institution Board/University Year of
passing
Aggregate
B.Tech ECE
MallaReddy Institute Of
Technology & Science
JNTU,Hyderabad,
AndhraPradesh 2014 80.17
Intermediate M.P.C Vignan Junior College
Board Of Intermediate
Education,
AndhraPradesh
2009 95.6
SSC Zilla Parishath High School
Board Of Secondary
Education
AndhraPradesh
2007 83.3
Skill Set
Extra Activities
Title: Design Of Low Power Sequential Circuit Using Clocked Pair Shared Flip Flop.
Description: Low Power Design has become a Critical issue in VLSI Design. In
Synchronous Digital Systems the Clock Signal is used. To Define a Time Reference for the
Movement Of Data Within that System. The Clock Distribution Network Distributes the
Clock Signal From Common Point to all the Elements that need it. The CDN Consumes
Large Amount Of Power. Aspire Of to Reducing the Power Consumption in Clock
Distribution Network by Designing a New Flip Flop.
Tool used: MICROWIND, DSCH
Name : M. Janardhan.
Fathers Name : Mr.Venkatramulu.
D.O.B : 18/01/1992,
Nationality : Indian ,
Languages : Telugu, Hindi, English ,
Address : H No: 2-50/1,
Vill: Doma,
Mdl: Doma,
Ranga Reddy District,A,P,
Pin code:501502.
Marital Status : Single.
DECLARATION
I here by Certify that all the Information Provided above is true to the best of my
Knowledge.
PLACE: Hyderabad
DATE: (m janardhan)
Project Details
Personal Information

Weitere ähnliche Inhalte

Was ist angesagt? (20)

josu4638@
josu4638@josu4638@
josu4638@
 
mayank resume
mayank resumemayank resume
mayank resume
 
Jaideep sai kalapatapu
Jaideep sai kalapatapuJaideep sai kalapatapu
Jaideep sai kalapatapu
 
Resume Jaybissa-1
Resume Jaybissa-1Resume Jaybissa-1
Resume Jaybissa-1
 
Android Developer fresher
Android Developer fresherAndroid Developer fresher
Android Developer fresher
 
Resume NEW
Resume NEWResume NEW
Resume NEW
 
PRAVARTHIKAA (1) (1) (1)
PRAVARTHIKAA (1) (1) (1)PRAVARTHIKAA (1) (1) (1)
PRAVARTHIKAA (1) (1) (1)
 
resume_fresher
resume_fresherresume_fresher
resume_fresher
 
r1mod
r1modr1mod
r1mod
 
Pankajkumar1- B.Tech(CSE) 2015 Batch
Pankajkumar1- B.Tech(CSE) 2015 BatchPankajkumar1- B.Tech(CSE) 2015 Batch
Pankajkumar1- B.Tech(CSE) 2015 Batch
 
sadik cv
sadik cvsadik cv
sadik cv
 
Dhamotharan dba
Dhamotharan dbaDhamotharan dba
Dhamotharan dba
 
Akshay_Fresher_JAVA
Akshay_Fresher_JAVAAkshay_Fresher_JAVA
Akshay_Fresher_JAVA
 
madhupdf
madhupdfmadhupdf
madhupdf
 
Praveen Resume
Praveen ResumePraveen Resume
Praveen Resume
 
bly resume
bly resumebly resume
bly resume
 
NewCv2
NewCv2NewCv2
NewCv2
 
Ravi(java)
Ravi(java)Ravi(java)
Ravi(java)
 
Fresher resume
Fresher resumeFresher resume
Fresher resume
 
Resume_Farahath
Resume_FarahathResume_Farahath
Resume_Farahath
 

Ähnlich wie janadhan1 (20)

mounika
mounikamounika
mounika
 
resume
resumeresume
resume
 
Sabahulwara_BTech(ETC)_2014
Sabahulwara_BTech(ETC)_2014Sabahulwara_BTech(ETC)_2014
Sabahulwara_BTech(ETC)_2014
 
KARISHMA KR (1)
KARISHMA KR (1)KARISHMA KR (1)
KARISHMA KR (1)
 
Pooja pgdm (marketing)
Pooja   pgdm (marketing)Pooja   pgdm (marketing)
Pooja pgdm (marketing)
 
Vijay resume
Vijay resumeVijay resume
Vijay resume
 
raja resume
raja resumeraja resume
raja resume
 
PRABAKARAN
PRABAKARANPRABAKARAN
PRABAKARAN
 
Mechanical Engineer
Mechanical EngineerMechanical Engineer
Mechanical Engineer
 
Capgemini resume(1)
Capgemini resume(1)Capgemini resume(1)
Capgemini resume(1)
 
aarthy resume (modified)
aarthy resume (modified)aarthy resume (modified)
aarthy resume (modified)
 
Nagarathna
NagarathnaNagarathna
Nagarathna
 
Gangacharya Resume
Gangacharya ResumeGangacharya Resume
Gangacharya Resume
 
Lavanya_Resume
Lavanya_ResumeLavanya_Resume
Lavanya_Resume
 
MURARI IT
MURARI ITMURARI IT
MURARI IT
 
Supriya Resume
Supriya ResumeSupriya Resume
Supriya Resume
 
naga123
naga123naga123
naga123
 
CURRICULUM VITAE..
CURRICULUM VITAE..CURRICULUM VITAE..
CURRICULUM VITAE..
 
Satish
SatishSatish
Satish
 
SUBHASHINI
SUBHASHINISUBHASHINI
SUBHASHINI
 

janadhan1

  • 1. M.JANARDHAN Mobile: +91-9010420534 E-mail: munnuru.janardhan18@gmail.com Career Objective: To secure a challenging position and utilize all my skills developed through my education and to be associated with the team that dynamically works towards the growth of organization. Academics Profile  Programming Languages: Basics of C, Core Java, Servlets, Jdbc ,sql,oracle.  Operating Systems: Windows Family.  Packages: MS Office. Achievements  Selected for the Merit Scholarship Provided b y the Central Government in my Intermediate Standard.  Participated In Robotic Workshop Conducted by ARK TECHNO SOLUTIONS.  Participated In Various Technical Fests Conducted by Various Colleges. Qualification Discipline Institution Board/University Year of passing Aggregate B.Tech ECE MallaReddy Institute Of Technology & Science JNTU,Hyderabad, AndhraPradesh 2014 80.17 Intermediate M.P.C Vignan Junior College Board Of Intermediate Education, AndhraPradesh 2009 95.6 SSC Zilla Parishath High School Board Of Secondary Education AndhraPradesh 2007 83.3 Skill Set Extra Activities
  • 2. Title: Design Of Low Power Sequential Circuit Using Clocked Pair Shared Flip Flop. Description: Low Power Design has become a Critical issue in VLSI Design. In Synchronous Digital Systems the Clock Signal is used. To Define a Time Reference for the Movement Of Data Within that System. The Clock Distribution Network Distributes the Clock Signal From Common Point to all the Elements that need it. The CDN Consumes Large Amount Of Power. Aspire Of to Reducing the Power Consumption in Clock Distribution Network by Designing a New Flip Flop. Tool used: MICROWIND, DSCH Name : M. Janardhan. Fathers Name : Mr.Venkatramulu. D.O.B : 18/01/1992, Nationality : Indian , Languages : Telugu, Hindi, English , Address : H No: 2-50/1, Vill: Doma, Mdl: Doma, Ranga Reddy District,A,P, Pin code:501502. Marital Status : Single. DECLARATION I here by Certify that all the Information Provided above is true to the best of my Knowledge. PLACE: Hyderabad DATE: (m janardhan) Project Details Personal Information