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Embedded System
PART 6 (ADC)
ENG.KEROLES SHENOUDA
1
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ADC
“Analog Digital Converter”
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ADC introduction
 Signals in the real world are analog: light, sound, you name it.
So, real-world signals must be converted into digital, using a circuit called ADC
(Analog-to-Digital Converter)
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ADC introduction
4
01001010
Register
Sampling period
Sensor Output
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ADC Application: Embedded systems
receive
 Embedded systems receive their inputs from
the external world in the form of analog signals.
 An analog signal (amplitude varies
continuously) needs to be converted into a
digital signal as processor only
takes digital signals ( a series of ones and zeros
represented by voltages).
 Thus conversions are performed by Analog-to-
Digital(ADC) and the reverse conversion of
digital to analog by Digital-to-Analog(DAC).
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Signals Concept
TO UNDERSTAND THE ADC #IN_DEPTH, YOU SHOULD UNDERSTAND WELL
THE FOLLOWING CONCEPTS
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Signals
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Concepts: Embedded Communication “PCM”s
Modulation
Analog Modulation Digital Modulation
Continues Wave
Pulse Modulation
AM
FM
PM
PAM
PWM PPM
PCM
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Sampling (Hand writing)
time domain
 Theoretical Sampling: x(t). ð(t-t.)
x(t) Ks(t)
P(t) periodic impulse train
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Sampling (Hand writing)
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Frequency Domain
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quantizer
Vmax
Vmix
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quantizer
Quantizer_max_error =
2
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embedded_systemDeterministic Sawtooth Waveform
Error Model
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quantizer
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16
01011111
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Quantizer Types
Quantizer
Uniform Quantizer
midrise quantizer midtead quantizer
Non-uniform quantizer
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Now Simply we can
consider ADC as…?
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Simply we can consider ADC as
ADC major characteristics
Conversion Time
Resolution
Vref
Parallel vs. serial
Input channels
19
Analog
Signal Sampler Quantizer Encoder
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Resolution
Analog
Signal
20Assume ADC resolution 1 bit
That mean that the ADC Register have two value 1 or 0
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Resolution
Analog
Signal
21Assume ADC resolution 1 bit
That mean that the ADC Register have two value 1 or 0
Number of levels = 2^1 = 2 two levels
Step size = Vref / 2 = 2.5
Low Level =0
High Level =1
Step size
Step size
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Resolution
Analog
Signal
22Assume ADC resolution 1 bit
That mean that the ADC Register have two value 1 or 0
Number of levels = 2^1 = 2 two levels
Step size = Vref / 2 = 2.5
Low Level =0
High Level =1
Step size
Step size
Assume sampling this value
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Resolution
Analog
Signal
23Assume ADC resolution 1 bit
That mean that the ADC Register have two value 1 or 0
Number of levels = 2^1 = 2 two levels
Step size = Vref / 2 = 2.5
Low Level =0
High Level =1
Step size
Step size
Assume sampling this value
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Resolution
Analog
Signal
24
Assume ADC resolution 2 bit
That mean that the ADC Register have two value 1 or 0
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Resolution
Analog
Signal
25
Assume ADC resolution 2 bit
That mean that the ADC Register have two value 1 or 0
Number of levels = 2^2 = 4 levels
Step size = Vref / 4 = 1.25 v
Step size
=1.25
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Resolution
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Vref = (Vmax-Vmin) = 5
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Define The Resolution?
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29Resolution
ADC voltage resolution ADC resolution
The resolution of the converter indicates the number of
discrete values it can produce over the range of analog values.
If this variable uses eight bits, this means it can hold values from
0 to 255 (2^8 = 256). If this variable uses 16 bits, this means it
can hold values from 0 to 65,535 (2^16 = 65,536). And so on.
ADC voltage resolution == Step size
The ADC voltage resolution is the
smallest change in input that can be
reliably detected by the system.
Resolution
The ADC has n-bit resolution, where n can be 8, 10, 12, 16, or
even 24 bits. Higher-resolution ADCs provide a smaller step
size, where step size is the smallest change that can be
discerned by an ADC.
Although the resolution of an ADC chip is decided at the time
of its design and cannot be changed, we can control the step
size with the help of what is called Vref.
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Example
 assume input signal x(t) = Acos(t), A = 5V
 Full scale measurement range = -5 to 5 volts
 ADC resolution is 8 bits
 Calculate ADC voltage resolution……?
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Solution
 (assume input signal x(t) = Acos(t), A = 5V)
 Full scale measurement range = -5 to 5 volts
 ADC resolution is 8 bits: 28 = 256 quantization levels (codes)
 ADC voltage resolution, Q = (5 V − (-5) V) / 256 = 10 V / 256 ≈ 0.039 V ≈ 39 mV.
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Major Characteristics of the ADC
 Conversion Time
 Conversion time is defined as the time it takes the ADC to convert the analog input to a
digital (binary) number.
 The conversion time is dictated by the clock source connected to the ADC in addition to
the method used for data conversion and technology used in the fabrication of the ADC
chip such as MOS or TTL technology.
 Reference Voltage ( Vref )
 Vref is an input voltage used for the reference voltage.
 The voltage connected to this pin, along with the resolution of the ADC chip, dictate the
step size.
 For an 8-bit ADC, the step size is Vref/256 because it is an 8-bit ADC, and 2 to the power of
8 gives us 256 steps.
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Major Characteristics of the ADC
 Digital data output
 In an 8-bit ADC we have an 8-bit digital data output of D0-D7, while in the 10-bit ADC the data
output is D0-D9.
 To calculate the output voltage, we use the following formula:
Dout = Vin / step size
 Where
 Dout = digital data output (in decimal),
 Vin = analog input voltage
 step size = (resolution) is the smallest change, which is
( Vref / 256 ) for an 8-bit ADC.
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Simple Quiz
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Major Characteristics of the ADC
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Major Characteristics of the ADC
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Signal to Noise ratio SNR
37
Conclusion
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SNR
38
power
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SNR
39
power
Voltage
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SNR
40
power
Voltage
power Voltage
dB
power
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SNR
41
power
Voltage
power Voltage
dB
power
dB
Voltage
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SNR
42
power
Voltage
power Voltage
dB
power
dB
Voltage
If
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SNR
 The signal-to-noise ratio (SNR), which measures the
noise level, can be easily calculated through this
formula, where n is the number of bits used on the ADC:
SNR = 6.02 x n + 1.76 dB
 The higher the SNR, the better. An 8-bit ADC provides a
SNR of 49.9 dB, while a 16-bit SNR provides a SNR of 98
dB (which is, by the way, a virtually no-noise value).
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44
Conclusion
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Conclusion
45
Analog
Signal Sampler Quantizer Encoder
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Conclusion
46Analog
Signal Sampler Quantizer Encoder
Analog
Signal Sampler
Sampling Time
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Conclusion
47Analog
Signal Sampler Quantizer Encoder
Analog
Signal Quantizer
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Conclusion
48Analog
Signal Sampler Quantizer Encoder
Analog
Signal Encoder
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In your opinion how the Accuracy
of an ADC can be improved ?
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By increasing
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ADC Types
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ADC Types
 Parallel design (also known as Flash ADC);
 Digital-to-Analog Converter-based design
(e.g., ramp counter, successive approximation, tracking);
 Integrator-based design
(e.g., single-slope, dual-slope);
 Sigma-delta design
(also known as delta-sigma, 1-bit ADC or oversampling ADC).
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Parallel Design
The Flash ADC, also called parallel ADC,
Use a series of comparators
It works by comparing the input voltage – i.e., the
analog signal – to a reference voltage,
which would be the maximum value achieved by the analog signal.
For example, if the reference voltage is of 5 volts, this means that
the peak of the analog signal would be 5 volts.
On an 8-bit ADC when the input signal reached 5 volts we would find
a 255 (11111111) value on the ADC output, i.e., the maximum value
possible.
Then the voltage reference is lowered through a resistor network
and other comparators added, so the input voltage (analog signal)
can be compared to other values.
53
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Flash ADC
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Parallel Design
Advantages/disadvantages
 Although Flash ADC uses a very simple design, it requires a lot of components. The
number of required comparers is 2^n-1, where n is the number of output bits. Thus for an
eight-bit Flash ADC 255 comparers would be necessary, and for a 16-bit Flash ADC, 65,535!
 On the other hand, Flash ADC is the fastest ADC type available. The digital equivalent of
the analog signal will be available right away at it output (it will only have the propagation
delay inserted by the logic gates) – hence the name “flash”.
 Another advantage of Flash ADC is that you can create an ADC with non-linear
output. Usually ADCs have a linear output, i.e., each digital number corresponds to a
fixed voltage increase on the analog input. For example, on the 3-bit ADC shown above
with a Vref of 5 V, each digital number would represent 625 mV (5 V / 2^3). So 0 V = 000,
0.625 V = 001, 1.250 V = 010 and so on up to 5 V = 111.
Since Flash ADC comparisons are set by a set of resistors, one could set different values
for the resistors in order to obtain a non-linear output, i.e., one value would represent a
different voltage step from the other values.
55
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Advantages/disadvantages
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DAC-Based Designs
 There are a few ways to design an ADC using a DAC as part of its comparison
circuit
 Ramp Counter ADC
 Successive Approximation ADC
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Ramp counter ADC
 Ramp counter ADC, also called digital ramp ADC.
Vin is the analog input and Dn through D0 are the digital
outputs.
The control line found on the counter turns on the counter
when it is low and stops the counter when it is high.
 The basic idea is to increase the counter until the value found
on the counter matches the value of the analog signal. When
this condition is met, the value on the counter is the digital
equivalent of the analog signal.
 It requires a START pulse for each analog voltage you want to
convert into digital
 So the main problem with this circuit is that it is very slow, as
it would require up to 2^n-1 clock cycles to convert each
sample. For an eight-bit ADC, it would take up to 255 clock
cycles to convert a single sample. For a 16-bit ADC it would
take up to 65,535 clock cycles to convert one sample.
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Ramp counter ADC
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Successive Approximation ADC
 the successive approximation ADC starts first setting the
MSB (most significant bit, on an eight-bit ADC it would be
D7). In order to facilitate the explanations below, consider
an eight-bit ADC.
 The comparison between Vin and the DAC output will tell
the control unit if this bit should remain set at 1 or should
be set at 0, as the op amp will tell right away the control
unit if the sample value is greater or lower than 128 (2^7).
Then D6 is set to one, and from the comparison done by
the op amp, the control unit will know if this bit should
remain set or not. And so on.
 The good thing about the successive approximation ADC is
its speed. At the worst case it will find the correct digital
value for the sample at n clock cycles
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Successive Approximation ADC
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Sigma-delta design
 A delta sigma ADC or DAC always consists of a delta sigma modulator which
produces the bitstream and a low pass filter.
62
Quantization Noise
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Sigma-delta design
 A delta sigma ADC or DAC always consists of a delta sigma modulator which
produces the bitstream and a low pass filter.
63
Quantization Noise
The Negative feedback
Is responsible on subtract
Noise from the input signal
Equivalent ~ to high pass filter
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We can model that in this way
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Sigma-delta design
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Sigma-delta design
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Sigma-delta design
Signals within a First Order
Analog Modulator
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ADC Modules on Different
Microcontrollers
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ADC on TM4C123G SOC
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ADC important Features on TivaC
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ADC Specs on TivaC
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ADC
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ADC Sample Sequencers
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Now, You feel like
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Don’t worry, we will make
a lot of labs and go through
TivaC ADC in depth in the
ARM-CortexM Sessions
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ADC on ATMEGA32
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ADC Features in Atmega32 80
To be
professional
On Embedded
You should read
the Specs by
yourself
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ADC Type
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So the main features
 It is a 10-bit ADC.
 It has 8 analog input channels,
7 differential input channels, and
2 differential input channels with
optional gain of 10x and 200x.
 The converted output binary data is
held by two special function regis-
ters called ADCL (A/D Result Low)
and ADCH (A/D Result High).
 Because the ADCH:ADCL registers
give us 16 bits and the ADC data out is only 10 bits wide, 6 bits of the 16 are
unused.
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So the main features
We have three options for Vref
 Vref can be connected to
 AVCC (Analog Vcc) Internal 2.56 V Reference
 External AREF pin
 The conversion time is dictated by the crystal frequency connected to the
XTAL pins (Fosc) and ADPS0:2 bits.
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Simple Quiz
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Simple Quiz
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Simple Quiz
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Interfacing Sensors
•8 channel implies that there are 8 ADC pins are
multiplexed together. You can easily see that these pins
are located across PORTA (PA0…PA7).
•10 bit resolution implies that there are 2^10 = 1024
•the type of ADC implemented inside the AVR MCU is of
Successive Approximation type.
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Analog to
Digital
Converter
Block
Schematic
Operation
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How it works
 The analog voltage at the input of the ADC must be greater
than 0V, and smaller than the ADC's reference voltage AREF.
 The reference voltage is an external voltage you must supply
at the Aref pin of the chip.
 The value the voltage at the input is converted to can be
calculated with the follwing formula:
 ADC conversion value = round( (vin/vref)*1023)
 Since it is a 10-bit ADC, you have 1024(1024=2^10) possible
output values (from 0 to 1023). So, if vin is equal to 0V, the
result of the conversion will be 0, if vin is equal to vref, it will
be 1023, and if vin is equal to vref/2 it will be 512
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Modes of Operation
 Single Conversion mode, you have to initiate each conversion. When it is
done, the result is placed in the ADC Data register pair and no new conversion
is started.
 In Free Runing mode, you start the conversion only once, and then, the
ADC automatically will start the following conversion as soon as the previous
one is finished
 The analog to digital conversion is not instantaneous, it takes some time. This
time depends on the clock signal used by the ADC. The conversion time is
proportional to the frequency of the ADC clock signal, which must
be between 50kHz and 200kHz.
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Modes of Operation
 If you can live with less than 10-bit resolution, you can reduce the
conversion time by increasing the ADC clock frequency.
 The ADC module contains a prescaler, which divides the system
clock to an acceptable ADC clock frequency. You configure the
division factor of the prescaler using the ADPS bits
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Modes of Operation
 To know the time that a conversion takes, just need to divide the
number of ADC clock cycles needed for conversion by the frequency of
the ADC clock.
 Normaly, a conversion takes 13 ADC clock cycles.
 The first conversion after the ADC is switched on (by setting the ADEN
bit) takes 25 ADC clock cycles. This first conversion is called an
"Extended Conversion".
 For instance, if you are using a 200kHz ADC clock signal, a normal
conversion will take 65 microsenconds (13/200e3=65e-6), and an
extended conversion will take 125 microseconds (25/200e3=125e-6).
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ADC Registers
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ADC Programming in AVR
 In the AVR microcontroller five major registers are associated with
the ADC They are
1. ADCH (high data)
2. ADCL (low data)
3. ADCSRA (ADC Control and Status Register)
4. ADMUX (ADC multiplexer selection register)
5. SPIOR (Special Function I/O Register).
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Register
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ADMUX – ADC Multiplexer Selection
Register 97
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ADCH and ADCL Data registers
 ADCH:ADCL store the
results of conversion.
 The 10 bit result can be
right or left justified:
ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 - - - - - -ADC9 ADC8
ADCH ADCL
ADLAR = 0
ADLAR =1
ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0- - - - - - ADC9 ADC8
ADCH ADCL
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ADCSRA – ADC Control and Status
Register A
ADEN – ADC Enable – As the
name says, it enables the ADC
feature. Unless this is enabled,
ADC operations cannot take
place across PORTA i.e. PORTA
will behave as GPIO pins.
ADSC – ADC Start Conversion –
Write this to ‘1’ before starting
any conversion. This 1 is written
as long as the conversion is in
progress, after which it returns
to zero. Normally it takes 13 ADC
clock pulses for this operation.
But when you call it for the first
time, it takes 25 as it performs
the initialization together with it.
ADATE – ADC Auto Trigger Enable –
Setting it to ‘1’ enables auto-triggering
of ADC. ADC is triggered automatically
at every rising edge of clock pulse
ADIF – ADC Interrupt Flag –
Whenever a conversion is
finished and the registers are
updated, this bit is set to ‘1’
automatically
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ADCSRA – ADC Control and Status
Register A
ADIE – ADC Interrupt Enable –
When this bit is set to ‘1’, the
ADC interrupt is enabled. This is
used in the case of interrupt-
driven ADC.
ADPS2:0 – ADC Prescaler
Select Bits – The prescaler
(division factor between XTAL
frequency and the ADC clock
frequency)
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SFIOR – Special Function I/O
Register
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Prescaling and Conversion Timing 102
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ADC Timing Diagram, First Conversion (Single
Conversion Mode)
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ADC Timing Diagram, Single Conversion 104
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ADC Timing Diagram, Auto Triggered Conversion 105
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ADC Timing Diagram, Free Running Conversion 106
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Why 13 cycles max used for
ADC Conversion time ?
THINK IN-DEPTH 
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Programming ADC
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ADC Lab 1
BY USING POLLING
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ADC Lab1
 make Port A an input for ADC input
 using Polling
 2.56V Vref internal, right justified,
 make ADC enable and select CLK/128
 select ADC Channel 0
 ADC conversion value =
round( (vin/vref)*1023)
 If Vin =2.65
 The ADC value
=round(2.65/2.56)*1023=1023=0x3ff
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using Interrupt
 make Port A an input for ADC input
 using Polling
 2.56V Vref internal, right justified,
 make ADC enable and select CLK/128
 select ADC Channel 0
 ADC conversion value =
round( (vin/vref)*1023)
 If Vin =2.65
 The ADC value
=round(2.65/2.56)*1023=1023=0x3ff
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(DR)
 For example, the following thermistor circuit has
a resistance of 10KΩ at 25°C and a resistance
of 100Ω at 100°C. Calculate the output voltage
(Vout) for both temperatures
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LM34 and LM35 Temprature Sensors
 The output voltage is of LM34 is linearly proportional to the
Fahrenheit temperature. It outputs 10 mV for each degree
of Fahrenheit temperature.
Part Scale Temp. Range Accuracy Output
LM34A -50 F to +300 F +2.0 F 10 mV/F
LM34 -50 F to +300 F +3.0 F 10 mV/F
LM34CA -40 F to +230 F +2.0 F 10 mV/F
LM34C -40 F to +230 F +3.0 F 10 mV/F
LM34D -32 F to +212 F +4.0 F 10 mV/F
Table 13-9: LM34 Temperature Sensor Series Selection Guide
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LM34 and LM35 Temprature Sensors
 The output voltage is of LM35 is linearly proportional to the
Celsius temperature. It outputs 10 mV for each degree of
Centidgade temperature.
Table 13-9: LM35 Temperature Sensor Series Selection Guide
Part Temp. Range Accuracy Output Scale
LM35A -55 C to+150 C +1.0 C 10 mV/C
LM35 -55 C to +150 C +1.5 C 10 mV/C
LM35CA -40 C to +110 C +1.0 C 10 mV/C
LM35C -40 C to +110 C +1.5 C 10 mV/C
LM35D 0 C to +100C +2.0 C 10 mV/C
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Interfacing the LM34, LM35 to the AVR
 LM34 (or LM35) produces 10mV for every degree of
temperature change and the ADC has 10-bit resolution with
a maximum of 1024 steps.
 if we use the step size of 10 mV, the Vout will be 10,240 mV
(10.24 V) for full-scale output.
 The maximum temperature sensed by the LM34 is 300
degrees F, and its highest is 3000mV (3.00V).
 If we use the internal 2.56V reference voltage, the step size
would be 2.56 V/1024 = 2.5 mV.
 (10 mV/2.5 mV = 4) This is four times the real temperature
 We can scale it by dividing it by 4 to get the real number for
temperature
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Interfacing the LM34, LM35 to the AVR
Temp. (F) Vin (mV) # of steps Binary Vout(b9-bO) Temp, in Binary
0 0 0 00 0000 0000 0000 0000
1 10 4 00 0000 0100 0000 0001
2 20 8 00 0000 1000 0000 0010
3 30 12 00 0000 1100 0000 0011
10 100 20 00 0010 1000 0000 1010
20 200 80 00 0101 0000 0001 0100
30 300 120 00 0111 1000 0001 1110
40 400 160 00 1010 0000 0010 1000
50 500 200 00 1100 1000 0011 0010
60 600 240 00 1111 0000 0011 1100
70 700 300 01 0001 1000 0100 0110
80 800 320 01 0100 0000 0101 0000
90 900 360 01 0110 1000 0101 1010
100 1000 400 01 1001 0000 0110 0100
Table 13-11: Temperature vs. Vout for AVR with Vref = 2.56 V
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Interfacing the LM34, LM35 to the AVR
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LAB3: write a program for Reading and
displaying temperature
The following points must be noted:
1. The LM34 (or LM35) is connected to
Channel 0 (ADC0 pin).
2. The 10-bit output of the A/D is divided by
4 to get the real temperature.
3. To divide the 10-bit output of the A/D by
4 we choose the left-justified option and
only read the ADCH register. It is same as
shifting the result two bits right. See Next
Example.
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PIR SENSOR:
 The PIR sensor detect only bodies (hot materials and living
objects) in motions not the static ones. This sensor uses
Infra red beam to detect the motion and only covers a
certain space based on the sensor model, you should to go
through the manufacturer datasheet to know about the
range. This sensor module gives only two output states
that is logic High 1 which is equivalent to 3.3 V and logic
low 0 equivalent to 0 V.
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GATEWAY CAR Parking Project 123
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GATEWAY CAR Parking
 WORKING:
 The PIR sensor is interfaced with Atmega32
AVR microcontroller to detect the motion
around the environment. Atmega32 considers
any voltage between 2V to 5V as logic high.
Hence PIR sensor is directly interfaced to the
input pin of the controller.
 The circuit shown above will read the status
of the output of the PIR sensor and the ADC
will read the Value if the Value is less than 3
Volt that mean that the PIR detected the CAR
so the gateway will opened and the 7-
segement will count each car entered on the
PARKING and the Buzzer will run, then the
Gateway will closed after the car moved a
way from GATEWAY and the Buzzer will be
OFF.
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The ADC Driver
IN THE NEXT SESSION
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References
 http://www.hardwaresecrets.com/how-analog-to-digital-converter-adc-
works/3/
 http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html
 AVR Microcontroller and Embedded Systems: Using Assembly and C (Pearson
Custom Electronics Technology) 1st Edition
https://www.amazon.com/AVR-Microcontroller-Embedded-Systems-
Electronics/dp/0138003319
 Embedded Systems Engr. Rashid Farid Chishti
Chapter 13: ADC, DAC and Sensor Interfacing
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