- Author: Kuan-Yu Liao, Chia-Yuan Chang, and James Chien-Mo Li, National Taiwan University
- Publication: IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, 2011
4. Outline
• Introduction
– Background knowledge
– PODEM Quick Review
• Split-into-W-Clones(SWK)
• Experiment Result
• Conclusion
4
5. Introduction - Background Knowledge
• Single stuck-at fault (SSF) model is no longer
effective enough in deep sub-micron (DSM)
circuits
• Several quality metrics are introduced to grade
patterns
5
7. Introduction - Background Knowledge
• To achieve high quality test pattern generation (TPG),
quality objective are introduced during the process
• Additional quality objectives may cause lots of
backtracks during TPG
• Some tries to grade and select patterns from large-N-
detect test set generated by traditional TPG tool
• SWK adopted bit-wise parallel strategy to realize search-
space parallelism, thus get more chance to justify
additional quality objectives
7
8. Introduction - PODEM Quick Review
• Path-sensitizing ATPG algorithm
• After fault activation, system choose a gate from
D-frontier and then gradually map corresponding
D-drive objective to a PI/PPI decision, called
backtrace
• After each decision make, run implication to
update the logic value of circuit
• Heuristics such as X-path search are adopted
for early avoidance of backtrack
8
9. Outline
• Introduction
– Background knowledge
– PODEM Quick Review
• Split-into-W-Clones(SWK)
• Experiment Result
• Conclusion
9
25. Conclusion
• SWK optimize test pattern quality during TPG
• Might able to integrate SWK into other
parallelism strategy
• Word size are predefined and less flexible
• Only support parallel pattern generation target
on single fault
25