This document discusses half adders and full adders. It defines a half adder as adding two single binary digits and producing a sum and carry output. A full adder adds three binary digits and produces a sum and carry output, accounting for values carried in and out. Truth tables are provided showing the input and output values for half and full adders. Circuit designs are presented for each using logic gates, with the half adder using XOR and AND gates and the full adder using additional gates due to the third input.