2. 2
Timers /Counters Programming
• The 8051 has 2 timers/counters:
• timer/counter 0
• timer/counter 1
They can be used as
1. The timer is used as a time delay generator.
– The clock source is the internal crystal frequency of the 8051.
2. An event counter.
– External input from input pin to count the number of events on
registers.
– These clock pulses cold represent the number of people passing
through an entrance, or the number of wheel rotations, or any other
event that can be converted to pulses.
3. Baud Rate Generator.
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3. 3
Registers Used in Timer/Counter
TH0, TL0, TH1, TL1
TMOD (Timer mode register)
TCON (Timer control register)
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4. 4
Timer Special function register
BIT-ADDRESSABLE
ADDRESS
PURPOSE
Timer SFR
No
89H
Mode
TMOD
Yes
88H
Control
TCON
No
8AH
Timer0 Low-Byte
TL0
No
8BH
Timer1 Low-Byte
TL1
No
8CH
Timer0 High-Byte
TH0
No
8DH
Timer1 High-Byte
TH1
Yes
C8H
Timer2 control
T2CON
No
CAH
Timer2 Low-Byte capture
RCAP2L
No
CBH
Timer2 High-Byte capture
RCAP2H
No
CCH
Timer2 Low-Byte
TL2
No
CDH
Timer2 High-Byte
TH2
8032/8052
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5. TMOD : Counter/Timer MODe Register
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
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MOV TMOD,#21H
– An 8-bit register
– Set the usage mode for two timers
• Set lower 4 bits for Timer 0 (Set to 0000 if not used)
• Set upper 4 bits for Timer 1 (Set to 0000 if not used)
– Not bit-addressable
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6. 6
• Every timer has a mean of starting and stopping.
– GATE=0
• Internal control
• The start and stop of the timer are controlled by way of software.
• Set/clear the TR for start/stop timer.
SETB TR0
CLR TR0
– GATE=1
• External control
• The hardware way of starting and stopping the timer by software and an
external source.
• Timer/counter is enabled only while the INT pin is high and the TR control pin
is set (TR).
Timer or counter selected cleared for timer operation (input from internal
system clock). Set for counter operation (input from Tx input pin).
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7. 7
M1 M0 Mode Operating Mode
0 0 0 13-bit timer mode 8-bit THx + 5-bit TLx (x= 0 or 1)
0 1 1 16-bit timer mode 8-bit THx + 8-bit TLx
1 0 2 8-bit auto reload 8-bit auto reload timer/counter;
THx holds a value which is to
be reloaded into TLx each time it
overflows.
1 1 3 Split timer mode
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8. Timer Modes
• Timer Mode 0 (13-bit Timer):
– Timer high-byte (THx) is cascaded with the 5 least-
significant bits of the timer low-byte (TLx) to form a 13-
bit timer, where x = 0 or 1.
– Upper 3-bits of TLx are not used.
– Overflow occurs on the 1FFFH-to-0000H and sets the
timer overflow flag.
– MSB is THx bit 7, and LSB is TLx bit 0.
– MOV TMOD, #00H ; setting both timers to mode 0
Timer
clock
Overflow
flag
TLx
5-bits
THx
8 -bits
TFx Interrupt
7
0
4
0
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9. • Timer Mode 1 (16-bit Timer):
– Same as mode 0 except that it is 16-bit. Timer high-byte
(THx) is cascaded the timer low-byte (TLx) to form a 16-
bit timer, where x = 0 or 1.
– Clock is applied to the combined high and low-byte timer
registers.
– Overflow occurs on the FFFFH-to-0000H and sets the
timer overflow flag.
– MSB is THx bit 7, and LSB is TLx bit 0.
– LSB toggles at clock frequency/21 and MSB at clock
frequency/216
Timer
clock
Overflow
flag
THx
8-bits
TFx Interrupt
TLx
8-bits
7
0
7
0
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10. Timer
clock
Overflow
flag
THx
8-bits
TFx Interrupt
TLx
8-bits
Trigger
Reload
• Timer Mode 2 (Auto-Reload):
– Timer low -byte (TLx) operates as an 8-bit timer while the
timer high -byte (THx) holds a reload value.
– When the count overflows from FFH-to-00H, not only the
timer flag set, but also the value in THx is loaded into
TLx, and counting continues from this value up to next
FFH-to-00H, so on.
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11. • Timer Mode 3:
– Timer 0 Splits into two 8-bit counter/timers. TL0 and TH0
act as two separate timers with overflows setting the TF0
and TF1 respectively.
– Timer 1 (when timer 0 is in mode 3 ):
Counter stopped if in mode 3
Can be used in mode 0, 1, or 2
Has gate (INT1) and external input (T1), but no flag or
interrupt.
May be used as a baud rate generator.
Timer
clock
TH1
8-bits
TL1
8-bits
Overflow flag
Timer
clock
TF0 Interrupt
TL0
8-bits
Overflow flag
÷12 Fosc. TF1 Interrupt
TH0
8-bits
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12. TCON : Counter/Timer CONtrol Register
TR (run control bit)
TR0 for Timer/counter 0; TR1 for Timer/counter 1.
TR is set by programmer to turn timer/counter on/off.
TR=0: off (stop)
TR=1: on (start)
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Timers Interrupts
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TF (timer flag, control flag)
TF0 for timer/counter 0; TF1 for timer/counter 1.
TF is like a carry. Originally, TF=0. When TH-TL rollover to 0000 from FFFFH,
the TF is set to 1.
TF=0 : not reach
TF=1: reach
If we enable interrupt, TF=1 will trigger ISR.
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14. Clocking Sources
1. Interval Timing:
• If C/T = 0 (in TMOD), timer operation is selected
and timer is clocked from on-chip oscillator. A
divide-by-12 clock frequency is applied.
• Timer registers (TLx/THx) increment at a rate of
1/12th the frequency of on-chip oscillator.
• 12 MHz crystal would yield a clock rate of 1 MHz.
• Timer overflows occur after a fixed number of
clocks, depending on the initial value loaded into the
timer registers.
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15. Clocking Sources (contd.)
2. Event Counting:
• If C/T = 1 (in TMOD), counter operation is selected
and timer is clocked from external source(500KHZ).
Usually, external source supplies the timer with a
pulse upon the occurrence of an event. Timer counts
those events.
• External clock source comes through P3.4 (for Timer
0) and P3.5 (for Timer 1).
• Timer registers are incremented in response to a 1-to-
0 transition at the external input.
• Number of external events is determined in software
by reading the timer registers TLx/THx.
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17. 17
1. Choose mode 1 timer 0
– MOV TMOD,#01H
2. Set the original value to TH0 and TL0.
– MOV TH0,#FFH
– MOV TL0,#FCH
3. You had better to clear the flag to monitor: TF0=0.
– CLR TF0
4. Start the timer.
– SETB TR0
Timer Mode 1
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18. 5. The 8051 starts to count up by incrementing the TH0-TL0.
– TH0-TL0= FFCH,FFFDH,FFFEH,FFFFH,0000H
FFFC FFFD FFFE FFFF 0000
TF = 0 TF = 0 TF = 0 TF = 0 TF = 1
TH0 TL0
Start timer Stop timer
Monitor TF until TF=1
TR0=1 TR0=0
TF
6. When TH0-TL0 rolls over from FFFFH to 0000, the 8051 set
TF0=1. TH0-TL0= FFFEH, FFFFH, 0000H (Now TF0=1)
7. Keep monitoring the timer flag (TF) to see if it is raised.
AGAIN: JNB TF0, AGAIN
8. Clear TR0 to stop the process.
CLR TR0
9. Clear the TF flag for the next round.
CLR TF0
19. Reading a Timer “on The Fly”
Two Timer register must be read a “phase error” may occur if the low-byte overflows
into the high-byte between the two read operations.
1. Read the high-byte first
2. Read the low-byte
3. Read the high byte again, if the high-byte has changed, repeat the read operations
AGAIN : MOV A, TH1
MOV R6, TL1
CJNE A ,TH1,AGAIN
MOV R7,A
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20. Short and Long Intervals
• Shortest possible interval is one machine cycle i.e., 1μs (using 12
MHz crystal frequency).
• An 8-bit counter can give maximum delay of 256μs because
28=256.
• A 13-bit counter can give maximum delay of 8192μs because
213=8192.
• A 16-bit counter can give maximum delay of 65536μs because
216=65536.
65536μs = 0.065536 sec = 0.066 sec (approx.)
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• For more than 0.066 sec delay, there are two methods:
1. Cascade Timer 0 and Timer 1 but in this way both timers will be
tied up.
2. Use one timer in 16-bit mode with a software loop counting
overflows.
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21. Write a program using Timer 0 to create a 10 kHz square wave
on P1.0.(crystal ferq=12MHZ).
ORG 0000H
MOV TMOD, #02H ;auto-reload mode
MOV TH0, # -50 ;T= 1/10kHz=100µs
SETB TR0 ;start timer
LOOP: JNB TF0, LOOP ;wait for overflow
CLR TF0 ;clear overflow flag
CPL P1.0 ;toggle port bit
SJMP LOOP ;repeat
END
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Example: 1
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22. Write a program using Timer 0 to create a 1 kHz square
wave on P1.0.
ORG 0000H
MOV TMOD, #01H ;16-bit mode
LOOP: MOV TH0, # FEH ;T= 1/1kHz=1000µs
MOV TL0, # 0CH ;-500=FE0CH
SETB TR0 ;start timer
WAIT: JNB TF0, WAIT ;wait for overflow
CLR TR0 ;stop timer
CLR TF0 ;clear overflow flag
CPL P1.0 ;toggle port bit
SJMP LOOP ;repeat
END
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Example: 2
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23. Ex4-4: Buzzer Interface
Write a program that sounds the buzzer connected at P1.7 for 1
sec for each 1-to-0 transition detected at P1.6.
ORG 0000H
MOV TMOD, #01H ;16-bit mode
LOOP: JNB P1.6, LOOP ;wait for 1 input
LOOP1: JB P1.6, LOOP1 ;wait for 0 input
SETB P1.7 ;turn buzzer ON
CALL DELAY ;wait for 1 sec
CLR P1.7 ;turn buzzer OFF
SJMP LOOP ;repeat
DELAY: MOV R7, #100 ;for 100 loops
AGAIN: MOV TH0, #D8H ;10000µsX100=1sec
MOV TL0, #F0H ;-10000=D8F0H
SETB TR0
WAIT: JNB TF0, WAIT
CLR TF0
CLR TR0
DJNZ R7, AGAIN
RET
END
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