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GOVERNMENT ENGINEERING COLLEGE,
SECTOR- 28,
GANDHINAGAR
FLIP FLOPS
IC- A2
MADE BY: DHANESH RK NAIR (150130117023)
WHAT IS A FLIP FLOP ?
• In digital circuits, the flip-flop, is a kind of bistable multivibrator.
• It is a Sequential Circuits / an electronic circuit which has two stable states
and thereby is capable of serving as one bit of memory , bit 1 or bit 0.
TYPES OF FLIP FLOPS :
1. SR Flip Flop
2. Clocked SR Flip Flop
3. JK Flip Flop
4. JK Flip Flop With Preset And Clear
5. T Flip Flop
6. D Flip Flop
USES OF FLIP FLOPS :
• For Memory circuits
• For Logic Control Devices
• For Counter Devices
• For Register Devices
SR FLIP FLOP :
• The most basic Flip Flop is called SR Flip Flop.
• The basic RS flip flop is an asynchronous device.
• In asynchronous device, the outputs is immediately
changed anytime one or more of the inputs change just as
in combinational logic circuits.
• It does not operate in step with a clock or timing.
SR FLIP FLOP :
• The SR Flip Flop has two inputs,
SET (S) and RESET (R).
• The SR Flip Flop has two outputs,
Q and Q (compliment)
• The Q output is considered the
normal output and is the one most
used.
• The other output Q(complement) is
simply the compliment of output Q.
clock
• In synchronous device, the exact times at which any
output can change states are controlled by a signal
commonly called the clock.
• The clock signal is generally a rectangular pulse train or a
square wave
• The clock is distributed to all parts of the system, and
most of the system outputs can change state only when
the clock makes a transition
• When the clock changes
from a LOW state to a HIGH
state, this is called the
positive-going transition
(PGT) or positive edge
triggered.
• When the clock changes
from a HIGH state to a LOW
state, it is called negative
going transition (NGT) or
negative edge triggered.
clock
Clocked SR FLIP FLOP :
• Additional clock input is added to
change the SR flipflop from an element
used in asynchronous sequential circuits
to one, which can be used in
synchronous circuits.
• The clocked SR flip flop logic symbol
that is triggered by the PGT
• Its means that the flip flop can change
the output states only when clock signal
makes a transition from LOW to HIGH.
Truth table for Clocked SR FLIP FLOP :
• Another types of Flip flop is JK flip flop.
• It differs from the RS flip flops when
J=K=1 condition is not indeterminate but
it is defined to give a very useful
changeover (toggle) action.
• Toggle means that Q and Q(compliment)
will switch to their opposite states.
• The JK Flip flop has clock input Cp and
two control inputs J and K.
• Operation of Jk Flip Flop is completely
described by truth table
jk FLIP FLOP :
Pgt and ngt jk FLIP FLOP
Truth table for jk FLIP FLOP :
• The J and K inputs are called synchronous inputs since they
only influence the state of the flip flop when the clocked
pulse is present.
• This flip flop can also have other inputs called Preset (or
SET) and clear that can be used for setting the flip flop to 1
or resetting it to 0 by applying the appropriate signal to the
Preset and Clear inputs.
• These inputs can change the state of the flip flop regardless
of synchronous inputs or the clock.
jk FLIP FLOP(with Asynchronous Input) :
Symbol and Truth table for jk FLIP FLOP :
• The T flip flop has only
the Toggle and Hold
Operation.
• If Toggle mode
operation. The output
will toggle from 1 to 0 or
vice versa.
t FLIP FLOP :
Truth table for t FLIP FLOP :
• Also Known as Data Flip flop
• Can be constructed from RS Flip Flop
or JK Flip flop by addition of an
inverter.
• Inverter is connected so that the R input
is always the inverse of S (or J input is
always complementary of K).
• The D flip flop will act as a storage
element for a single binary digit (Bit).
d FLIP FLOP :
Pgt and ngt d FLIP FLOP
Truth table for d FLIP FLOP :
Thank You!

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BE PPT (FLIP FLOPS)

  • 2. FLIP FLOPS IC- A2 MADE BY: DHANESH RK NAIR (150130117023)
  • 3. WHAT IS A FLIP FLOP ? • In digital circuits, the flip-flop, is a kind of bistable multivibrator. • It is a Sequential Circuits / an electronic circuit which has two stable states and thereby is capable of serving as one bit of memory , bit 1 or bit 0.
  • 4. TYPES OF FLIP FLOPS : 1. SR Flip Flop 2. Clocked SR Flip Flop 3. JK Flip Flop 4. JK Flip Flop With Preset And Clear 5. T Flip Flop 6. D Flip Flop
  • 5. USES OF FLIP FLOPS : • For Memory circuits • For Logic Control Devices • For Counter Devices • For Register Devices
  • 6. SR FLIP FLOP : • The most basic Flip Flop is called SR Flip Flop. • The basic RS flip flop is an asynchronous device. • In asynchronous device, the outputs is immediately changed anytime one or more of the inputs change just as in combinational logic circuits. • It does not operate in step with a clock or timing.
  • 7. SR FLIP FLOP : • The SR Flip Flop has two inputs, SET (S) and RESET (R). • The SR Flip Flop has two outputs, Q and Q (compliment) • The Q output is considered the normal output and is the one most used. • The other output Q(complement) is simply the compliment of output Q.
  • 8. clock • In synchronous device, the exact times at which any output can change states are controlled by a signal commonly called the clock. • The clock signal is generally a rectangular pulse train or a square wave • The clock is distributed to all parts of the system, and most of the system outputs can change state only when the clock makes a transition
  • 9. • When the clock changes from a LOW state to a HIGH state, this is called the positive-going transition (PGT) or positive edge triggered. • When the clock changes from a HIGH state to a LOW state, it is called negative going transition (NGT) or negative edge triggered. clock
  • 10. Clocked SR FLIP FLOP : • Additional clock input is added to change the SR flipflop from an element used in asynchronous sequential circuits to one, which can be used in synchronous circuits. • The clocked SR flip flop logic symbol that is triggered by the PGT • Its means that the flip flop can change the output states only when clock signal makes a transition from LOW to HIGH.
  • 11. Truth table for Clocked SR FLIP FLOP :
  • 12. • Another types of Flip flop is JK flip flop. • It differs from the RS flip flops when J=K=1 condition is not indeterminate but it is defined to give a very useful changeover (toggle) action. • Toggle means that Q and Q(compliment) will switch to their opposite states. • The JK Flip flop has clock input Cp and two control inputs J and K. • Operation of Jk Flip Flop is completely described by truth table jk FLIP FLOP : Pgt and ngt jk FLIP FLOP
  • 13. Truth table for jk FLIP FLOP :
  • 14. • The J and K inputs are called synchronous inputs since they only influence the state of the flip flop when the clocked pulse is present. • This flip flop can also have other inputs called Preset (or SET) and clear that can be used for setting the flip flop to 1 or resetting it to 0 by applying the appropriate signal to the Preset and Clear inputs. • These inputs can change the state of the flip flop regardless of synchronous inputs or the clock. jk FLIP FLOP(with Asynchronous Input) :
  • 15. Symbol and Truth table for jk FLIP FLOP :
  • 16. • The T flip flop has only the Toggle and Hold Operation. • If Toggle mode operation. The output will toggle from 1 to 0 or vice versa. t FLIP FLOP :
  • 17. Truth table for t FLIP FLOP :
  • 18. • Also Known as Data Flip flop • Can be constructed from RS Flip Flop or JK Flip flop by addition of an inverter. • Inverter is connected so that the R input is always the inverse of S (or J input is always complementary of K). • The D flip flop will act as a storage element for a single binary digit (Bit). d FLIP FLOP : Pgt and ngt d FLIP FLOP
  • 19. Truth table for d FLIP FLOP :